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Linux 2.6.20.7
[linux/fpc-iii.git] / drivers / net / e1000 / e1000_ethtool.c
blobfb96c87f9e56c9fe90223dd2902d0b15dc1c99b3
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 /* ethtool support for e1000 */
30
31 #include "e1000.h"
32
33 #include <asm/uaccess.h>
34
35 extern char e1000_driver_name[];
36 extern char e1000_driver_version[];
37
38 extern int e1000_up(struct e1000_adapter *adapter);
39 extern void e1000_down(struct e1000_adapter *adapter);
40 extern void e1000_reinit_locked(struct e1000_adapter *adapter);
41 extern void e1000_reset(struct e1000_adapter *adapter);
42 extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
43 extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
44 extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
45 extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
46 extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
47 extern void e1000_update_stats(struct e1000_adapter *adapter);
48
49
50 struct e1000_stats {
51 char stat_string[ETH_GSTRING_LEN];
52 int sizeof_stat;
53 int stat_offset;
54 };
55
56 #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
57 offsetof(struct e1000_adapter, m)
58 static const struct e1000_stats e1000_gstrings_stats[] = {
59 { "rx_packets", E1000_STAT(stats.gprc) },
60 { "tx_packets", E1000_STAT(stats.gptc) },
61 { "rx_bytes", E1000_STAT(stats.gorcl) },
62 { "tx_bytes", E1000_STAT(stats.gotcl) },
63 { "rx_broadcast", E1000_STAT(stats.bprc) },
64 { "tx_broadcast", E1000_STAT(stats.bptc) },
65 { "rx_multicast", E1000_STAT(stats.mprc) },
66 { "tx_multicast", E1000_STAT(stats.mptc) },
67 { "rx_errors", E1000_STAT(stats.rxerrc) },
68 { "tx_errors", E1000_STAT(stats.txerrc) },
69 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
70 { "multicast", E1000_STAT(stats.mprc) },
71 { "collisions", E1000_STAT(stats.colc) },
72 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
73 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
74 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
75 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
76 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
77 { "rx_missed_errors", E1000_STAT(stats.mpc) },
78 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
79 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
80 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
81 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
82 { "tx_window_errors", E1000_STAT(stats.latecol) },
83 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
84 { "tx_deferred_ok", E1000_STAT(stats.dc) },
85 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
86 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
87 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
88 { "tx_restart_queue", E1000_STAT(restart_queue) },
89 { "rx_long_length_errors", E1000_STAT(stats.roc) },
90 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
91 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
92 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
93 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
94 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
95 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
96 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
97 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
98 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
99 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
100 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
101 { "rx_header_split", E1000_STAT(rx_hdr_split) },
102 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
103 { "tx_smbus", E1000_STAT(stats.mgptc) },
104 { "rx_smbus", E1000_STAT(stats.mgprc) },
105 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
106 };
107
108 #define E1000_QUEUE_STATS_LEN 0
109 #define E1000_GLOBAL_STATS_LEN \
110 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
111 #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
112 static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
113 "Register test (offline)", "Eeprom test (offline)",
114 "Interrupt test (offline)", "Loopback test (offline)",
115 "Link test (on/offline)"
116 };
117 #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
118
119 static int
120 e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
121 {
122 struct e1000_adapter *adapter = netdev_priv(netdev);
123 struct e1000_hw *hw = &adapter->hw;
124
125 if (hw->media_type == e1000_media_type_copper) {
126
127 ecmd->supported = (SUPPORTED_10baseT_Half |
128 SUPPORTED_10baseT_Full |
129 SUPPORTED_100baseT_Half |
130 SUPPORTED_100baseT_Full |
131 SUPPORTED_1000baseT_Full|
132 SUPPORTED_Autoneg |
133 SUPPORTED_TP);
134 if (hw->phy_type == e1000_phy_ife)
135 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
136 ecmd->advertising = ADVERTISED_TP;
137
138 if (hw->autoneg == 1) {
139 ecmd->advertising |= ADVERTISED_Autoneg;
140 /* the e1000 autoneg seems to match ethtool nicely */
141 ecmd->advertising |= hw->autoneg_advertised;
142 }
143
144 ecmd->port = PORT_TP;
145 ecmd->phy_address = hw->phy_addr;
146
147 if (hw->mac_type == e1000_82543)
148 ecmd->transceiver = XCVR_EXTERNAL;
149 else
150 ecmd->transceiver = XCVR_INTERNAL;
151
152 } else {
153 ecmd->supported = (SUPPORTED_1000baseT_Full |
154 SUPPORTED_FIBRE |
155 SUPPORTED_Autoneg);
156
157 ecmd->advertising = (ADVERTISED_1000baseT_Full |
158 ADVERTISED_FIBRE |
159 ADVERTISED_Autoneg);
160
161 ecmd->port = PORT_FIBRE;
162
163 if (hw->mac_type >= e1000_82545)
164 ecmd->transceiver = XCVR_INTERNAL;
165 else
166 ecmd->transceiver = XCVR_EXTERNAL;
167 }
168
169 if (netif_carrier_ok(adapter->netdev)) {
170
171 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
172 &adapter->link_duplex);
173 ecmd->speed = adapter->link_speed;
174
175 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
176 * and HALF_DUPLEX != DUPLEX_HALF */
177
178 if (adapter->link_duplex == FULL_DUPLEX)
179 ecmd->duplex = DUPLEX_FULL;
180 else
181 ecmd->duplex = DUPLEX_HALF;
182 } else {
183 ecmd->speed = -1;
184 ecmd->duplex = -1;
185 }
186
187 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
188 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
189 return 0;
190 }
191
192 static int
193 e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
194 {
195 struct e1000_adapter *adapter = netdev_priv(netdev);
196 struct e1000_hw *hw = &adapter->hw;
197
198 /* When SoL/IDER sessions are active, autoneg/speed/duplex
199 * cannot be changed */
200 if (e1000_check_phy_reset_block(hw)) {
201 DPRINTK(DRV, ERR, "Cannot change link characteristics "
202 "when SoL/IDER is active.\n");
203 return -EINVAL;
204 }
205
206 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
207 msleep(1);
208
209 if (ecmd->autoneg == AUTONEG_ENABLE) {
210 hw->autoneg = 1;
211 if (hw->media_type == e1000_media_type_fiber)
212 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
213 ADVERTISED_FIBRE |
214 ADVERTISED_Autoneg;
215 else
216 hw->autoneg_advertised = ecmd->advertising |
217 ADVERTISED_TP |
218 ADVERTISED_Autoneg;
219 ecmd->advertising = hw->autoneg_advertised;
220 } else
221 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
222 clear_bit(__E1000_RESETTING, &adapter->flags);
223 return -EINVAL;
224 }
225
226 /* reset the link */
227
228 if (netif_running(adapter->netdev)) {
229 e1000_down(adapter);
230 e1000_up(adapter);
231 } else
232 e1000_reset(adapter);
233
234 clear_bit(__E1000_RESETTING, &adapter->flags);
235 return 0;
236 }
237
238 static void
239 e1000_get_pauseparam(struct net_device *netdev,
240 struct ethtool_pauseparam *pause)
241 {
242 struct e1000_adapter *adapter = netdev_priv(netdev);
243 struct e1000_hw *hw = &adapter->hw;
244
245 pause->autoneg =
246 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
247
248 if (hw->fc == E1000_FC_RX_PAUSE)
249 pause->rx_pause = 1;
250 else if (hw->fc == E1000_FC_TX_PAUSE)
251 pause->tx_pause = 1;
252 else if (hw->fc == E1000_FC_FULL) {
253 pause->rx_pause = 1;
254 pause->tx_pause = 1;
255 }
256 }
257
258 static int
259 e1000_set_pauseparam(struct net_device *netdev,
260 struct ethtool_pauseparam *pause)
261 {
262 struct e1000_adapter *adapter = netdev_priv(netdev);
263 struct e1000_hw *hw = &adapter->hw;
264 int retval = 0;
265
266 adapter->fc_autoneg = pause->autoneg;
267
268 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
269 msleep(1);
270
271 if (pause->rx_pause && pause->tx_pause)
272 hw->fc = E1000_FC_FULL;
273 else if (pause->rx_pause && !pause->tx_pause)
274 hw->fc = E1000_FC_RX_PAUSE;
275 else if (!pause->rx_pause && pause->tx_pause)
276 hw->fc = E1000_FC_TX_PAUSE;
277 else if (!pause->rx_pause && !pause->tx_pause)
278 hw->fc = E1000_FC_NONE;
279
280 hw->original_fc = hw->fc;
281
282 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
283 if (netif_running(adapter->netdev)) {
284 e1000_down(adapter);
285 e1000_up(adapter);
286 } else
287 e1000_reset(adapter);
288 } else
289 retval = ((hw->media_type == e1000_media_type_fiber) ?
290 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
291
292 clear_bit(__E1000_RESETTING, &adapter->flags);
293 return retval;
294 }
295
296 static uint32_t
297 e1000_get_rx_csum(struct net_device *netdev)
298 {
299 struct e1000_adapter *adapter = netdev_priv(netdev);
300 return adapter->rx_csum;
301 }
302
303 static int
304 e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
305 {
306 struct e1000_adapter *adapter = netdev_priv(netdev);
307 adapter->rx_csum = data;
308
309 if (netif_running(netdev))
310 e1000_reinit_locked(adapter);
311 else
312 e1000_reset(adapter);
313 return 0;
314 }
315
316 static uint32_t
317 e1000_get_tx_csum(struct net_device *netdev)
318 {
319 return (netdev->features & NETIF_F_HW_CSUM) != 0;
320 }
321
322 static int
323 e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
324 {
325 struct e1000_adapter *adapter = netdev_priv(netdev);
326
327 if (adapter->hw.mac_type < e1000_82543) {
328 if (!data)
329 return -EINVAL;
330 return 0;
331 }
332
333 if (data)
334 netdev->features |= NETIF_F_HW_CSUM;
335 else
336 netdev->features &= ~NETIF_F_HW_CSUM;
337
338 return 0;
339 }
340
341 #ifdef NETIF_F_TSO
342 static int
343 e1000_set_tso(struct net_device *netdev, uint32_t data)
344 {
345 struct e1000_adapter *adapter = netdev_priv(netdev);
346 if ((adapter->hw.mac_type < e1000_82544) ||
347 (adapter->hw.mac_type == e1000_82547))
348 return data ? -EINVAL : 0;
349
350 if (data)
351 netdev->features |= NETIF_F_TSO;
352 else
353 netdev->features &= ~NETIF_F_TSO;
354
355 #ifdef NETIF_F_TSO6
356 if (data)
357 netdev->features |= NETIF_F_TSO6;
358 else
359 netdev->features &= ~NETIF_F_TSO6;
360 #endif
361
362 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
363 adapter->tso_force = TRUE;
364 return 0;
365 }
366 #endif /* NETIF_F_TSO */
367
368 static uint32_t
369 e1000_get_msglevel(struct net_device *netdev)
370 {
371 struct e1000_adapter *adapter = netdev_priv(netdev);
372 return adapter->msg_enable;
373 }
374
375 static void
376 e1000_set_msglevel(struct net_device *netdev, uint32_t data)
377 {
378 struct e1000_adapter *adapter = netdev_priv(netdev);
379 adapter->msg_enable = data;
380 }
381
382 static int
383 e1000_get_regs_len(struct net_device *netdev)
384 {
385 #define E1000_REGS_LEN 32
386 return E1000_REGS_LEN * sizeof(uint32_t);
387 }
388
389 static void
390 e1000_get_regs(struct net_device *netdev,
391 struct ethtool_regs *regs, void *p)
392 {
393 struct e1000_adapter *adapter = netdev_priv(netdev);
394 struct e1000_hw *hw = &adapter->hw;
395 uint32_t *regs_buff = p;
396 uint16_t phy_data;
397
398 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
399
400 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
401
402 regs_buff[0] = E1000_READ_REG(hw, CTRL);
403 regs_buff[1] = E1000_READ_REG(hw, STATUS);
404
405 regs_buff[2] = E1000_READ_REG(hw, RCTL);
406 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
407 regs_buff[4] = E1000_READ_REG(hw, RDH);
408 regs_buff[5] = E1000_READ_REG(hw, RDT);
409 regs_buff[6] = E1000_READ_REG(hw, RDTR);
410
411 regs_buff[7] = E1000_READ_REG(hw, TCTL);
412 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
413 regs_buff[9] = E1000_READ_REG(hw, TDH);
414 regs_buff[10] = E1000_READ_REG(hw, TDT);
415 regs_buff[11] = E1000_READ_REG(hw, TIDV);
416
417 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
418 if (hw->phy_type == e1000_phy_igp) {
419 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
420 IGP01E1000_PHY_AGC_A);
421 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
422 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
423 regs_buff[13] = (uint32_t)phy_data; /* cable length */
424 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
425 IGP01E1000_PHY_AGC_B);
426 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
427 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
428 regs_buff[14] = (uint32_t)phy_data; /* cable length */
429 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
430 IGP01E1000_PHY_AGC_C);
431 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
432 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
433 regs_buff[15] = (uint32_t)phy_data; /* cable length */
434 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
435 IGP01E1000_PHY_AGC_D);
436 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
437 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
438 regs_buff[16] = (uint32_t)phy_data; /* cable length */
439 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
440 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
441 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
442 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
443 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
444 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
445 IGP01E1000_PHY_PCS_INIT_REG);
446 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
447 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
448 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
449 regs_buff[20] = 0; /* polarity correction enabled (always) */
450 regs_buff[22] = 0; /* phy receive errors (unavailable) */
451 regs_buff[23] = regs_buff[18]; /* mdix mode */
452 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
453 } else {
454 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
455 regs_buff[13] = (uint32_t)phy_data; /* cable length */
456 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
457 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
458 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
459 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
460 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
461 regs_buff[18] = regs_buff[13]; /* cable polarity */
462 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
463 regs_buff[20] = regs_buff[17]; /* polarity correction */
464 /* phy receive errors */
465 regs_buff[22] = adapter->phy_stats.receive_errors;
466 regs_buff[23] = regs_buff[13]; /* mdix mode */
467 }
468 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
469 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
470 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
471 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
472 if (hw->mac_type >= e1000_82540 &&
473 hw->mac_type < e1000_82571 &&
474 hw->media_type == e1000_media_type_copper) {
475 regs_buff[26] = E1000_READ_REG(hw, MANC);
476 }
477 }
478
479 static int
480 e1000_get_eeprom_len(struct net_device *netdev)
481 {
482 struct e1000_adapter *adapter = netdev_priv(netdev);
483 return adapter->hw.eeprom.word_size * 2;
484 }
485
486 static int
487 e1000_get_eeprom(struct net_device *netdev,
488 struct ethtool_eeprom *eeprom, uint8_t *bytes)
489 {
490 struct e1000_adapter *adapter = netdev_priv(netdev);
491 struct e1000_hw *hw = &adapter->hw;
492 uint16_t *eeprom_buff;
493 int first_word, last_word;
494 int ret_val = 0;
495 uint16_t i;
496
497 if (eeprom->len == 0)
498 return -EINVAL;
499
500 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
501
502 first_word = eeprom->offset >> 1;
503 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
504
505 eeprom_buff = kmalloc(sizeof(uint16_t) *
506 (last_word - first_word + 1), GFP_KERNEL);
507 if (!eeprom_buff)
508 return -ENOMEM;
509
510 if (hw->eeprom.type == e1000_eeprom_spi)
511 ret_val = e1000_read_eeprom(hw, first_word,
512 last_word - first_word + 1,
513 eeprom_buff);
514 else {
515 for (i = 0; i < last_word - first_word + 1; i++)
516 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
517 &eeprom_buff[i])))
518 break;
519 }
520
521 /* Device's eeprom is always little-endian, word addressable */
522 for (i = 0; i < last_word - first_word + 1; i++)
523 le16_to_cpus(&eeprom_buff[i]);
524
525 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
526 eeprom->len);
527 kfree(eeprom_buff);
528
529 return ret_val;
530 }
531
532 static int
533 e1000_set_eeprom(struct net_device *netdev,
534 struct ethtool_eeprom *eeprom, uint8_t *bytes)
535 {
536 struct e1000_adapter *adapter = netdev_priv(netdev);
537 struct e1000_hw *hw = &adapter->hw;
538 uint16_t *eeprom_buff;
539 void *ptr;
540 int max_len, first_word, last_word, ret_val = 0;
541 uint16_t i;
542
543 if (eeprom->len == 0)
544 return -EOPNOTSUPP;
545
546 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
547 return -EFAULT;
548
549 max_len = hw->eeprom.word_size * 2;
550
551 first_word = eeprom->offset >> 1;
552 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
553 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
554 if (!eeprom_buff)
555 return -ENOMEM;
556
557 ptr = (void *)eeprom_buff;
558
559 if (eeprom->offset & 1) {
560 /* need read/modify/write of first changed EEPROM word */
561 /* only the second byte of the word is being modified */
562 ret_val = e1000_read_eeprom(hw, first_word, 1,
563 &eeprom_buff[0]);
564 ptr++;
565 }
566 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
567 /* need read/modify/write of last changed EEPROM word */
568 /* only the first byte of the word is being modified */
569 ret_val = e1000_read_eeprom(hw, last_word, 1,
570 &eeprom_buff[last_word - first_word]);
571 }
572
573 /* Device's eeprom is always little-endian, word addressable */
574 for (i = 0; i < last_word - first_word + 1; i++)
575 le16_to_cpus(&eeprom_buff[i]);
576
577 memcpy(ptr, bytes, eeprom->len);
578
579 for (i = 0; i < last_word - first_word + 1; i++)
580 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
581
582 ret_val = e1000_write_eeprom(hw, first_word,
583 last_word - first_word + 1, eeprom_buff);
584
585 /* Update the checksum over the first part of the EEPROM if needed
586 * and flush shadow RAM for 82573 conrollers */
587 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
588 (hw->mac_type == e1000_82573)))
589 e1000_update_eeprom_checksum(hw);
590
591 kfree(eeprom_buff);
592 return ret_val;
593 }
594
595 static void
596 e1000_get_drvinfo(struct net_device *netdev,
597 struct ethtool_drvinfo *drvinfo)
598 {
599 struct e1000_adapter *adapter = netdev_priv(netdev);
600 char firmware_version[32];
601 uint16_t eeprom_data;
602
603 strncpy(drvinfo->driver, e1000_driver_name, 32);
604 strncpy(drvinfo->version, e1000_driver_version, 32);
605
606 /* EEPROM image version # is reported as firmware version # for
607 * 8257{1|2|3} controllers */
608 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
609 switch (adapter->hw.mac_type) {
610 case e1000_82571:
611 case e1000_82572:
612 case e1000_82573:
613 case e1000_80003es2lan:
614 case e1000_ich8lan:
615 sprintf(firmware_version, "%d.%d-%d",
616 (eeprom_data & 0xF000) >> 12,
617 (eeprom_data & 0x0FF0) >> 4,
618 eeprom_data & 0x000F);
619 break;
620 default:
621 sprintf(firmware_version, "N/A");
622 }
623
624 strncpy(drvinfo->fw_version, firmware_version, 32);
625 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
626 drvinfo->n_stats = E1000_STATS_LEN;
627 drvinfo->testinfo_len = E1000_TEST_LEN;
628 drvinfo->regdump_len = e1000_get_regs_len(netdev);
629 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
630 }
631
632 static void
633 e1000_get_ringparam(struct net_device *netdev,
634 struct ethtool_ringparam *ring)
635 {
636 struct e1000_adapter *adapter = netdev_priv(netdev);
637 e1000_mac_type mac_type = adapter->hw.mac_type;
638 struct e1000_tx_ring *txdr = adapter->tx_ring;
639 struct e1000_rx_ring *rxdr = adapter->rx_ring;
640
641 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
642 E1000_MAX_82544_RXD;
643 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
644 E1000_MAX_82544_TXD;
645 ring->rx_mini_max_pending = 0;
646 ring->rx_jumbo_max_pending = 0;
647 ring->rx_pending = rxdr->count;
648 ring->tx_pending = txdr->count;
649 ring->rx_mini_pending = 0;
650 ring->rx_jumbo_pending = 0;
651 }
652
653 static int
654 e1000_set_ringparam(struct net_device *netdev,
655 struct ethtool_ringparam *ring)
656 {
657 struct e1000_adapter *adapter = netdev_priv(netdev);
658 e1000_mac_type mac_type = adapter->hw.mac_type;
659 struct e1000_tx_ring *txdr, *tx_old;
660 struct e1000_rx_ring *rxdr, *rx_old;
661 int i, err, tx_ring_size, rx_ring_size;
662
663 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
664 return -EINVAL;
665
666 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
667 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
668
669 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
670 msleep(1);
671
672 if (netif_running(adapter->netdev))
673 e1000_down(adapter);
674
675 tx_old = adapter->tx_ring;
676 rx_old = adapter->rx_ring;
677
678 err = -ENOMEM;
679 txdr = kzalloc(tx_ring_size, GFP_KERNEL);
680 if (!txdr)
681 goto err_alloc_tx;
682
683 rxdr = kzalloc(rx_ring_size, GFP_KERNEL);
684 if (!rxdr)
685 goto err_alloc_rx;
686
687 adapter->tx_ring = txdr;
688 adapter->rx_ring = rxdr;
689
690 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
691 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
692 E1000_MAX_RXD : E1000_MAX_82544_RXD));
693 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
694
695 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
696 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
697 E1000_MAX_TXD : E1000_MAX_82544_TXD));
698 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
699
700 for (i = 0; i < adapter->num_tx_queues; i++)
701 txdr[i].count = txdr->count;
702 for (i = 0; i < adapter->num_rx_queues; i++)
703 rxdr[i].count = rxdr->count;
704
705 if (netif_running(adapter->netdev)) {
706 /* Try to get new resources before deleting old */
707 if ((err = e1000_setup_all_rx_resources(adapter)))
708 goto err_setup_rx;
709 if ((err = e1000_setup_all_tx_resources(adapter)))
710 goto err_setup_tx;
711
712 /* save the new, restore the old in order to free it,
713 * then restore the new back again */
714
715 adapter->rx_ring = rx_old;
716 adapter->tx_ring = tx_old;
717 e1000_free_all_rx_resources(adapter);
718 e1000_free_all_tx_resources(adapter);
719 kfree(tx_old);
720 kfree(rx_old);
721 adapter->rx_ring = rxdr;
722 adapter->tx_ring = txdr;
723 if ((err = e1000_up(adapter)))
724 goto err_setup;
725 }
726
727 clear_bit(__E1000_RESETTING, &adapter->flags);
728 return 0;
729 err_setup_tx:
730 e1000_free_all_rx_resources(adapter);
731 err_setup_rx:
732 adapter->rx_ring = rx_old;
733 adapter->tx_ring = tx_old;
734 kfree(rxdr);
735 err_alloc_rx:
736 kfree(txdr);
737 err_alloc_tx:
738 e1000_up(adapter);
739 err_setup:
740 clear_bit(__E1000_RESETTING, &adapter->flags);
741 return err;
742 }
743
744 #define REG_PATTERN_TEST(R, M, W) \
745 { \
746 uint32_t pat, value; \
747 uint32_t test[] = \
748 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
749 for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
750 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
751 value = E1000_READ_REG(&adapter->hw, R); \
752 if (value != (test[pat] & W & M)) { \
753 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
754 "0x%08X expected 0x%08X\n", \
755 E1000_##R, value, (test[pat] & W & M)); \
756 *data = (adapter->hw.mac_type < e1000_82543) ? \
757 E1000_82542_##R : E1000_##R; \
758 return 1; \
759 } \
760 } \
761 }
762
763 #define REG_SET_AND_CHECK(R, M, W) \
764 { \
765 uint32_t value; \
766 E1000_WRITE_REG(&adapter->hw, R, W & M); \
767 value = E1000_READ_REG(&adapter->hw, R); \
768 if ((W & M) != (value & M)) { \
769 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
770 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
771 *data = (adapter->hw.mac_type < e1000_82543) ? \
772 E1000_82542_##R : E1000_##R; \
773 return 1; \
774 } \
775 }
776
777 static int
778 e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
779 {
780 uint32_t value, before, after;
781 uint32_t i, toggle;
782
783 /* The status register is Read Only, so a write should fail.
784 * Some bits that get toggled are ignored.
785 */
786 switch (adapter->hw.mac_type) {
787 /* there are several bits on newer hardware that are r/w */
788 case e1000_82571:
789 case e1000_82572:
790 case e1000_80003es2lan:
791 toggle = 0x7FFFF3FF;
792 break;
793 case e1000_82573:
794 case e1000_ich8lan:
795 toggle = 0x7FFFF033;
796 break;
797 default:
798 toggle = 0xFFFFF833;
799 break;
800 }
801
802 before = E1000_READ_REG(&adapter->hw, STATUS);
803 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
804 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
805 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
806 if (value != after) {
807 DPRINTK(DRV, ERR, "failed STATUS register test got: "
808 "0x%08X expected: 0x%08X\n", after, value);
809 *data = 1;
810 return 1;
811 }
812 /* restore previous status */
813 E1000_WRITE_REG(&adapter->hw, STATUS, before);
814
815 if (adapter->hw.mac_type != e1000_ich8lan) {
816 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
817 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
818 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
819 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
820 }
821
822 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
823 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
824 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
825 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
826 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
827 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
828 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
829 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
830 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
831 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
832
833 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
834
835 before = (adapter->hw.mac_type == e1000_ich8lan ?
836 0x06C3B33E : 0x06DFB3FE);
837 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
838 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
839
840 if (adapter->hw.mac_type >= e1000_82543) {
841
842 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
843 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
844 if (adapter->hw.mac_type != e1000_ich8lan)
845 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
846 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
847 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
848 value = (adapter->hw.mac_type == e1000_ich8lan ?
849 E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
850 for (i = 0; i < value; i++) {
851 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
852 0xFFFFFFFF);
853 }
854
855 } else {
856
857 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
858 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
859 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
860 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
861
862 }
863
864 value = (adapter->hw.mac_type == e1000_ich8lan ?
865 E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
866 for (i = 0; i < value; i++)
867 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
868
869 *data = 0;
870 return 0;
871 }
872
873 static int
874 e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
875 {
876 uint16_t temp;
877 uint16_t checksum = 0;
878 uint16_t i;
879
880 *data = 0;
881 /* Read and add up the contents of the EEPROM */
882 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
883 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
884 *data = 1;
885 break;
886 }
887 checksum += temp;
888 }
889
890 /* If Checksum is not Correct return error else test passed */
891 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
892 *data = 2;
893
894 return *data;
895 }
896
897 static irqreturn_t
898 e1000_test_intr(int irq, void *data)
899 {
900 struct net_device *netdev = (struct net_device *) data;
901 struct e1000_adapter *adapter = netdev_priv(netdev);
902
903 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
904
905 return IRQ_HANDLED;
906 }
907
908 static int
909 e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
910 {
911 struct net_device *netdev = adapter->netdev;
912 uint32_t mask, i=0, shared_int = TRUE;
913 uint32_t irq = adapter->pdev->irq;
914
915 *data = 0;
916
917 /* NOTE: we don't test MSI interrupts here, yet */
918 /* Hook up test interrupt handler just for this test */
919 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
920 netdev))
921 shared_int = FALSE;
922 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
923 netdev->name, netdev)) {
924 *data = 1;
925 return -1;
926 }
927 DPRINTK(HW, INFO, "testing %s interrupt\n",
928 (shared_int ? "shared" : "unshared"));
929
930 /* Disable all the interrupts */
931 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
932 msleep(10);
933
934 /* Test each interrupt */
935 for (; i < 10; i++) {
936
937 if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
938 continue;
939
940 /* Interrupt to test */
941 mask = 1 << i;
942
943 if (!shared_int) {
944 /* Disable the interrupt to be reported in
945 * the cause register and then force the same
946 * interrupt and see if one gets posted. If
947 * an interrupt was posted to the bus, the
948 * test failed.
949 */
950 adapter->test_icr = 0;
951 E1000_WRITE_REG(&adapter->hw, IMC, mask);
952 E1000_WRITE_REG(&adapter->hw, ICS, mask);
953 msleep(10);
954
955 if (adapter->test_icr & mask) {
956 *data = 3;
957 break;
958 }
959 }
960
961 /* Enable the interrupt to be reported in
962 * the cause register and then force the same
963 * interrupt and see if one gets posted. If
964 * an interrupt was not posted to the bus, the
965 * test failed.
966 */
967 adapter->test_icr = 0;
968 E1000_WRITE_REG(&adapter->hw, IMS, mask);
969 E1000_WRITE_REG(&adapter->hw, ICS, mask);
970 msleep(10);
971
972 if (!(adapter->test_icr & mask)) {
973 *data = 4;
974 break;
975 }
976
977 if (!shared_int) {
978 /* Disable the other interrupts to be reported in
979 * the cause register and then force the other
980 * interrupts and see if any get posted. If
981 * an interrupt was posted to the bus, the
982 * test failed.
983 */
984 adapter->test_icr = 0;
985 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
986 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
987 msleep(10);
988
989 if (adapter->test_icr) {
990 *data = 5;
991 break;
992 }
993 }
994 }
995
996 /* Disable all the interrupts */
997 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
998 msleep(10);
999
1000 /* Unhook test interrupt handler */
1001 free_irq(irq, netdev);
1002
1003 return *data;
1004 }
1005
1006 static void
1007 e1000_free_desc_rings(struct e1000_adapter *adapter)
1008 {
1009 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1010 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1011 struct pci_dev *pdev = adapter->pdev;
1012 int i;
1013
1014 if (txdr->desc && txdr->buffer_info) {
1015 for (i = 0; i < txdr->count; i++) {
1016 if (txdr->buffer_info[i].dma)
1017 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
1018 txdr->buffer_info[i].length,
1019 PCI_DMA_TODEVICE);
1020 if (txdr->buffer_info[i].skb)
1021 dev_kfree_skb(txdr->buffer_info[i].skb);
1022 }
1023 }
1024
1025 if (rxdr->desc && rxdr->buffer_info) {
1026 for (i = 0; i < rxdr->count; i++) {
1027 if (rxdr->buffer_info[i].dma)
1028 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
1029 rxdr->buffer_info[i].length,
1030 PCI_DMA_FROMDEVICE);
1031 if (rxdr->buffer_info[i].skb)
1032 dev_kfree_skb(rxdr->buffer_info[i].skb);
1033 }
1034 }
1035
1036 if (txdr->desc) {
1037 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
1038 txdr->desc = NULL;
1039 }
1040 if (rxdr->desc) {
1041 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
1042 rxdr->desc = NULL;
1043 }
1044
1045 kfree(txdr->buffer_info);
1046 txdr->buffer_info = NULL;
1047 kfree(rxdr->buffer_info);
1048 rxdr->buffer_info = NULL;
1049
1050 return;
1051 }
1052
1053 static int
1054 e1000_setup_desc_rings(struct e1000_adapter *adapter)
1055 {
1056 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1057 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1058 struct pci_dev *pdev = adapter->pdev;
1059 uint32_t rctl;
1060 int size, i, ret_val;
1061
1062 /* Setup Tx descriptor ring and Tx buffers */
1063
1064 if (!txdr->count)
1065 txdr->count = E1000_DEFAULT_TXD;
1066
1067 size = txdr->count * sizeof(struct e1000_buffer);
1068 if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1069 ret_val = 1;
1070 goto err_nomem;
1071 }
1072 memset(txdr->buffer_info, 0, size);
1073
1074 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1075 E1000_ROUNDUP(txdr->size, 4096);
1076 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1077 ret_val = 2;
1078 goto err_nomem;
1079 }
1080 memset(txdr->desc, 0, txdr->size);
1081 txdr->next_to_use = txdr->next_to_clean = 0;
1082
1083 E1000_WRITE_REG(&adapter->hw, TDBAL,
1084 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1085 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1086 E1000_WRITE_REG(&adapter->hw, TDLEN,
1087 txdr->count * sizeof(struct e1000_tx_desc));
1088 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1089 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1090 E1000_WRITE_REG(&adapter->hw, TCTL,
1091 E1000_TCTL_PSP | E1000_TCTL_EN |
1092 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1093 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1094
1095 for (i = 0; i < txdr->count; i++) {
1096 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1097 struct sk_buff *skb;
1098 unsigned int size = 1024;
1099
1100 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1101 ret_val = 3;
1102 goto err_nomem;
1103 }
1104 skb_put(skb, size);
1105 txdr->buffer_info[i].skb = skb;
1106 txdr->buffer_info[i].length = skb->len;
1107 txdr->buffer_info[i].dma =
1108 pci_map_single(pdev, skb->data, skb->len,
1109 PCI_DMA_TODEVICE);
1110 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1111 tx_desc->lower.data = cpu_to_le32(skb->len);
1112 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1113 E1000_TXD_CMD_IFCS |
1114 E1000_TXD_CMD_RPS);
1115 tx_desc->upper.data = 0;
1116 }
1117
1118 /* Setup Rx descriptor ring and Rx buffers */
1119
1120 if (!rxdr->count)
1121 rxdr->count = E1000_DEFAULT_RXD;
1122
1123 size = rxdr->count * sizeof(struct e1000_buffer);
1124 if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1125 ret_val = 4;
1126 goto err_nomem;
1127 }
1128 memset(rxdr->buffer_info, 0, size);
1129
1130 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
1131 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1132 ret_val = 5;
1133 goto err_nomem;
1134 }
1135 memset(rxdr->desc, 0, rxdr->size);
1136 rxdr->next_to_use = rxdr->next_to_clean = 0;
1137
1138 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1139 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1140 E1000_WRITE_REG(&adapter->hw, RDBAL,
1141 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1142 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1143 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1144 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1145 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1146 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1147 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1148 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1149 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1150
1151 for (i = 0; i < rxdr->count; i++) {
1152 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1153 struct sk_buff *skb;
1154
1155 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1156 GFP_KERNEL))) {
1157 ret_val = 6;
1158 goto err_nomem;
1159 }
1160 skb_reserve(skb, NET_IP_ALIGN);
1161 rxdr->buffer_info[i].skb = skb;
1162 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1163 rxdr->buffer_info[i].dma =
1164 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1165 PCI_DMA_FROMDEVICE);
1166 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1167 memset(skb->data, 0x00, skb->len);
1168 }
1169
1170 return 0;
1171
1172 err_nomem:
1173 e1000_free_desc_rings(adapter);
1174 return ret_val;
1175 }
1176
1177 static void
1178 e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1179 {
1180 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1181 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1182 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1183 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1184 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1185 }
1186
1187 static void
1188 e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1189 {
1190 uint16_t phy_reg;
1191
1192 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1193 * Extended PHY Specific Control Register to 25MHz clock. This
1194 * value defaults back to a 2.5MHz clock when the PHY is reset.
1195 */
1196 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1197 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1198 e1000_write_phy_reg(&adapter->hw,
1199 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1200
1201 /* In addition, because of the s/w reset above, we need to enable
1202 * CRS on TX. This must be set for both full and half duplex
1203 * operation.
1204 */
1205 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1206 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1207 e1000_write_phy_reg(&adapter->hw,
1208 M88E1000_PHY_SPEC_CTRL, phy_reg);
1209 }
1210
1211 static int
1212 e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1213 {
1214 uint32_t ctrl_reg;
1215 uint16_t phy_reg;
1216
1217 /* Setup the Device Control Register for PHY loopback test. */
1218
1219 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1220 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1221 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1222 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1223 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1224 E1000_CTRL_FD); /* Force Duplex to FULL */
1225
1226 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1227
1228 /* Read the PHY Specific Control Register (0x10) */
1229 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1230
1231 /* Clear Auto-Crossover bits in PHY Specific Control Register
1232 * (bits 6:5).
1233 */
1234 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1235 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1236
1237 /* Perform software reset on the PHY */
1238 e1000_phy_reset(&adapter->hw);
1239
1240 /* Have to setup TX_CLK and TX_CRS after software reset */
1241 e1000_phy_reset_clk_and_crs(adapter);
1242
1243 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1244
1245 /* Wait for reset to complete. */
1246 udelay(500);
1247
1248 /* Have to setup TX_CLK and TX_CRS after software reset */
1249 e1000_phy_reset_clk_and_crs(adapter);
1250
1251 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1252 e1000_phy_disable_receiver(adapter);
1253
1254 /* Set the loopback bit in the PHY control register. */
1255 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1256 phy_reg |= MII_CR_LOOPBACK;
1257 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1258
1259 /* Setup TX_CLK and TX_CRS one more time. */
1260 e1000_phy_reset_clk_and_crs(adapter);
1261
1262 /* Check Phy Configuration */
1263 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1264 if (phy_reg != 0x4100)
1265 return 9;
1266
1267 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1268 if (phy_reg != 0x0070)
1269 return 10;
1270
1271 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
1272 if (phy_reg != 0x001A)
1273 return 11;
1274
1275 return 0;
1276 }
1277
1278 static int
1279 e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1280 {
1281 uint32_t ctrl_reg = 0;
1282 uint32_t stat_reg = 0;
1283
1284 adapter->hw.autoneg = FALSE;
1285
1286 if (adapter->hw.phy_type == e1000_phy_m88) {
1287 /* Auto-MDI/MDIX Off */
1288 e1000_write_phy_reg(&adapter->hw,
1289 M88E1000_PHY_SPEC_CTRL, 0x0808);
1290 /* reset to update Auto-MDI/MDIX */
1291 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1292 /* autoneg off */
1293 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1294 } else if (adapter->hw.phy_type == e1000_phy_gg82563)
1295 e1000_write_phy_reg(&adapter->hw,
1296 GG82563_PHY_KMRN_MODE_CTRL,
1297 0x1CC);
1298
1299 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1300
1301 if (adapter->hw.phy_type == e1000_phy_ife) {
1302 /* force 100, set loopback */
1303 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
1304
1305 /* Now set up the MAC to the same speed/duplex as the PHY. */
1306 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1307 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1308 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1309 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1310 E1000_CTRL_FD); /* Force Duplex to FULL */
1311 } else {
1312 /* force 1000, set loopback */
1313 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1314
1315 /* Now set up the MAC to the same speed/duplex as the PHY. */
1316 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1317 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1318 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1319 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1320 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1321 E1000_CTRL_FD); /* Force Duplex to FULL */
1322 }
1323
1324 if (adapter->hw.media_type == e1000_media_type_copper &&
1325 adapter->hw.phy_type == e1000_phy_m88)
1326 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1327 else {
1328 /* Set the ILOS bit on the fiber Nic is half
1329 * duplex link is detected. */
1330 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
1331 if ((stat_reg & E1000_STATUS_FD) == 0)
1332 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1333 }
1334
1335 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1336
1337 /* Disable the receiver on the PHY so when a cable is plugged in, the
1338 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1339 */
1340 if (adapter->hw.phy_type == e1000_phy_m88)
1341 e1000_phy_disable_receiver(adapter);
1342
1343 udelay(500);
1344
1345 return 0;
1346 }
1347
1348 static int
1349 e1000_set_phy_loopback(struct e1000_adapter *adapter)
1350 {
1351 uint16_t phy_reg = 0;
1352 uint16_t count = 0;
1353
1354 switch (adapter->hw.mac_type) {
1355 case e1000_82543:
1356 if (adapter->hw.media_type == e1000_media_type_copper) {
1357 /* Attempt to setup Loopback mode on Non-integrated PHY.
1358 * Some PHY registers get corrupted at random, so
1359 * attempt this 10 times.
1360 */
1361 while (e1000_nonintegrated_phy_loopback(adapter) &&
1362 count++ < 10);
1363 if (count < 11)
1364 return 0;
1365 }
1366 break;
1367
1368 case e1000_82544:
1369 case e1000_82540:
1370 case e1000_82545:
1371 case e1000_82545_rev_3:
1372 case e1000_82546:
1373 case e1000_82546_rev_3:
1374 case e1000_82541:
1375 case e1000_82541_rev_2:
1376 case e1000_82547:
1377 case e1000_82547_rev_2:
1378 case e1000_82571:
1379 case e1000_82572:
1380 case e1000_82573:
1381 case e1000_80003es2lan:
1382 case e1000_ich8lan:
1383 return e1000_integrated_phy_loopback(adapter);
1384 break;
1385
1386 default:
1387 /* Default PHY loopback work is to read the MII
1388 * control register and assert bit 14 (loopback mode).
1389 */
1390 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1391 phy_reg |= MII_CR_LOOPBACK;
1392 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1393 return 0;
1394 break;
1395 }
1396
1397 return 8;
1398 }
1399
1400 static int
1401 e1000_setup_loopback_test(struct e1000_adapter *adapter)
1402 {
1403 struct e1000_hw *hw = &adapter->hw;
1404 uint32_t rctl;
1405
1406 if (hw->media_type == e1000_media_type_fiber ||
1407 hw->media_type == e1000_media_type_internal_serdes) {
1408 switch (hw->mac_type) {
1409 case e1000_82545:
1410 case e1000_82546:
1411 case e1000_82545_rev_3:
1412 case e1000_82546_rev_3:
1413 return e1000_set_phy_loopback(adapter);
1414 break;
1415 case e1000_82571:
1416 case e1000_82572:
1417 #define E1000_SERDES_LB_ON 0x410
1418 e1000_set_phy_loopback(adapter);
1419 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1420 msleep(10);
1421 return 0;
1422 break;
1423 default:
1424 rctl = E1000_READ_REG(hw, RCTL);
1425 rctl |= E1000_RCTL_LBM_TCVR;
1426 E1000_WRITE_REG(hw, RCTL, rctl);
1427 return 0;
1428 }
1429 } else if (hw->media_type == e1000_media_type_copper)
1430 return e1000_set_phy_loopback(adapter);
1431
1432 return 7;
1433 }
1434
1435 static void
1436 e1000_loopback_cleanup(struct e1000_adapter *adapter)
1437 {
1438 struct e1000_hw *hw = &adapter->hw;
1439 uint32_t rctl;
1440 uint16_t phy_reg;
1441
1442 rctl = E1000_READ_REG(hw, RCTL);
1443 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1444 E1000_WRITE_REG(hw, RCTL, rctl);
1445
1446 switch (hw->mac_type) {
1447 case e1000_82571:
1448 case e1000_82572:
1449 if (hw->media_type == e1000_media_type_fiber ||
1450 hw->media_type == e1000_media_type_internal_serdes) {
1451 #define E1000_SERDES_LB_OFF 0x400
1452 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1453 msleep(10);
1454 break;
1455 }
1456 /* Fall Through */
1457 case e1000_82545:
1458 case e1000_82546:
1459 case e1000_82545_rev_3:
1460 case e1000_82546_rev_3:
1461 default:
1462 hw->autoneg = TRUE;
1463 if (hw->phy_type == e1000_phy_gg82563)
1464 e1000_write_phy_reg(hw,
1465 GG82563_PHY_KMRN_MODE_CTRL,
1466 0x180);
1467 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1468 if (phy_reg & MII_CR_LOOPBACK) {
1469 phy_reg &= ~MII_CR_LOOPBACK;
1470 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1471 e1000_phy_reset(hw);
1472 }
1473 break;
1474 }
1475 }
1476
1477 static void
1478 e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1479 {
1480 memset(skb->data, 0xFF, frame_size);
1481 frame_size &= ~1;
1482 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1483 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1484 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1485 }
1486
1487 static int
1488 e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1489 {
1490 frame_size &= ~1;
1491 if (*(skb->data + 3) == 0xFF) {
1492 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1493 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1494 return 0;
1495 }
1496 }
1497 return 13;
1498 }
1499
1500 static int
1501 e1000_run_loopback_test(struct e1000_adapter *adapter)
1502 {
1503 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1504 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1505 struct pci_dev *pdev = adapter->pdev;
1506 int i, j, k, l, lc, good_cnt, ret_val=0;
1507 unsigned long time;
1508
1509 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1510
1511 /* Calculate the loop count based on the largest descriptor ring
1512 * The idea is to wrap the largest ring a number of times using 64
1513 * send/receive pairs during each loop
1514 */
1515
1516 if (rxdr->count <= txdr->count)
1517 lc = ((txdr->count / 64) * 2) + 1;
1518 else
1519 lc = ((rxdr->count / 64) * 2) + 1;
1520
1521 k = l = 0;
1522 for (j = 0; j <= lc; j++) { /* loop count loop */
1523 for (i = 0; i < 64; i++) { /* send the packets */
1524 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1525 1024);
1526 pci_dma_sync_single_for_device(pdev,
1527 txdr->buffer_info[k].dma,
1528 txdr->buffer_info[k].length,
1529 PCI_DMA_TODEVICE);
1530 if (unlikely(++k == txdr->count)) k = 0;
1531 }
1532 E1000_WRITE_REG(&adapter->hw, TDT, k);
1533 msleep(200);
1534 time = jiffies; /* set the start time for the receive */
1535 good_cnt = 0;
1536 do { /* receive the sent packets */
1537 pci_dma_sync_single_for_cpu(pdev,
1538 rxdr->buffer_info[l].dma,
1539 rxdr->buffer_info[l].length,
1540 PCI_DMA_FROMDEVICE);
1541
1542 ret_val = e1000_check_lbtest_frame(
1543 rxdr->buffer_info[l].skb,
1544 1024);
1545 if (!ret_val)
1546 good_cnt++;
1547 if (unlikely(++l == rxdr->count)) l = 0;
1548 /* time + 20 msecs (200 msecs on 2.4) is more than
1549 * enough time to complete the receives, if it's
1550 * exceeded, break and error off
1551 */
1552 } while (good_cnt < 64 && jiffies < (time + 20));
1553 if (good_cnt != 64) {
1554 ret_val = 13; /* ret_val is the same as mis-compare */
1555 break;
1556 }
1557 if (jiffies >= (time + 2)) {
1558 ret_val = 14; /* error code for time out error */
1559 break;
1560 }
1561 } /* end loop count loop */
1562 return ret_val;
1563 }
1564
1565 static int
1566 e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1567 {
1568 /* PHY loopback cannot be performed if SoL/IDER
1569 * sessions are active */
1570 if (e1000_check_phy_reset_block(&adapter->hw)) {
1571 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1572 "when SoL/IDER is active.\n");
1573 *data = 0;
1574 goto out;
1575 }
1576
1577 if ((*data = e1000_setup_desc_rings(adapter)))
1578 goto out;
1579 if ((*data = e1000_setup_loopback_test(adapter)))
1580 goto err_loopback;
1581 *data = e1000_run_loopback_test(adapter);
1582 e1000_loopback_cleanup(adapter);
1583
1584 err_loopback:
1585 e1000_free_desc_rings(adapter);
1586 out:
1587 return *data;
1588 }
1589
1590 static int
1591 e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1592 {
1593 *data = 0;
1594 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1595 int i = 0;
1596 adapter->hw.serdes_link_down = TRUE;
1597
1598 /* On some blade server designs, link establishment
1599 * could take as long as 2-3 minutes */
1600 do {
1601 e1000_check_for_link(&adapter->hw);
1602 if (adapter->hw.serdes_link_down == FALSE)
1603 return *data;
1604 msleep(20);
1605 } while (i++ < 3750);
1606
1607 *data = 1;
1608 } else {
1609 e1000_check_for_link(&adapter->hw);
1610 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
1611 msleep(4000);
1612
1613 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1614 *data = 1;
1615 }
1616 }
1617 return *data;
1618 }
1619
1620 static int
1621 e1000_diag_test_count(struct net_device *netdev)
1622 {
1623 return E1000_TEST_LEN;
1624 }
1625
1626 extern void e1000_power_up_phy(struct e1000_adapter *);
1627
1628 static void
1629 e1000_diag_test(struct net_device *netdev,
1630 struct ethtool_test *eth_test, uint64_t *data)
1631 {
1632 struct e1000_adapter *adapter = netdev_priv(netdev);
1633 boolean_t if_running = netif_running(netdev);
1634
1635 set_bit(__E1000_TESTING, &adapter->flags);
1636 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1637 /* Offline tests */
1638
1639 /* save speed, duplex, autoneg settings */
1640 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1641 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1642 uint8_t autoneg = adapter->hw.autoneg;
1643
1644 DPRINTK(HW, INFO, "offline testing starting\n");
1645
1646 /* Link test performed before hardware reset so autoneg doesn't
1647 * interfere with test result */
1648 if (e1000_link_test(adapter, &data[4]))
1649 eth_test->flags |= ETH_TEST_FL_FAILED;
1650
1651 if (if_running)
1652 /* indicate we're in test mode */
1653 dev_close(netdev);
1654 else
1655 e1000_reset(adapter);
1656
1657 if (e1000_reg_test(adapter, &data[0]))
1658 eth_test->flags |= ETH_TEST_FL_FAILED;
1659
1660 e1000_reset(adapter);
1661 if (e1000_eeprom_test(adapter, &data[1]))
1662 eth_test->flags |= ETH_TEST_FL_FAILED;
1663
1664 e1000_reset(adapter);
1665 if (e1000_intr_test(adapter, &data[2]))
1666 eth_test->flags |= ETH_TEST_FL_FAILED;
1667
1668 e1000_reset(adapter);
1669 /* make sure the phy is powered up */
1670 e1000_power_up_phy(adapter);
1671 if (e1000_loopback_test(adapter, &data[3]))
1672 eth_test->flags |= ETH_TEST_FL_FAILED;
1673
1674 /* restore speed, duplex, autoneg settings */
1675 adapter->hw.autoneg_advertised = autoneg_advertised;
1676 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1677 adapter->hw.autoneg = autoneg;
1678
1679 e1000_reset(adapter);
1680 clear_bit(__E1000_TESTING, &adapter->flags);
1681 if (if_running)
1682 dev_open(netdev);
1683 } else {
1684 DPRINTK(HW, INFO, "online testing starting\n");
1685 /* Online tests */
1686 if (e1000_link_test(adapter, &data[4]))
1687 eth_test->flags |= ETH_TEST_FL_FAILED;
1688
1689 /* Online tests aren't run; pass by default */
1690 data[0] = 0;
1691 data[1] = 0;
1692 data[2] = 0;
1693 data[3] = 0;
1694
1695 clear_bit(__E1000_TESTING, &adapter->flags);
1696 }
1697 msleep_interruptible(4 * 1000);
1698 }
1699
1700 static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1701 {
1702 struct e1000_hw *hw = &adapter->hw;
1703 int retval = 1; /* fail by default */
1704
1705 switch (hw->device_id) {
1706 case E1000_DEV_ID_82542:
1707 case E1000_DEV_ID_82543GC_FIBER:
1708 case E1000_DEV_ID_82543GC_COPPER:
1709 case E1000_DEV_ID_82544EI_FIBER:
1710 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1711 case E1000_DEV_ID_82545EM_FIBER:
1712 case E1000_DEV_ID_82545EM_COPPER:
1713 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1714 case E1000_DEV_ID_82546GB_PCIE:
1715 /* these don't support WoL at all */
1716 wol->supported = 0;
1717 break;
1718 case E1000_DEV_ID_82546EB_FIBER:
1719 case E1000_DEV_ID_82546GB_FIBER:
1720 case E1000_DEV_ID_82571EB_FIBER:
1721 case E1000_DEV_ID_82571EB_SERDES:
1722 case E1000_DEV_ID_82571EB_COPPER:
1723 /* Wake events not supported on port B */
1724 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1725 wol->supported = 0;
1726 break;
1727 }
1728 /* return success for non excluded adapter ports */
1729 retval = 0;
1730 break;
1731 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1732 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1733 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1734 /* quad port adapters only support WoL on port A */
1735 if (!adapter->quad_port_a) {
1736 wol->supported = 0;
1737 break;
1738 }
1739 /* return success for non excluded adapter ports */
1740 retval = 0;
1741 break;
1742 default:
1743 /* dual port cards only support WoL on port A from now on
1744 * unless it was enabled in the eeprom for port B
1745 * so exclude FUNC_1 ports from having WoL enabled */
1746 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
1747 !adapter->eeprom_wol) {
1748 wol->supported = 0;
1749 break;
1750 }
1751
1752 retval = 0;
1753 }
1754
1755 return retval;
1756 }
1757
1758 static void
1759 e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1760 {
1761 struct e1000_adapter *adapter = netdev_priv(netdev);
1762
1763 wol->supported = WAKE_UCAST | WAKE_MCAST |
1764 WAKE_BCAST | WAKE_MAGIC;
1765 wol->wolopts = 0;
1766
1767 /* this function will set ->supported = 0 and return 1 if wol is not
1768 * supported by this hardware */
1769 if (e1000_wol_exclusion(adapter, wol))
1770 return;
1771
1772 /* apply any specific unsupported masks here */
1773 switch (adapter->hw.device_id) {
1774 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1775 /* KSP3 does not suppport UCAST wake-ups */
1776 wol->supported &= ~WAKE_UCAST;
1777
1778 if (adapter->wol & E1000_WUFC_EX)
1779 DPRINTK(DRV, ERR, "Interface does not support "
1780 "directed (unicast) frame wake-up packets\n");
1781 break;
1782 default:
1783 break;
1784 }
1785
1786 if (adapter->wol & E1000_WUFC_EX)
1787 wol->wolopts |= WAKE_UCAST;
1788 if (adapter->wol & E1000_WUFC_MC)
1789 wol->wolopts |= WAKE_MCAST;
1790 if (adapter->wol & E1000_WUFC_BC)
1791 wol->wolopts |= WAKE_BCAST;
1792 if (adapter->wol & E1000_WUFC_MAG)
1793 wol->wolopts |= WAKE_MAGIC;
1794
1795 return;
1796 }
1797
1798 static int
1799 e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1800 {
1801 struct e1000_adapter *adapter = netdev_priv(netdev);
1802 struct e1000_hw *hw = &adapter->hw;
1803
1804 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1805 return -EOPNOTSUPP;
1806
1807 if (e1000_wol_exclusion(adapter, wol))
1808 return wol->wolopts ? -EOPNOTSUPP : 0;
1809
1810 switch (hw->device_id) {
1811 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1812 if (wol->wolopts & WAKE_UCAST) {
1813 DPRINTK(DRV, ERR, "Interface does not support "
1814 "directed (unicast) frame wake-up packets\n");
1815 return -EOPNOTSUPP;
1816 }
1817 break;
1818 default:
1819 break;
1820 }
1821
1822 /* these settings will always override what we currently have */
1823 adapter->wol = 0;
1824
1825 if (wol->wolopts & WAKE_UCAST)
1826 adapter->wol |= E1000_WUFC_EX;
1827 if (wol->wolopts & WAKE_MCAST)
1828 adapter->wol |= E1000_WUFC_MC;
1829 if (wol->wolopts & WAKE_BCAST)
1830 adapter->wol |= E1000_WUFC_BC;
1831 if (wol->wolopts & WAKE_MAGIC)
1832 adapter->wol |= E1000_WUFC_MAG;
1833
1834 return 0;
1835 }
1836
1837 /* toggle LED 4 times per second = 2 "blinks" per second */
1838 #define E1000_ID_INTERVAL (HZ/4)
1839
1840 /* bit defines for adapter->led_status */
1841 #define E1000_LED_ON 0
1842
1843 static void
1844 e1000_led_blink_callback(unsigned long data)
1845 {
1846 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1847
1848 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1849 e1000_led_off(&adapter->hw);
1850 else
1851 e1000_led_on(&adapter->hw);
1852
1853 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1854 }
1855
1856 static int
1857 e1000_phys_id(struct net_device *netdev, uint32_t data)
1858 {
1859 struct e1000_adapter *adapter = netdev_priv(netdev);
1860
1861 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1862 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1863
1864 if (adapter->hw.mac_type < e1000_82571) {
1865 if (!adapter->blink_timer.function) {
1866 init_timer(&adapter->blink_timer);
1867 adapter->blink_timer.function = e1000_led_blink_callback;
1868 adapter->blink_timer.data = (unsigned long) adapter;
1869 }
1870 e1000_setup_led(&adapter->hw);
1871 mod_timer(&adapter->blink_timer, jiffies);
1872 msleep_interruptible(data * 1000);
1873 del_timer_sync(&adapter->blink_timer);
1874 } else if (adapter->hw.phy_type == e1000_phy_ife) {
1875 if (!adapter->blink_timer.function) {
1876 init_timer(&adapter->blink_timer);
1877 adapter->blink_timer.function = e1000_led_blink_callback;
1878 adapter->blink_timer.data = (unsigned long) adapter;
1879 }
1880 mod_timer(&adapter->blink_timer, jiffies);
1881 msleep_interruptible(data * 1000);
1882 del_timer_sync(&adapter->blink_timer);
1883 e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
1884 } else {
1885 e1000_blink_led_start(&adapter->hw);
1886 msleep_interruptible(data * 1000);
1887 }
1888
1889 e1000_led_off(&adapter->hw);
1890 clear_bit(E1000_LED_ON, &adapter->led_status);
1891 e1000_cleanup_led(&adapter->hw);
1892
1893 return 0;
1894 }
1895
1896 static int
1897 e1000_nway_reset(struct net_device *netdev)
1898 {
1899 struct e1000_adapter *adapter = netdev_priv(netdev);
1900 if (netif_running(netdev))
1901 e1000_reinit_locked(adapter);
1902 return 0;
1903 }
1904
1905 static int
1906 e1000_get_stats_count(struct net_device *netdev)
1907 {
1908 return E1000_STATS_LEN;
1909 }
1910
1911 static void
1912 e1000_get_ethtool_stats(struct net_device *netdev,
1913 struct ethtool_stats *stats, uint64_t *data)
1914 {
1915 struct e1000_adapter *adapter = netdev_priv(netdev);
1916 int i;
1917
1918 e1000_update_stats(adapter);
1919 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1920 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1921 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1922 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1923 }
1924 /* BUG_ON(i != E1000_STATS_LEN); */
1925 }
1926
1927 static void
1928 e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1929 {
1930 uint8_t *p = data;
1931 int i;
1932
1933 switch (stringset) {
1934 case ETH_SS_TEST:
1935 memcpy(data, *e1000_gstrings_test,
1936 E1000_TEST_LEN*ETH_GSTRING_LEN);
1937 break;
1938 case ETH_SS_STATS:
1939 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1940 memcpy(p, e1000_gstrings_stats[i].stat_string,
1941 ETH_GSTRING_LEN);
1942 p += ETH_GSTRING_LEN;
1943 }
1944 /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1945 break;
1946 }
1947 }
1948
1949 static const struct ethtool_ops e1000_ethtool_ops = {
1950 .get_settings = e1000_get_settings,
1951 .set_settings = e1000_set_settings,
1952 .get_drvinfo = e1000_get_drvinfo,
1953 .get_regs_len = e1000_get_regs_len,
1954 .get_regs = e1000_get_regs,
1955 .get_wol = e1000_get_wol,
1956 .set_wol = e1000_set_wol,
1957 .get_msglevel = e1000_get_msglevel,
1958 .set_msglevel = e1000_set_msglevel,
1959 .nway_reset = e1000_nway_reset,
1960 .get_link = ethtool_op_get_link,
1961 .get_eeprom_len = e1000_get_eeprom_len,
1962 .get_eeprom = e1000_get_eeprom,
1963 .set_eeprom = e1000_set_eeprom,
1964 .get_ringparam = e1000_get_ringparam,
1965 .set_ringparam = e1000_set_ringparam,
1966 .get_pauseparam = e1000_get_pauseparam,
1967 .set_pauseparam = e1000_set_pauseparam,
1968 .get_rx_csum = e1000_get_rx_csum,
1969 .set_rx_csum = e1000_set_rx_csum,
1970 .get_tx_csum = e1000_get_tx_csum,
1971 .set_tx_csum = e1000_set_tx_csum,
1972 .get_sg = ethtool_op_get_sg,
1973 .set_sg = ethtool_op_set_sg,
1974 #ifdef NETIF_F_TSO
1975 .get_tso = ethtool_op_get_tso,
1976 .set_tso = e1000_set_tso,
1977 #endif
1978 .self_test_count = e1000_diag_test_count,
1979 .self_test = e1000_diag_test,
1980 .get_strings = e1000_get_strings,
1981 .phys_id = e1000_phys_id,
1982 .get_stats_count = e1000_get_stats_count,
1983 .get_ethtool_stats = e1000_get_ethtool_stats,
1984 .get_perm_addr = ethtool_op_get_perm_addr,
1985 };
1986
1987 void e1000_set_ethtool_ops(struct net_device *netdev)
1988 {
1989 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1990 }
Linux with added FPC-III support