2 * Freescale Ethernet controllers
4 * Copyright (c) 2005 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
7 * 2005 (c) MontaVista Software, Inc.
8 * Vitaly Bordug <vbordug@ru.mvista.com>
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/types.h>
18 #include <linux/sched.h>
19 #include <linux/string.h>
20 #include <linux/ptrace.h>
21 #include <linux/errno.h>
22 #include <linux/ioport.h>
23 #include <linux/slab.h>
24 #include <linux/interrupt.h>
25 #include <linux/pci.h>
26 #include <linux/init.h>
27 #include <linux/delay.h>
28 #include <linux/netdevice.h>
29 #include <linux/etherdevice.h>
30 #include <linux/skbuff.h>
31 #include <linux/spinlock.h>
32 #include <linux/mii.h>
33 #include <linux/ethtool.h>
34 #include <linux/bitops.h>
36 #include <linux/platform_device.h>
39 #include <asm/uaccess.h>
42 #include <asm/8xx_immap.h>
43 #include <asm/pgtable.h>
44 #include <asm/mpc8xx.h>
45 #include <asm/commproc.h>
51 /*************************************************/
53 #if defined(CONFIG_CPM1)
54 /* for a CPM1 __raw_xxx's are sufficient */
55 #define __fs_out32(addr, x) __raw_writel(x, addr)
56 #define __fs_out16(addr, x) __raw_writew(x, addr)
57 #define __fs_in32(addr) __raw_readl(addr)
58 #define __fs_in16(addr) __raw_readw(addr)
60 /* for others play it safe */
61 #define __fs_out32(addr, x) out_be32(addr, x)
62 #define __fs_out16(addr, x) out_be16(addr, x)
63 #define __fs_in32(addr) in_be32(addr)
64 #define __fs_in16(addr) in_be16(addr)
68 #define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v))
71 #define FR(_fecp, _reg) __fs_in32(&(_fecp)->fec_ ## _reg)
74 #define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
77 #define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
80 * Delay to wait for FEC reset command to complete (in us)
82 #define FEC_RESET_DELAY 50
84 static int whack_reset(fec_t
* fecp
)
88 FW(fecp
, ecntrl
, FEC_ECNTRL_PINMUX
| FEC_ECNTRL_RESET
);
89 for (i
= 0; i
< FEC_RESET_DELAY
; i
++) {
90 if ((FR(fecp
, ecntrl
) & FEC_ECNTRL_RESET
) == 0)
98 static int do_pd_setup(struct fs_enet_private
*fep
)
100 struct platform_device
*pdev
= to_platform_device(fep
->dev
);
103 /* Fill out IRQ field */
104 fep
->interrupt
= platform_get_irq_byname(pdev
,"interrupt");
105 if (fep
->interrupt
< 0)
108 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "regs");
109 fep
->fec
.fecp
= ioremap(r
->start
, r
->end
- r
->start
+ 1);
111 if(fep
->fec
.fecp
== NULL
)
118 #define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF | FEC_ENET_RXB)
119 #define FEC_RX_EVENT (FEC_ENET_RXF)
120 #define FEC_TX_EVENT (FEC_ENET_TXF)
121 #define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR | FEC_ENET_BABR | \
122 FEC_ENET_BABT | FEC_ENET_EBERR)
124 static int setup_data(struct net_device
*dev
)
126 struct fs_enet_private
*fep
= netdev_priv(dev
);
128 if (do_pd_setup(fep
) != 0)
134 fep
->ev_napi_rx
= FEC_NAPI_RX_EVENT_MSK
;
135 fep
->ev_rx
= FEC_RX_EVENT
;
136 fep
->ev_tx
= FEC_TX_EVENT
;
137 fep
->ev_err
= FEC_ERR_EVENT_MSK
;
142 static int allocate_bd(struct net_device
*dev
)
144 struct fs_enet_private
*fep
= netdev_priv(dev
);
145 const struct fs_platform_info
*fpi
= fep
->fpi
;
147 fep
->ring_base
= dma_alloc_coherent(fep
->dev
,
148 (fpi
->tx_ring
+ fpi
->rx_ring
) *
149 sizeof(cbd_t
), &fep
->ring_mem_addr
,
151 if (fep
->ring_base
== NULL
)
157 static void free_bd(struct net_device
*dev
)
159 struct fs_enet_private
*fep
= netdev_priv(dev
);
160 const struct fs_platform_info
*fpi
= fep
->fpi
;
163 dma_free_coherent(fep
->dev
, (fpi
->tx_ring
+ fpi
->rx_ring
)
169 static void cleanup_data(struct net_device
*dev
)
174 static void set_promiscuous_mode(struct net_device
*dev
)
176 struct fs_enet_private
*fep
= netdev_priv(dev
);
177 fec_t
*fecp
= fep
->fec
.fecp
;
179 FS(fecp
, r_cntrl
, FEC_RCNTRL_PROM
);
182 static void set_multicast_start(struct net_device
*dev
)
184 struct fs_enet_private
*fep
= netdev_priv(dev
);
190 static void set_multicast_one(struct net_device
*dev
, const u8
*mac
)
192 struct fs_enet_private
*fep
= netdev_priv(dev
);
193 int temp
, hash_index
, i
, j
;
198 for (i
= 0; i
< 6; i
++) {
200 for (j
= 0; j
< 8; j
++) {
203 if (msb
^ (byte
& 0x1))
209 temp
= (crc
& 0x3f) >> 1;
210 hash_index
= ((temp
& 0x01) << 4) |
211 ((temp
& 0x02) << 2) |
213 ((temp
& 0x08) >> 2) |
214 ((temp
& 0x10) >> 4);
215 csrVal
= 1 << hash_index
;
217 fep
->fec
.hthi
|= csrVal
;
219 fep
->fec
.htlo
|= csrVal
;
222 static void set_multicast_finish(struct net_device
*dev
)
224 struct fs_enet_private
*fep
= netdev_priv(dev
);
225 fec_t
*fecp
= fep
->fec
.fecp
;
227 /* if all multi or too many multicasts; just enable all */
228 if ((dev
->flags
& IFF_ALLMULTI
) != 0 ||
229 dev
->mc_count
> FEC_MAX_MULTICAST_ADDRS
) {
230 fep
->fec
.hthi
= 0xffffffffU
;
231 fep
->fec
.htlo
= 0xffffffffU
;
234 FC(fecp
, r_cntrl
, FEC_RCNTRL_PROM
);
235 FW(fecp
, hash_table_high
, fep
->fec
.hthi
);
236 FW(fecp
, hash_table_low
, fep
->fec
.htlo
);
239 static void set_multicast_list(struct net_device
*dev
)
241 struct dev_mc_list
*pmc
;
243 if ((dev
->flags
& IFF_PROMISC
) == 0) {
244 set_multicast_start(dev
);
245 for (pmc
= dev
->mc_list
; pmc
!= NULL
; pmc
= pmc
->next
)
246 set_multicast_one(dev
, pmc
->dmi_addr
);
247 set_multicast_finish(dev
);
249 set_promiscuous_mode(dev
);
252 static void restart(struct net_device
*dev
)
255 immap_t
*immap
= fs_enet_immap
;
258 struct fs_enet_private
*fep
= netdev_priv(dev
);
259 fec_t
*fecp
= fep
->fec
.fecp
;
260 const struct fs_platform_info
*fpi
= fep
->fpi
;
261 dma_addr_t rx_bd_base_phys
, tx_bd_base_phys
;
265 struct mii_bus
* mii
= fep
->phydev
->bus
;
266 struct fec_info
* fec_inf
= mii
->priv
;
268 r
= whack_reset(fep
->fec
.fecp
);
270 printk(KERN_ERR DRV_MODULE_NAME
271 ": %s FEC Reset FAILED!\n", dev
->name
);
273 * Set station address.
275 addrhi
= ((u32
) dev
->dev_addr
[0] << 24) |
276 ((u32
) dev
->dev_addr
[1] << 16) |
277 ((u32
) dev
->dev_addr
[2] << 8) |
278 (u32
) dev
->dev_addr
[3];
279 addrlo
= ((u32
) dev
->dev_addr
[4] << 24) |
280 ((u32
) dev
->dev_addr
[5] << 16);
281 FW(fecp
, addr_low
, addrhi
);
282 FW(fecp
, addr_high
, addrlo
);
285 * Reset all multicast.
287 FW(fecp
, hash_table_high
, fep
->fec
.hthi
);
288 FW(fecp
, hash_table_low
, fep
->fec
.htlo
);
291 * Set maximum receive buffer size.
293 FW(fecp
, r_buff_size
, PKT_MAXBLR_SIZE
);
294 FW(fecp
, r_hash
, PKT_MAXBUF_SIZE
);
296 /* get physical address */
297 rx_bd_base_phys
= fep
->ring_mem_addr
;
298 tx_bd_base_phys
= rx_bd_base_phys
+ sizeof(cbd_t
) * fpi
->rx_ring
;
301 * Set receive and transmit descriptor base.
303 FW(fecp
, r_des_start
, rx_bd_base_phys
);
304 FW(fecp
, x_des_start
, tx_bd_base_phys
);
309 * Enable big endian and don't care about SDMA FC.
311 FW(fecp
, fun_code
, 0x78000000);
316 FW(fecp
, mii_speed
, fec_inf
->mii_speed
);
319 * Clear any outstanding interrupt.
321 FW(fecp
, ievent
, 0xffc0);
322 #ifndef CONFIG_PPC_MERGE
323 FW(fecp
, ivec
, (fep
->interrupt
/ 2) << 29);
325 FW(fecp
, ivec
, (virq_to_hw(fep
->interrupt
) / 2) << 29);
329 * adjust to speed (only for DUET & RMII)
333 cptr
= in_be32(&immap
->im_cpm
.cp_cptr
);
334 switch (fs_get_fec_index(fpi
->fs_no
)) {
337 if (fep
->speed
== 10)
339 else if (fep
->speed
== 100)
344 if (fep
->speed
== 10)
346 else if (fep
->speed
== 100)
350 BUG(); /* should never happen */
353 out_be32(&immap
->im_cpm
.cp_cptr
, cptr
);
358 FW(fecp
, r_cntrl
, FEC_RCNTRL_MII_MODE
); /* MII enable */
360 * adjust to duplex mode
362 if (fep
->phydev
->duplex
) {
363 FC(fecp
, r_cntrl
, FEC_RCNTRL_DRT
);
364 FS(fecp
, x_cntrl
, FEC_TCNTRL_FDEN
); /* FD enable */
366 FS(fecp
, r_cntrl
, FEC_RCNTRL_DRT
);
367 FC(fecp
, x_cntrl
, FEC_TCNTRL_FDEN
); /* FD disable */
371 * Enable interrupts we wish to service.
373 FW(fecp
, imask
, FEC_ENET_TXF
| FEC_ENET_TXB
|
374 FEC_ENET_RXF
| FEC_ENET_RXB
);
377 * And last, enable the transmit and receive processing.
379 FW(fecp
, ecntrl
, FEC_ECNTRL_PINMUX
| FEC_ECNTRL_ETHER_EN
);
380 FW(fecp
, r_des_active
, 0x01000000);
383 static void stop(struct net_device
*dev
)
385 struct fs_enet_private
*fep
= netdev_priv(dev
);
386 const struct fs_platform_info
*fpi
= fep
->fpi
;
387 fec_t
*fecp
= fep
->fec
.fecp
;
389 struct fec_info
* feci
= fep
->phydev
->bus
->priv
;
393 if ((FR(fecp
, ecntrl
) & FEC_ECNTRL_ETHER_EN
) == 0)
394 return; /* already down */
396 FW(fecp
, x_cntrl
, 0x01); /* Graceful transmit stop */
397 for (i
= 0; ((FR(fecp
, ievent
) & 0x10000000) == 0) &&
398 i
< FEC_RESET_DELAY
; i
++)
401 if (i
== FEC_RESET_DELAY
)
402 printk(KERN_WARNING DRV_MODULE_NAME
403 ": %s FEC timeout on graceful transmit stop\n",
406 * Disable FEC. Let only MII interrupts.
409 FC(fecp
, ecntrl
, FEC_ECNTRL_ETHER_EN
);
413 /* shut down FEC1? that's where the mii bus is */
415 FS(fecp
, r_cntrl
, FEC_RCNTRL_MII_MODE
); /* MII enable */
416 FS(fecp
, ecntrl
, FEC_ECNTRL_PINMUX
| FEC_ECNTRL_ETHER_EN
);
417 FW(fecp
, ievent
, FEC_ENET_MII
);
418 FW(fecp
, mii_speed
, feci
->mii_speed
);
422 static void pre_request_irq(struct net_device
*dev
, int irq
)
424 #ifndef CONFIG_PPC_MERGE
425 immap_t
*immap
= fs_enet_immap
;
429 if (irq
>= SIU_IRQ0
&& irq
< SIU_LEVEL7
) {
431 siel
= in_be32(&immap
->im_siu_conf
.sc_siel
);
433 siel
|= (0x80000000 >> irq
);
435 siel
&= ~(0x80000000 >> (irq
& ~1));
436 out_be32(&immap
->im_siu_conf
.sc_siel
, siel
);
441 static void post_free_irq(struct net_device
*dev
, int irq
)
446 static void napi_clear_rx_event(struct net_device
*dev
)
448 struct fs_enet_private
*fep
= netdev_priv(dev
);
449 fec_t
*fecp
= fep
->fec
.fecp
;
451 FW(fecp
, ievent
, FEC_NAPI_RX_EVENT_MSK
);
454 static void napi_enable_rx(struct net_device
*dev
)
456 struct fs_enet_private
*fep
= netdev_priv(dev
);
457 fec_t
*fecp
= fep
->fec
.fecp
;
459 FS(fecp
, imask
, FEC_NAPI_RX_EVENT_MSK
);
462 static void napi_disable_rx(struct net_device
*dev
)
464 struct fs_enet_private
*fep
= netdev_priv(dev
);
465 fec_t
*fecp
= fep
->fec
.fecp
;
467 FC(fecp
, imask
, FEC_NAPI_RX_EVENT_MSK
);
470 static void rx_bd_done(struct net_device
*dev
)
472 struct fs_enet_private
*fep
= netdev_priv(dev
);
473 fec_t
*fecp
= fep
->fec
.fecp
;
475 FW(fecp
, r_des_active
, 0x01000000);
478 static void tx_kickstart(struct net_device
*dev
)
480 struct fs_enet_private
*fep
= netdev_priv(dev
);
481 fec_t
*fecp
= fep
->fec
.fecp
;
483 FW(fecp
, x_des_active
, 0x01000000);
486 static u32
get_int_events(struct net_device
*dev
)
488 struct fs_enet_private
*fep
= netdev_priv(dev
);
489 fec_t
*fecp
= fep
->fec
.fecp
;
491 return FR(fecp
, ievent
) & FR(fecp
, imask
);
494 static void clear_int_events(struct net_device
*dev
, u32 int_events
)
496 struct fs_enet_private
*fep
= netdev_priv(dev
);
497 fec_t
*fecp
= fep
->fec
.fecp
;
499 FW(fecp
, ievent
, int_events
);
502 static void ev_error(struct net_device
*dev
, u32 int_events
)
504 printk(KERN_WARNING DRV_MODULE_NAME
505 ": %s FEC ERROR(s) 0x%x\n", dev
->name
, int_events
);
508 int get_regs(struct net_device
*dev
, void *p
, int *sizep
)
510 struct fs_enet_private
*fep
= netdev_priv(dev
);
512 if (*sizep
< sizeof(fec_t
))
515 memcpy_fromio(p
, fep
->fec
.fecp
, sizeof(fec_t
));
520 int get_regs_len(struct net_device
*dev
)
522 return sizeof(fec_t
);
525 void tx_restart(struct net_device
*dev
)
530 /*************************************************************************/
532 const struct fs_ops fs_fec_ops
= {
533 .setup_data
= setup_data
,
534 .cleanup_data
= cleanup_data
,
535 .set_multicast_list
= set_multicast_list
,
538 .pre_request_irq
= pre_request_irq
,
539 .post_free_irq
= post_free_irq
,
540 .napi_clear_rx_event
= napi_clear_rx_event
,
541 .napi_enable_rx
= napi_enable_rx
,
542 .napi_disable_rx
= napi_disable_rx
,
543 .rx_bd_done
= rx_bd_done
,
544 .tx_kickstart
= tx_kickstart
,
545 .get_int_events
= get_int_events
,
546 .clear_int_events
= clear_int_events
,
547 .ev_error
= ev_error
,
548 .get_regs
= get_regs
,
549 .get_regs_len
= get_regs_len
,
550 .tx_restart
= tx_restart
,
551 .allocate_bd
= allocate_bd
,