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Linux 2.6.20.7
[linux/fpc-iii.git] / drivers / net / netxen / netxen_nic_init.c
blob973af96337a922dc150d38639ebdfeef63b6ae75
1 /*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34 #include <linux/netdevice.h>
35 #include <linux/delay.h>
36 #include "netxen_nic.h"
37 #include "netxen_nic_hw.h"
38 #include "netxen_nic_phan_reg.h"
39
40 struct crb_addr_pair {
41 long addr;
42 long data;
43 };
44
45 #define NETXEN_MAX_CRB_XFORM 60
46 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
47 #define NETXEN_ADDR_ERROR ((unsigned long ) 0xffffffff )
48
49 #define crb_addr_transform(name) \
50 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
51 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
52
53 #define NETXEN_NIC_XDMA_RESET 0x8000ff
54
55 static inline void
56 netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
57 unsigned long off, int *data)
58 {
59 void __iomem *addr = pci_base_offset(adapter, off);
60 writel(*data, addr);
61 }
62
63 static void crb_addr_transform_setup(void)
64 {
65 crb_addr_transform(XDMA);
66 crb_addr_transform(TIMR);
67 crb_addr_transform(SRE);
68 crb_addr_transform(SQN3);
69 crb_addr_transform(SQN2);
70 crb_addr_transform(SQN1);
71 crb_addr_transform(SQN0);
72 crb_addr_transform(SQS3);
73 crb_addr_transform(SQS2);
74 crb_addr_transform(SQS1);
75 crb_addr_transform(SQS0);
76 crb_addr_transform(RPMX7);
77 crb_addr_transform(RPMX6);
78 crb_addr_transform(RPMX5);
79 crb_addr_transform(RPMX4);
80 crb_addr_transform(RPMX3);
81 crb_addr_transform(RPMX2);
82 crb_addr_transform(RPMX1);
83 crb_addr_transform(RPMX0);
84 crb_addr_transform(ROMUSB);
85 crb_addr_transform(SN);
86 crb_addr_transform(QMN);
87 crb_addr_transform(QMS);
88 crb_addr_transform(PGNI);
89 crb_addr_transform(PGND);
90 crb_addr_transform(PGN3);
91 crb_addr_transform(PGN2);
92 crb_addr_transform(PGN1);
93 crb_addr_transform(PGN0);
94 crb_addr_transform(PGSI);
95 crb_addr_transform(PGSD);
96 crb_addr_transform(PGS3);
97 crb_addr_transform(PGS2);
98 crb_addr_transform(PGS1);
99 crb_addr_transform(PGS0);
100 crb_addr_transform(PS);
101 crb_addr_transform(PH);
102 crb_addr_transform(NIU);
103 crb_addr_transform(I2Q);
104 crb_addr_transform(EG);
105 crb_addr_transform(MN);
106 crb_addr_transform(MS);
107 crb_addr_transform(CAS2);
108 crb_addr_transform(CAS1);
109 crb_addr_transform(CAS0);
110 crb_addr_transform(CAM);
111 crb_addr_transform(C2C1);
112 crb_addr_transform(C2C0);
113 }
114
115 int netxen_init_firmware(struct netxen_adapter *adapter)
116 {
117 u32 state = 0, loops = 0, err = 0;
118
119 /* Window 1 call */
120 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
121
122 if (state == PHAN_INITIALIZE_ACK)
123 return 0;
124
125 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
126 udelay(100);
127 /* Window 1 call */
128 state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
129
130 loops++;
131 }
132 if (loops >= 2000) {
133 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
134 state);
135 err = -EIO;
136 return err;
137 }
138 /* Window 1 call */
139 writel(MPORT_SINGLE_FUNCTION_MODE,
140 NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
141 writel(PHAN_INITIALIZE_ACK,
142 NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
143
144 return err;
145 }
146
147 #define NETXEN_ADDR_LIMIT 0xffffffffULL
148
149 void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
150 struct pci_dev **used_dev)
151 {
152 void *addr;
153
154 addr = pci_alloc_consistent(pdev, sz, ptr);
155 if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
156 *used_dev = pdev;
157 return addr;
158 }
159 pci_free_consistent(pdev, sz, addr, *ptr);
160 addr = pci_alloc_consistent(NULL, sz, ptr);
161 *used_dev = NULL;
162 return addr;
163 }
164
165 void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
166 {
167 int ctxid, ring;
168 u32 i;
169 u32 num_rx_bufs = 0;
170 struct netxen_rcv_desc_ctx *rcv_desc;
171
172 DPRINTK(INFO, "initializing some queues: %p\n", adapter);
173 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
174 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
175 struct netxen_rx_buffer *rx_buf;
176 rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
177 rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
178 rcv_desc->begin_alloc = 0;
179 rx_buf = rcv_desc->rx_buf_arr;
180 num_rx_bufs = rcv_desc->max_rx_desc_count;
181 /*
182 * Now go through all of them, set reference handles
183 * and put them in the queues.
184 */
185 for (i = 0; i < num_rx_bufs; i++) {
186 rx_buf->ref_handle = i;
187 rx_buf->state = NETXEN_BUFFER_FREE;
188 DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
189 "%p\n", ctxid, i, rx_buf);
190 rx_buf++;
191 }
192 }
193 }
194 }
195
196 void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
197 {
198 int ports = 0;
199 struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
200
201 if (netxen_nic_get_board_info(adapter) != 0)
202 printk("%s: Error getting board config info.\n",
203 netxen_nic_driver_name);
204 get_brd_port_by_type(board_info->board_type, &ports);
205 if (ports == 0)
206 printk(KERN_ERR "%s: Unknown board type\n",
207 netxen_nic_driver_name);
208 adapter->ahw.max_ports = ports;
209 }
210
211 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
212 {
213 switch (adapter->ahw.board_type) {
214 case NETXEN_NIC_GBE:
215 adapter->enable_phy_interrupts =
216 netxen_niu_gbe_enable_phy_interrupts;
217 adapter->disable_phy_interrupts =
218 netxen_niu_gbe_disable_phy_interrupts;
219 adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
220 adapter->macaddr_set = netxen_niu_macaddr_set;
221 adapter->set_mtu = netxen_nic_set_mtu_gb;
222 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
223 adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
224 adapter->phy_read = netxen_niu_gbe_phy_read;
225 adapter->phy_write = netxen_niu_gbe_phy_write;
226 adapter->init_port = netxen_niu_gbe_init_port;
227 adapter->init_niu = netxen_nic_init_niu_gb;
228 adapter->stop_port = netxen_niu_disable_gbe_port;
229 break;
230
231 case NETXEN_NIC_XGBE:
232 adapter->enable_phy_interrupts =
233 netxen_niu_xgbe_enable_phy_interrupts;
234 adapter->disable_phy_interrupts =
235 netxen_niu_xgbe_disable_phy_interrupts;
236 adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
237 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
238 adapter->set_mtu = netxen_nic_set_mtu_xgb;
239 adapter->init_port = netxen_niu_xg_init_port;
240 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
241 adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
242 adapter->stop_port = netxen_niu_disable_xg_port;
243 break;
244
245 default:
246 break;
247 }
248 }
249
250 /*
251 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
252 * address to external PCI CRB address.
253 */
254 unsigned long netxen_decode_crb_addr(unsigned long addr)
255 {
256 int i;
257 unsigned long base_addr, offset, pci_base;
258
259 crb_addr_transform_setup();
260
261 pci_base = NETXEN_ADDR_ERROR;
262 base_addr = addr & 0xfff00000;
263 offset = addr & 0x000fffff;
264
265 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
266 if (crb_addr_xform[i] == base_addr) {
267 pci_base = i << 20;
268 break;
269 }
270 }
271 if (pci_base == NETXEN_ADDR_ERROR)
272 return pci_base;
273 else
274 return (pci_base + offset);
275 }
276
277 static long rom_max_timeout = 10000;
278 static long rom_lock_timeout = 1000000;
279
280 static inline int rom_lock(struct netxen_adapter *adapter)
281 {
282 int iter;
283 u32 done = 0;
284 int timeout = 0;
285
286 while (!done) {
287 /* acquire semaphore2 from PCI HW block */
288 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
289 &done);
290 if (done == 1)
291 break;
292 if (timeout >= rom_lock_timeout)
293 return -EIO;
294
295 timeout++;
296 /*
297 * Yield CPU
298 */
299 if (!in_atomic())
300 schedule();
301 else {
302 for (iter = 0; iter < 20; iter++)
303 cpu_relax(); /*This a nop instr on i386 */
304 }
305 }
306 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
307 return 0;
308 }
309
310 int netxen_wait_rom_done(struct netxen_adapter *adapter)
311 {
312 long timeout = 0;
313 long done = 0;
314
315 while (done == 0) {
316 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
317 done &= 2;
318 timeout++;
319 if (timeout >= rom_max_timeout) {
320 printk("Timeout reached waiting for rom done");
321 return -EIO;
322 }
323 }
324 return 0;
325 }
326
327 static inline int netxen_rom_wren(struct netxen_adapter *adapter)
328 {
329 /* Set write enable latch in ROM status register */
330 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
331 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
332 M25P_INSTR_WREN);
333 if (netxen_wait_rom_done(adapter)) {
334 return -1;
335 }
336 return 0;
337 }
338
339 static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
340 unsigned int addr)
341 {
342 unsigned int data = 0xdeaddead;
343 data = netxen_nic_reg_read(adapter, addr);
344 return data;
345 }
346
347 static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
348 {
349 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
350 M25P_INSTR_RDSR);
351 if (netxen_wait_rom_done(adapter)) {
352 return -1;
353 }
354 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
355 }
356
357 static inline void netxen_rom_unlock(struct netxen_adapter *adapter)
358 {
359 u32 val;
360
361 /* release semaphore2 */
362 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
363
364 }
365
366 int netxen_rom_wip_poll(struct netxen_adapter *adapter)
367 {
368 long timeout = 0;
369 long wip = 1;
370 int val;
371 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
372 while (wip != 0) {
373 val = netxen_do_rom_rdsr(adapter);
374 wip = val & 1;
375 timeout++;
376 if (timeout > rom_max_timeout) {
377 return -1;
378 }
379 }
380 return 0;
381 }
382
383 static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
384 int data)
385 {
386 if (netxen_rom_wren(adapter)) {
387 return -1;
388 }
389 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
390 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
391 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
392 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
393 M25P_INSTR_PP);
394 if (netxen_wait_rom_done(adapter)) {
395 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
396 return -1;
397 }
398
399 return netxen_rom_wip_poll(adapter);
400 }
401
402 static inline int
403 do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
404 {
405 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
406 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
407 udelay(100); /* prevent bursting on CRB */
408 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
409 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
410 if (netxen_wait_rom_done(adapter)) {
411 printk("Error waiting for rom done\n");
412 return -EIO;
413 }
414 /* reset abyte_cnt and dummy_byte_cnt */
415 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
416 udelay(100); /* prevent bursting on CRB */
417 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
418
419 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
420 return 0;
421 }
422
423 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
424 {
425 int ret;
426
427 if (rom_lock(adapter) != 0)
428 return -EIO;
429
430 ret = do_rom_fast_read(adapter, addr, valp);
431 netxen_rom_unlock(adapter);
432 return ret;
433 }
434
435 int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
436 {
437 int ret = 0;
438
439 if (rom_lock(adapter) != 0) {
440 return -1;
441 }
442 ret = do_rom_fast_write(adapter, addr, data);
443 netxen_rom_unlock(adapter);
444 return ret;
445 }
446 int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
447 {
448 netxen_rom_wren(adapter);
449 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
450 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
451 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
452 M25P_INSTR_SE);
453 if (netxen_wait_rom_done(adapter)) {
454 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
455 return -1;
456 }
457 return netxen_rom_wip_poll(adapter);
458 }
459
460 int netxen_rom_se(struct netxen_adapter *adapter, int addr)
461 {
462 int ret = 0;
463 if (rom_lock(adapter) != 0) {
464 return -1;
465 }
466 ret = netxen_do_rom_se(adapter, addr);
467 netxen_rom_unlock(adapter);
468 return ret;
469 }
470
471 #define NETXEN_BOARDTYPE 0x4008
472 #define NETXEN_BOARDNUM 0x400c
473 #define NETXEN_CHIPNUM 0x4010
474 #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
475 #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
476 #define NETXEN_ROM_FOUND_INIT 0x400
477
478 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
479 {
480 int addr, val, status;
481 int n, i;
482 int init_delay = 0;
483 struct crb_addr_pair *buf;
484 unsigned long off;
485
486 /* resetall */
487 status = netxen_nic_get_board_info(adapter);
488 if (status)
489 printk("%s: netxen_pinit_from_rom: Error getting board info\n",
490 netxen_nic_driver_name);
491
492 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
493 NETXEN_ROMBUS_RESET);
494
495 if (verbose) {
496 int val;
497 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
498 printk("P2 ROM board type: 0x%08x\n", val);
499 else
500 printk("Could not read board type\n");
501 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
502 printk("P2 ROM board num: 0x%08x\n", val);
503 else
504 printk("Could not read board number\n");
505 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
506 printk("P2 ROM chip num: 0x%08x\n", val);
507 else
508 printk("Could not read chip number\n");
509 }
510
511 if (netxen_rom_fast_read(adapter, 0, &n) == 0
512 && (n & NETXEN_ROM_FIRST_BARRIER)) {
513 n &= ~NETXEN_ROM_ROUNDUP;
514 if (n < NETXEN_ROM_FOUND_INIT) {
515 if (verbose)
516 printk("%s: %d CRB init values found"
517 " in ROM.\n", netxen_nic_driver_name, n);
518 } else {
519 printk("%s:n=0x%x Error! NetXen card flash not"
520 " initialized.\n", __FUNCTION__, n);
521 return -EIO;
522 }
523 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
524 if (buf == NULL) {
525 printk("%s: netxen_pinit_from_rom: Unable to calloc "
526 "memory.\n", netxen_nic_driver_name);
527 return -ENOMEM;
528 }
529 for (i = 0; i < n; i++) {
530 if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
531 || netxen_rom_fast_read(adapter, 8 * i + 8,
532 &addr) != 0)
533 return -EIO;
534
535 buf[i].addr = addr;
536 buf[i].data = val;
537
538 if (verbose)
539 printk("%s: PCI: 0x%08x == 0x%08x\n",
540 netxen_nic_driver_name, (unsigned int)
541 netxen_decode_crb_addr((unsigned long)
542 addr), val);
543 }
544 for (i = 0; i < n; i++) {
545
546 off =
547 netxen_decode_crb_addr((unsigned long)buf[i].addr) +
548 NETXEN_PCI_CRBSPACE;
549 /* skipping cold reboot MAGIC */
550 if (off == NETXEN_CAM_RAM(0x1fc))
551 continue;
552
553 /* After writing this register, HW needs time for CRB */
554 /* to quiet down (else crb_window returns 0xffffffff) */
555 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
556 init_delay = 1;
557 /* hold xdma in reset also */
558 buf[i].data = NETXEN_NIC_XDMA_RESET;
559 }
560
561 if (ADDR_IN_WINDOW1(off)) {
562 writel(buf[i].data,
563 NETXEN_CRB_NORMALIZE(adapter, off));
564 } else {
565 netxen_nic_pci_change_crbwindow(adapter, 0);
566 writel(buf[i].data,
567 pci_base_offset(adapter, off));
568
569 netxen_nic_pci_change_crbwindow(adapter, 1);
570 }
571 if (init_delay == 1) {
572 ssleep(1);
573 init_delay = 0;
574 }
575 msleep(1);
576 }
577 kfree(buf);
578
579 /* disable_peg_cache_all */
580
581 /* unreset_net_cache */
582 netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
583 4);
584 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
585 (val & 0xffffff0f));
586 /* p2dn replyCount */
587 netxen_crb_writelit_adapter(adapter,
588 NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
589 /* disable_peg_cache 0 */
590 netxen_crb_writelit_adapter(adapter,
591 NETXEN_CRB_PEG_NET_D + 0x4c, 8);
592 /* disable_peg_cache 1 */
593 netxen_crb_writelit_adapter(adapter,
594 NETXEN_CRB_PEG_NET_I + 0x4c, 8);
595
596 /* peg_clr_all */
597
598 /* peg_clr 0 */
599 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
600 0);
601 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
602 0);
603 /* peg_clr 1 */
604 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
605 0);
606 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
607 0);
608 /* peg_clr 2 */
609 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
610 0);
611 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
612 0);
613 /* peg_clr 3 */
614 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
615 0);
616 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
617 0);
618 }
619 return 0;
620 }
621
622 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
623 {
624 uint64_t addr;
625 uint32_t hi;
626 uint32_t lo;
627
628 adapter->dummy_dma.addr =
629 pci_alloc_consistent(adapter->ahw.pdev,
630 NETXEN_HOST_DUMMY_DMA_SIZE,
631 &adapter->dummy_dma.phys_addr);
632 if (adapter->dummy_dma.addr == NULL) {
633 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
634 __FUNCTION__);
635 return -ENOMEM;
636 }
637
638 addr = (uint64_t) adapter->dummy_dma.phys_addr;
639 hi = (addr >> 32) & 0xffffffff;
640 lo = addr & 0xffffffff;
641
642 writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
643 writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
644
645 return 0;
646 }
647
648 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
649 {
650 if (adapter->dummy_dma.addr) {
651 pci_free_consistent(adapter->ahw.pdev,
652 NETXEN_HOST_DUMMY_DMA_SIZE,
653 adapter->dummy_dma.addr,
654 adapter->dummy_dma.phys_addr);
655 adapter->dummy_dma.addr = NULL;
656 }
657 }
658
659 void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
660 {
661 u32 val = 0;
662 int loops = 0;
663
664 if (!pegtune_val) {
665 while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) {
666 udelay(100);
667 schedule();
668 val =
669 readl(NETXEN_CRB_NORMALIZE
670 (adapter, CRB_CMDPEG_STATE));
671 loops++;
672 }
673 if (val != PHAN_INITIALIZE_COMPLETE)
674 printk("WARNING: Initial boot wait loop failed...\n");
675 }
676 }
677
678 int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
679 {
680 int ctx;
681
682 for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
683 struct netxen_recv_context *recv_ctx =
684 &(adapter->recv_ctx[ctx]);
685 u32 consumer;
686 struct status_desc *desc_head;
687 struct status_desc *desc;
688
689 consumer = recv_ctx->status_rx_consumer;
690 desc_head = recv_ctx->rcv_status_desc_head;
691 desc = &desc_head[consumer];
692
693 if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
694 return 1;
695 }
696
697 return 0;
698 }
699
700 static inline int netxen_nic_check_temp(struct netxen_adapter *adapter)
701 {
702 int port_num;
703 struct netxen_port *port;
704 struct net_device *netdev;
705 uint32_t temp, temp_state, temp_val;
706 int rv = 0;
707
708 temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
709
710 temp_state = nx_get_temp_state(temp);
711 temp_val = nx_get_temp_val(temp);
712
713 if (temp_state == NX_TEMP_PANIC) {
714 printk(KERN_ALERT
715 "%s: Device temperature %d degrees C exceeds"
716 " maximum allowed. Hardware has been shut down.\n",
717 netxen_nic_driver_name, temp_val);
718 for (port_num = 0; port_num < adapter->ahw.max_ports;
719 port_num++) {
720 port = adapter->port[port_num];
721 netdev = port->netdev;
722
723 netif_carrier_off(netdev);
724 netif_stop_queue(netdev);
725 }
726 rv = 1;
727 } else if (temp_state == NX_TEMP_WARN) {
728 if (adapter->temp == NX_TEMP_NORMAL) {
729 printk(KERN_ALERT
730 "%s: Device temperature %d degrees C "
731 "exceeds operating range."
732 " Immediate action needed.\n",
733 netxen_nic_driver_name, temp_val);
734 }
735 } else {
736 if (adapter->temp == NX_TEMP_WARN) {
737 printk(KERN_INFO
738 "%s: Device temperature is now %d degrees C"
739 " in normal range.\n", netxen_nic_driver_name,
740 temp_val);
741 }
742 }
743 adapter->temp = temp_state;
744 return rv;
745 }
746
747 void netxen_watchdog_task(struct work_struct *work)
748 {
749 int port_num;
750 struct netxen_port *port;
751 struct net_device *netdev;
752 struct netxen_adapter *adapter =
753 container_of(work, struct netxen_adapter, watchdog_task);
754
755 if (netxen_nic_check_temp(adapter))
756 return;
757
758 for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
759 port = adapter->port[port_num];
760 netdev = port->netdev;
761
762 if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) {
763 printk(KERN_INFO "%s port %d, %s carrier is now ok\n",
764 netxen_nic_driver_name, port_num, netdev->name);
765 netif_carrier_on(netdev);
766 }
767
768 if (netif_queue_stopped(netdev))
769 netif_wake_queue(netdev);
770 }
771
772 if (adapter->handle_phy_intr)
773 adapter->handle_phy_intr(adapter);
774 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
775 }
776
777 /*
778 * netxen_process_rcv() send the received packet to the protocol stack.
779 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
780 * invoke the routine to send more rx buffers to the Phantom...
781 */
782 void
783 netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
784 struct status_desc *desc)
785 {
786 struct netxen_port *port = adapter->port[netxen_get_sts_port(desc)];
787 struct pci_dev *pdev = port->pdev;
788 struct net_device *netdev = port->netdev;
789 int index = netxen_get_sts_refhandle(desc);
790 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
791 struct netxen_rx_buffer *buffer;
792 struct sk_buff *skb;
793 u32 length = netxen_get_sts_totallength(desc);
794 u32 desc_ctx;
795 struct netxen_rcv_desc_ctx *rcv_desc;
796 int ret;
797
798 desc_ctx = netxen_get_sts_type(desc);
799 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
800 printk("%s: %s Bad Rcv descriptor ring\n",
801 netxen_nic_driver_name, netdev->name);
802 return;
803 }
804
805 rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
806 if (unlikely(index > rcv_desc->max_rx_desc_count)) {
807 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
808 index, rcv_desc->max_rx_desc_count);
809 return;
810 }
811 buffer = &rcv_desc->rx_buf_arr[index];
812 if (desc_ctx == RCV_DESC_LRO_CTXID) {
813 buffer->lro_current_frags++;
814 if (netxen_get_sts_desc_lro_last_frag(desc)) {
815 buffer->lro_expected_frags =
816 netxen_get_sts_desc_lro_cnt(desc);
817 buffer->lro_length = length;
818 }
819 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
820 if (buffer->lro_expected_frags != 0) {
821 printk("LRO: (refhandle:%x) recv frag."
822 "wait for last. flags: %x expected:%d"
823 "have:%d\n", index,
824 netxen_get_sts_desc_lro_last_frag(desc),
825 buffer->lro_expected_frags,
826 buffer->lro_current_frags);
827 }
828 return;
829 }
830 }
831
832 pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
833 PCI_DMA_FROMDEVICE);
834
835 skb = (struct sk_buff *)buffer->skb;
836
837 if (likely(netxen_get_sts_status(desc) == STATUS_CKSUM_OK)) {
838 port->stats.csummed++;
839 skb->ip_summed = CHECKSUM_UNNECESSARY;
840 }
841 skb->dev = netdev;
842 if (desc_ctx == RCV_DESC_LRO_CTXID) {
843 /* True length was only available on the last pkt */
844 skb_put(skb, buffer->lro_length);
845 } else {
846 skb_put(skb, length);
847 }
848
849 skb->protocol = eth_type_trans(skb, netdev);
850
851 ret = netif_receive_skb(skb);
852
853 /*
854 * RH: Do we need these stats on a regular basis. Can we get it from
855 * Linux stats.
856 */
857 switch (ret) {
858 case NET_RX_SUCCESS:
859 port->stats.uphappy++;
860 break;
861
862 case NET_RX_CN_LOW:
863 port->stats.uplcong++;
864 break;
865
866 case NET_RX_CN_MOD:
867 port->stats.upmcong++;
868 break;
869
870 case NET_RX_CN_HIGH:
871 port->stats.uphcong++;
872 break;
873
874 case NET_RX_DROP:
875 port->stats.updropped++;
876 break;
877
878 default:
879 port->stats.updunno++;
880 break;
881 }
882
883 netdev->last_rx = jiffies;
884
885 rcv_desc->rcv_free++;
886 rcv_desc->rcv_pending--;
887
888 /*
889 * We just consumed one buffer so post a buffer.
890 */
891 adapter->stats.post_called++;
892 buffer->skb = NULL;
893 buffer->state = NETXEN_BUFFER_FREE;
894 buffer->lro_current_frags = 0;
895 buffer->lro_expected_frags = 0;
896
897 port->stats.no_rcv++;
898 port->stats.rxbytes += length;
899 }
900
901 /* Process Receive status ring */
902 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
903 {
904 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
905 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
906 struct status_desc *desc; /* used to read status desc here */
907 u32 consumer = recv_ctx->status_rx_consumer;
908 u32 producer = 0;
909 int count = 0, ring;
910
911 DPRINTK(INFO, "procesing receive\n");
912 /*
913 * we assume in this case that there is only one port and that is
914 * port #1...changes need to be done in firmware to indicate port
915 * number as part of the descriptor. This way we will be able to get
916 * the netdev which is associated with that device.
917 */
918 while (count < max) {
919 desc = &desc_head[consumer];
920 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
921 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
922 netxen_get_sts_owner(desc));
923 break;
924 }
925 netxen_process_rcv(adapter, ctxid, desc);
926 netxen_clear_sts_owner(desc);
927 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
928 consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
929 count++;
930 }
931 if (count) {
932 for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
933 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
934 }
935 }
936
937 /* update the consumer index in phantom */
938 if (count) {
939 adapter->stats.process_rcv++;
940 recv_ctx->status_rx_consumer = consumer;
941 recv_ctx->status_rx_producer = producer;
942
943 /* Window = 1 */
944 writel(consumer,
945 NETXEN_CRB_NORMALIZE(adapter,
946 recv_crb_registers[ctxid].
947 crb_rcv_status_consumer));
948 }
949
950 return count;
951 }
952
953 /* Process Command status ring */
954 int netxen_process_cmd_ring(unsigned long data)
955 {
956 u32 last_consumer;
957 u32 consumer;
958 struct netxen_adapter *adapter = (struct netxen_adapter *)data;
959 int count1 = 0;
960 int count2 = 0;
961 struct netxen_cmd_buffer *buffer;
962 struct netxen_port *port; /* port #1 */
963 struct netxen_port *nport;
964 struct pci_dev *pdev;
965 struct netxen_skb_frag *frag;
966 u32 i;
967 struct sk_buff *skb = NULL;
968 int p;
969 int done;
970
971 spin_lock(&adapter->tx_lock);
972 last_consumer = adapter->last_cmd_consumer;
973 DPRINTK(INFO, "procesing xmit complete\n");
974 /* we assume in this case that there is only one port and that is
975 * port #1...changes need to be done in firmware to indicate port
976 * number as part of the descriptor. This way we will be able to get
977 * the netdev which is associated with that device.
978 */
979
980 consumer = *(adapter->cmd_consumer);
981 if (last_consumer == consumer) { /* Ring is empty */
982 DPRINTK(INFO, "last_consumer %d == consumer %d\n",
983 last_consumer, consumer);
984 spin_unlock(&adapter->tx_lock);
985 return 1;
986 }
987
988 adapter->proc_cmd_buf_counter++;
989 adapter->stats.process_xmit++;
990 /*
991 * Not needed - does not seem to be used anywhere.
992 * adapter->cmd_consumer = consumer;
993 */
994 spin_unlock(&adapter->tx_lock);
995
996 while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
997 buffer = &adapter->cmd_buf_arr[last_consumer];
998 port = adapter->port[buffer->port];
999 pdev = port->pdev;
1000 frag = &buffer->frag_array[0];
1001 skb = buffer->skb;
1002 if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
1003 pci_unmap_single(pdev, frag->dma, frag->length,
1004 PCI_DMA_TODEVICE);
1005 for (i = 1; i < buffer->frag_count; i++) {
1006 DPRINTK(INFO, "getting fragment no %d\n", i);
1007 frag++; /* Get the next frag */
1008 pci_unmap_page(pdev, frag->dma, frag->length,
1009 PCI_DMA_TODEVICE);
1010 }
1011
1012 port->stats.skbfreed++;
1013 dev_kfree_skb_any(skb);
1014 skb = NULL;
1015 } else if (adapter->proc_cmd_buf_counter == 1) {
1016 port->stats.txnullskb++;
1017 }
1018 if (unlikely(netif_queue_stopped(port->netdev)
1019 && netif_carrier_ok(port->netdev))
1020 && ((jiffies - port->netdev->trans_start) >
1021 port->netdev->watchdog_timeo)) {
1022 SCHEDULE_WORK(&port->tx_timeout_task);
1023 }
1024
1025 last_consumer = get_next_index(last_consumer,
1026 adapter->max_tx_desc_count);
1027 count1++;
1028 }
1029 adapter->stats.noxmitdone += count1;
1030
1031 count2 = 0;
1032 spin_lock(&adapter->tx_lock);
1033 if ((--adapter->proc_cmd_buf_counter) == 0) {
1034 adapter->last_cmd_consumer = last_consumer;
1035 while ((adapter->last_cmd_consumer != consumer)
1036 && (count2 < MAX_STATUS_HANDLE)) {
1037 buffer =
1038 &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
1039 count2++;
1040 if (buffer->skb)
1041 break;
1042 else
1043 adapter->last_cmd_consumer =
1044 get_next_index(adapter->last_cmd_consumer,
1045 adapter->max_tx_desc_count);
1046 }
1047 }
1048 if (count1 || count2) {
1049 for (p = 0; p < adapter->ahw.max_ports; p++) {
1050 nport = adapter->port[p];
1051 if (netif_queue_stopped(nport->netdev)
1052 && (nport->flags & NETXEN_NETDEV_STATUS)) {
1053 netif_wake_queue(nport->netdev);
1054 nport->flags &= ~NETXEN_NETDEV_STATUS;
1055 }
1056 }
1057 }
1058 /*
1059 * If everything is freed up to consumer then check if the ring is full
1060 * If the ring is full then check if more needs to be freed and
1061 * schedule the call back again.
1062 *
1063 * This happens when there are 2 CPUs. One could be freeing and the
1064 * other filling it. If the ring is full when we get out of here and
1065 * the card has already interrupted the host then the host can miss the
1066 * interrupt.
1067 *
1068 * There is still a possible race condition and the host could miss an
1069 * interrupt. The card has to take care of this.
1070 */
1071 if (adapter->last_cmd_consumer == consumer &&
1072 (((adapter->cmd_producer + 1) %
1073 adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
1074 consumer = *(adapter->cmd_consumer);
1075 }
1076 done = (adapter->last_cmd_consumer == consumer);
1077
1078 spin_unlock(&adapter->tx_lock);
1079 DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
1080 __FUNCTION__);
1081 return (done);
1082 }
1083
1084 /*
1085 * netxen_post_rx_buffers puts buffer in the Phantom memory
1086 */
1087 void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1088 {
1089 struct pci_dev *pdev = adapter->ahw.pdev;
1090 struct sk_buff *skb;
1091 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1092 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1093 uint producer;
1094 struct rcv_desc *pdesc;
1095 struct netxen_rx_buffer *buffer;
1096 int count = 0;
1097 int index = 0;
1098 netxen_ctx_msg msg = 0;
1099 dma_addr_t dma;
1100
1101 adapter->stats.post_called++;
1102 rcv_desc = &recv_ctx->rcv_desc[ringid];
1103
1104 producer = rcv_desc->producer;
1105 index = rcv_desc->begin_alloc;
1106 buffer = &rcv_desc->rx_buf_arr[index];
1107 /* We can start writing rx descriptors into the phantom memory. */
1108 while (buffer->state == NETXEN_BUFFER_FREE) {
1109 skb = dev_alloc_skb(rcv_desc->skb_size);
1110 if (unlikely(!skb)) {
1111 /*
1112 * TODO
1113 * We need to schedule the posting of buffers to the pegs.
1114 */
1115 rcv_desc->begin_alloc = index;
1116 DPRINTK(ERR, "netxen_post_rx_buffers: "
1117 " allocated only %d buffers\n", count);
1118 break;
1119 }
1120
1121 count++; /* now there should be no failure */
1122 pdesc = &rcv_desc->desc_head[producer];
1123
1124 #if defined(XGB_DEBUG)
1125 *(unsigned long *)(skb->head) = 0xc0debabe;
1126 if (skb_is_nonlinear(skb)) {
1127 printk("Allocated SKB @%p is nonlinear\n");
1128 }
1129 #endif
1130 skb_reserve(skb, 2);
1131 /* This will be setup when we receive the
1132 * buffer after it has been filled FSL TBD TBD
1133 * skb->dev = netdev;
1134 */
1135 dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
1136 PCI_DMA_FROMDEVICE);
1137 pdesc->addr_buffer = cpu_to_le64(dma);
1138 buffer->skb = skb;
1139 buffer->state = NETXEN_BUFFER_BUSY;
1140 buffer->dma = dma;
1141 /* make a rcv descriptor */
1142 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1143 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1144 DPRINTK(INFO, "done writing descripter\n");
1145 producer =
1146 get_next_index(producer, rcv_desc->max_rx_desc_count);
1147 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1148 buffer = &rcv_desc->rx_buf_arr[index];
1149 }
1150 /* if we did allocate buffers, then write the count to Phantom */
1151 if (count) {
1152 rcv_desc->begin_alloc = index;
1153 rcv_desc->rcv_pending += count;
1154 adapter->stats.lastposted = count;
1155 adapter->stats.posted += count;
1156 rcv_desc->producer = producer;
1157 if (rcv_desc->rcv_free >= 32) {
1158 rcv_desc->rcv_free = 0;
1159 /* Window = 1 */
1160 writel((producer - 1) &
1161 (rcv_desc->max_rx_desc_count - 1),
1162 NETXEN_CRB_NORMALIZE(adapter,
1163 recv_crb_registers[0].
1164 rcv_desc_crb[ringid].
1165 crb_rcv_producer_offset));
1166 /*
1167 * Write a doorbell msg to tell phanmon of change in
1168 * receive ring producer
1169 */
1170 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1171 netxen_set_msg_privid(msg);
1172 netxen_set_msg_count(msg,
1173 ((producer -
1174 1) & (rcv_desc->
1175 max_rx_desc_count - 1)));
1176 netxen_set_msg_ctxid(msg, 0);
1177 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1178 writel(msg,
1179 DB_NORMALIZE(adapter,
1180 NETXEN_RCV_PRODUCER_OFFSET));
1181 }
1182 }
1183 }
1184
1185 void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter, uint32_t ctx,
1186 uint32_t ringid)
1187 {
1188 struct pci_dev *pdev = adapter->ahw.pdev;
1189 struct sk_buff *skb;
1190 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1191 struct netxen_rcv_desc_ctx *rcv_desc = NULL;
1192 u32 producer;
1193 struct rcv_desc *pdesc;
1194 struct netxen_rx_buffer *buffer;
1195 int count = 0;
1196 int index = 0;
1197
1198 adapter->stats.post_called++;
1199 rcv_desc = &recv_ctx->rcv_desc[ringid];
1200
1201 producer = rcv_desc->producer;
1202 index = rcv_desc->begin_alloc;
1203 buffer = &rcv_desc->rx_buf_arr[index];
1204 /* We can start writing rx descriptors into the phantom memory. */
1205 while (buffer->state == NETXEN_BUFFER_FREE) {
1206 skb = dev_alloc_skb(rcv_desc->skb_size);
1207 if (unlikely(!skb)) {
1208 /*
1209 * We need to schedule the posting of buffers to the pegs.
1210 */
1211 rcv_desc->begin_alloc = index;
1212 DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
1213 " allocated only %d buffers\n", count);
1214 break;
1215 }
1216 count++; /* now there should be no failure */
1217 pdesc = &rcv_desc->desc_head[producer];
1218 skb_reserve(skb, 2);
1219 /*
1220 * This will be setup when we receive the
1221 * buffer after it has been filled
1222 * skb->dev = netdev;
1223 */
1224 buffer->skb = skb;
1225 buffer->state = NETXEN_BUFFER_BUSY;
1226 buffer->dma = pci_map_single(pdev, skb->data,
1227 rcv_desc->dma_size,
1228 PCI_DMA_FROMDEVICE);
1229
1230 /* make a rcv descriptor */
1231 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1232 pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
1233 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1234 DPRINTK(INFO, "done writing descripter\n");
1235 producer =
1236 get_next_index(producer, rcv_desc->max_rx_desc_count);
1237 index = get_next_index(index, rcv_desc->max_rx_desc_count);
1238 buffer = &rcv_desc->rx_buf_arr[index];
1239 }
1240
1241 /* if we did allocate buffers, then write the count to Phantom */
1242 if (count) {
1243 rcv_desc->begin_alloc = index;
1244 rcv_desc->rcv_pending += count;
1245 adapter->stats.lastposted = count;
1246 adapter->stats.posted += count;
1247 rcv_desc->producer = producer;
1248 if (rcv_desc->rcv_free >= 32) {
1249 rcv_desc->rcv_free = 0;
1250 /* Window = 1 */
1251 writel((producer - 1) &
1252 (rcv_desc->max_rx_desc_count - 1),
1253 NETXEN_CRB_NORMALIZE(adapter,
1254 recv_crb_registers[0].
1255 rcv_desc_crb[ringid].
1256 crb_rcv_producer_offset));
1257 wmb();
1258 }
1259 }
1260 }
1261
1262 int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
1263 {
1264 if (find_diff_among(adapter->last_cmd_consumer,
1265 adapter->cmd_producer,
1266 adapter->max_tx_desc_count) > 0)
1267 return 1;
1268
1269 return 0;
1270 }
1271
1272
1273 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1274 {
1275 struct netxen_port *port;
1276 int port_num;
1277
1278 memset(&adapter->stats, 0, sizeof(adapter->stats));
1279 for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
1280 port = adapter->port[port_num];
1281 memset(&port->stats, 0, sizeof(port->stats));
1282 }
1283 }
1284
Linux with added FPC-III support