4 #include <linux/wireless.h>
5 #include <linux/netdevice.h>
6 #include <net/iw_handler.h>
8 #include "hostap_config.h"
9 #include "hostap_common.h"
11 #define MAX_PARM_DEVICES 8
12 #define PARM_MIN_MAX "1-" __MODULE_STRING(MAX_PARM_DEVICES)
13 #define DEF_INTS -1, -1, -1, -1, -1, -1, -1
14 #define GET_INT_PARM(var,idx) var[var[idx] < 0 ? 0 : idx]
17 /* Specific skb->protocol value that indicates that the packet already contains
19 * FIX: This might need own value that would be allocated especially for Prism2
20 * txdesc; ETH_P_CONTROL is commented as "Card specific control frames".
21 * However, these skb's should have only minimal path in the kernel side since
22 * prism2_send_mgmt() sends these with dev_queue_xmit() to prism2_tx(). */
23 #define ETH_P_HOSTAP ETH_P_CONTROL
25 /* ARPHRD_IEEE80211_PRISM uses a bloated version of Prism2 RX frame header
26 * (from linux-wlan-ng) */
27 struct linux_wlan_ng_val
{
31 } __attribute__ ((packed
));
33 struct linux_wlan_ng_prism_hdr
{
36 struct linux_wlan_ng_val hosttime
, mactime
, channel
, rssi
, sq
, signal
,
37 noise
, rate
, istx
, frmlen
;
38 } __attribute__ ((packed
));
40 struct linux_wlan_ng_cap_hdr
{
55 } __attribute__ ((packed
));
57 #define LWNG_CAP_DID_BASE (4 | (1 << 6)) /* section 4, group 1 */
58 #define LWNG_CAPHDR_VERSION 0x80211001
60 struct hfa384x_rx_frame
{
61 /* HFA384X RX frame descriptor */
62 u16 status
; /* HFA384X_RX_STATUS_ flags */
63 u32 time
; /* timestamp, 1 microsecond resolution */
64 u8 silence
; /* 27 .. 154; seems to be 0 */
65 u8 signal
; /* 27 .. 154 */
66 u8 rate
; /* 10, 20, 55, or 110 */
85 /* followed by frame data; max 2304 bytes */
86 } __attribute__ ((packed
));
89 struct hfa384x_tx_frame
{
90 /* HFA384X TX frame descriptor */
91 u16 status
; /* HFA384X_TX_STATUS_ flags */
95 u8 retry_count
; /* not yet implemented */
96 u8 tx_rate
; /* Host AP only; 0 = firmware, or 10, 20, 55, 110 */
97 u16 tx_control
; /* HFA384X_TX_CTRL_ flags */
100 u16 frame_control
; /* parts not used */
103 u8 addr2
[6]; /* filled by firmware */
105 u16 seq_ctrl
; /* filled by firmware */
114 /* followed by frame data; max 2304 bytes */
115 } __attribute__ ((packed
));
118 struct hfa384x_rid_hdr
122 } __attribute__ ((packed
));
125 /* Macro for converting signal levels (range 27 .. 154) to wireless ext
126 * dBm value with some accuracy */
127 #define HFA384X_LEVEL_TO_dBm(v) 0x100 + (v) * 100 / 255 - 100
129 #define HFA384X_LEVEL_TO_dBm_sign(v) (v) * 100 / 255 - 100
131 struct hfa384x_scan_request
{
133 u16 txrate
; /* HFA384X_RATES_* */
134 } __attribute__ ((packed
));
136 struct hfa384x_hostscan_request
{
141 } __attribute__ ((packed
));
143 struct hfa384x_join_request
{
146 } __attribute__ ((packed
));
148 struct hfa384x_info_frame
{
151 } __attribute__ ((packed
));
153 struct hfa384x_comm_tallies
{
154 u16 tx_unicast_frames
;
155 u16 tx_multicast_frames
;
157 u16 tx_unicast_octets
;
158 u16 tx_multicast_octets
;
159 u16 tx_deferred_transmissions
;
160 u16 tx_single_retry_frames
;
161 u16 tx_multiple_retry_frames
;
162 u16 tx_retry_limit_exceeded
;
164 u16 rx_unicast_frames
;
165 u16 rx_multicast_frames
;
167 u16 rx_unicast_octets
;
168 u16 rx_multicast_octets
;
170 u16 rx_discards_no_buffer
;
171 u16 tx_discards_wrong_sa
;
172 u16 rx_discards_wep_undecryptable
;
173 u16 rx_message_in_msg_fragments
;
174 u16 rx_message_in_bad_msg_fragments
;
175 } __attribute__ ((packed
));
177 struct hfa384x_comm_tallies32
{
178 u32 tx_unicast_frames
;
179 u32 tx_multicast_frames
;
181 u32 tx_unicast_octets
;
182 u32 tx_multicast_octets
;
183 u32 tx_deferred_transmissions
;
184 u32 tx_single_retry_frames
;
185 u32 tx_multiple_retry_frames
;
186 u32 tx_retry_limit_exceeded
;
188 u32 rx_unicast_frames
;
189 u32 rx_multicast_frames
;
191 u32 rx_unicast_octets
;
192 u32 rx_multicast_octets
;
194 u32 rx_discards_no_buffer
;
195 u32 tx_discards_wrong_sa
;
196 u32 rx_discards_wep_undecryptable
;
197 u32 rx_message_in_msg_fragments
;
198 u32 rx_message_in_bad_msg_fragments
;
199 } __attribute__ ((packed
));
201 struct hfa384x_scan_result_hdr
{
204 #define HFA384X_SCAN_IN_PROGRESS 0 /* no results available yet */
205 #define HFA384X_SCAN_HOST_INITIATED 1
206 #define HFA384X_SCAN_FIRMWARE_INITIATED 2
207 #define HFA384X_SCAN_INQUIRY_FROM_HOST 3
208 } __attribute__ ((packed
));
210 #define HFA384X_SCAN_MAX_RESULTS 32
212 struct hfa384x_scan_result
{
223 } __attribute__ ((packed
));
225 struct hfa384x_hostscan_result
{
237 } __attribute__ ((packed
));
239 struct comm_tallies_sums
{
240 unsigned int tx_unicast_frames
;
241 unsigned int tx_multicast_frames
;
242 unsigned int tx_fragments
;
243 unsigned int tx_unicast_octets
;
244 unsigned int tx_multicast_octets
;
245 unsigned int tx_deferred_transmissions
;
246 unsigned int tx_single_retry_frames
;
247 unsigned int tx_multiple_retry_frames
;
248 unsigned int tx_retry_limit_exceeded
;
249 unsigned int tx_discards
;
250 unsigned int rx_unicast_frames
;
251 unsigned int rx_multicast_frames
;
252 unsigned int rx_fragments
;
253 unsigned int rx_unicast_octets
;
254 unsigned int rx_multicast_octets
;
255 unsigned int rx_fcs_errors
;
256 unsigned int rx_discards_no_buffer
;
257 unsigned int tx_discards_wrong_sa
;
258 unsigned int rx_discards_wep_undecryptable
;
259 unsigned int rx_message_in_msg_fragments
;
260 unsigned int rx_message_in_bad_msg_fragments
;
264 struct hfa384x_regs
{
273 #if defined(PRISM2_PCCARD) || defined(PRISM2_PLX)
274 /* I/O ports for HFA384X Controller access */
275 #define HFA384X_CMD_OFF 0x00
276 #define HFA384X_PARAM0_OFF 0x02
277 #define HFA384X_PARAM1_OFF 0x04
278 #define HFA384X_PARAM2_OFF 0x06
279 #define HFA384X_STATUS_OFF 0x08
280 #define HFA384X_RESP0_OFF 0x0A
281 #define HFA384X_RESP1_OFF 0x0C
282 #define HFA384X_RESP2_OFF 0x0E
283 #define HFA384X_INFOFID_OFF 0x10
284 #define HFA384X_CONTROL_OFF 0x14
285 #define HFA384X_SELECT0_OFF 0x18
286 #define HFA384X_SELECT1_OFF 0x1A
287 #define HFA384X_OFFSET0_OFF 0x1C
288 #define HFA384X_OFFSET1_OFF 0x1E
289 #define HFA384X_RXFID_OFF 0x20
290 #define HFA384X_ALLOCFID_OFF 0x22
291 #define HFA384X_TXCOMPLFID_OFF 0x24
292 #define HFA384X_SWSUPPORT0_OFF 0x28
293 #define HFA384X_SWSUPPORT1_OFF 0x2A
294 #define HFA384X_SWSUPPORT2_OFF 0x2C
295 #define HFA384X_EVSTAT_OFF 0x30
296 #define HFA384X_INTEN_OFF 0x32
297 #define HFA384X_EVACK_OFF 0x34
298 #define HFA384X_DATA0_OFF 0x36
299 #define HFA384X_DATA1_OFF 0x38
300 #define HFA384X_AUXPAGE_OFF 0x3A
301 #define HFA384X_AUXOFFSET_OFF 0x3C
302 #define HFA384X_AUXDATA_OFF 0x3E
303 #endif /* PRISM2_PCCARD || PRISM2_PLX */
306 /* Memory addresses for ISL3874 controller access */
307 #define HFA384X_CMD_OFF 0x00
308 #define HFA384X_PARAM0_OFF 0x04
309 #define HFA384X_PARAM1_OFF 0x08
310 #define HFA384X_PARAM2_OFF 0x0C
311 #define HFA384X_STATUS_OFF 0x10
312 #define HFA384X_RESP0_OFF 0x14
313 #define HFA384X_RESP1_OFF 0x18
314 #define HFA384X_RESP2_OFF 0x1C
315 #define HFA384X_INFOFID_OFF 0x20
316 #define HFA384X_CONTROL_OFF 0x28
317 #define HFA384X_SELECT0_OFF 0x30
318 #define HFA384X_SELECT1_OFF 0x34
319 #define HFA384X_OFFSET0_OFF 0x38
320 #define HFA384X_OFFSET1_OFF 0x3C
321 #define HFA384X_RXFID_OFF 0x40
322 #define HFA384X_ALLOCFID_OFF 0x44
323 #define HFA384X_TXCOMPLFID_OFF 0x48
324 #define HFA384X_PCICOR_OFF 0x4C
325 #define HFA384X_SWSUPPORT0_OFF 0x50
326 #define HFA384X_SWSUPPORT1_OFF 0x54
327 #define HFA384X_SWSUPPORT2_OFF 0x58
328 #define HFA384X_PCIHCR_OFF 0x5C
329 #define HFA384X_EVSTAT_OFF 0x60
330 #define HFA384X_INTEN_OFF 0x64
331 #define HFA384X_EVACK_OFF 0x68
332 #define HFA384X_DATA0_OFF 0x6C
333 #define HFA384X_DATA1_OFF 0x70
334 #define HFA384X_AUXPAGE_OFF 0x74
335 #define HFA384X_AUXOFFSET_OFF 0x78
336 #define HFA384X_AUXDATA_OFF 0x7C
337 #define HFA384X_PCI_M0_ADDRH_OFF 0x80
338 #define HFA384X_PCI_M0_ADDRL_OFF 0x84
339 #define HFA384X_PCI_M0_LEN_OFF 0x88
340 #define HFA384X_PCI_M0_CTL_OFF 0x8C
341 #define HFA384X_PCI_STATUS_OFF 0x98
342 #define HFA384X_PCI_M1_ADDRH_OFF 0xA0
343 #define HFA384X_PCI_M1_ADDRL_OFF 0xA4
344 #define HFA384X_PCI_M1_LEN_OFF 0xA8
345 #define HFA384X_PCI_M1_CTL_OFF 0xAC
347 /* PCI bus master control bits (these are undocumented; based on guessing and
348 * experimenting..) */
349 #define HFA384X_PCI_CTL_FROM_BAP (BIT(5) | BIT(1) | BIT(0))
350 #define HFA384X_PCI_CTL_TO_BAP (BIT(5) | BIT(0))
352 #endif /* PRISM2_PCI */
355 /* Command codes for CMD reg. */
356 #define HFA384X_CMDCODE_INIT 0x00
357 #define HFA384X_CMDCODE_ENABLE 0x01
358 #define HFA384X_CMDCODE_DISABLE 0x02
359 #define HFA384X_CMDCODE_ALLOC 0x0A
360 #define HFA384X_CMDCODE_TRANSMIT 0x0B
361 #define HFA384X_CMDCODE_INQUIRE 0x11
362 #define HFA384X_CMDCODE_ACCESS 0x21
363 #define HFA384X_CMDCODE_ACCESS_WRITE (0x21 | BIT(8))
364 #define HFA384X_CMDCODE_DOWNLOAD 0x22
365 #define HFA384X_CMDCODE_READMIF 0x30
366 #define HFA384X_CMDCODE_WRITEMIF 0x31
367 #define HFA384X_CMDCODE_TEST 0x38
369 #define HFA384X_CMDCODE_MASK 0x3F
371 /* Test mode operations */
372 #define HFA384X_TEST_CHANGE_CHANNEL 0x08
373 #define HFA384X_TEST_MONITOR 0x0B
374 #define HFA384X_TEST_STOP 0x0F
375 #define HFA384X_TEST_CFG_BITS 0x15
376 #define HFA384X_TEST_CFG_BIT_ALC BIT(3)
378 #define HFA384X_CMD_BUSY BIT(15)
380 #define HFA384X_CMD_TX_RECLAIM BIT(8)
382 #define HFA384X_OFFSET_ERR BIT(14)
383 #define HFA384X_OFFSET_BUSY BIT(15)
386 /* ProgMode for download command */
387 #define HFA384X_PROGMODE_DISABLE 0
388 #define HFA384X_PROGMODE_ENABLE_VOLATILE 1
389 #define HFA384X_PROGMODE_ENABLE_NON_VOLATILE 2
390 #define HFA384X_PROGMODE_PROGRAM_NON_VOLATILE 3
392 #define HFA384X_AUX_MAGIC0 0xfe01
393 #define HFA384X_AUX_MAGIC1 0xdc23
394 #define HFA384X_AUX_MAGIC2 0xba45
396 #define HFA384X_AUX_PORT_DISABLED 0
397 #define HFA384X_AUX_PORT_DISABLE BIT(14)
398 #define HFA384X_AUX_PORT_ENABLE BIT(15)
399 #define HFA384X_AUX_PORT_ENABLED (BIT(14) | BIT(15))
400 #define HFA384X_AUX_PORT_MASK (BIT(14) | BIT(15))
402 #define PRISM2_PDA_SIZE 1024
405 /* Events; EvStat, Interrupt mask (IntEn), and acknowledge bits (EvAck) */
406 #define HFA384X_EV_TICK BIT(15)
407 #define HFA384X_EV_WTERR BIT(14)
408 #define HFA384X_EV_INFDROP BIT(13)
410 #define HFA384X_EV_PCI_M1 BIT(9)
411 #define HFA384X_EV_PCI_M0 BIT(8)
412 #endif /* PRISM2_PCI */
413 #define HFA384X_EV_INFO BIT(7)
414 #define HFA384X_EV_DTIM BIT(5)
415 #define HFA384X_EV_CMD BIT(4)
416 #define HFA384X_EV_ALLOC BIT(3)
417 #define HFA384X_EV_TXEXC BIT(2)
418 #define HFA384X_EV_TX BIT(1)
419 #define HFA384X_EV_RX BIT(0)
422 /* HFA384X Information frames */
423 #define HFA384X_INFO_HANDOVERADDR 0xF000 /* AP f/w ? */
424 #define HFA384X_INFO_HANDOVERDEAUTHADDR 0xF001 /* AP f/w 1.3.7 */
425 #define HFA384X_INFO_COMMTALLIES 0xF100
426 #define HFA384X_INFO_SCANRESULTS 0xF101
427 #define HFA384X_INFO_CHANNELINFORESULTS 0xF102 /* AP f/w only */
428 #define HFA384X_INFO_HOSTSCANRESULTS 0xF103
429 #define HFA384X_INFO_LINKSTATUS 0xF200
430 #define HFA384X_INFO_ASSOCSTATUS 0xF201 /* ? */
431 #define HFA384X_INFO_AUTHREQ 0xF202 /* ? */
432 #define HFA384X_INFO_PSUSERCNT 0xF203 /* ? */
433 #define HFA384X_INFO_KEYIDCHANGED 0xF204 /* ? */
435 enum { HFA384X_LINKSTATUS_CONNECTED
= 1,
436 HFA384X_LINKSTATUS_DISCONNECTED
= 2,
437 HFA384X_LINKSTATUS_AP_CHANGE
= 3,
438 HFA384X_LINKSTATUS_AP_OUT_OF_RANGE
= 4,
439 HFA384X_LINKSTATUS_AP_IN_RANGE
= 5,
440 HFA384X_LINKSTATUS_ASSOC_FAILED
= 6 };
442 enum { HFA384X_PORTTYPE_BSS
= 1, HFA384X_PORTTYPE_WDS
= 2,
443 HFA384X_PORTTYPE_PSEUDO_IBSS
= 3, HFA384X_PORTTYPE_IBSS
= 0,
444 HFA384X_PORTTYPE_HOSTAP
= 6 };
446 #define HFA384X_RATES_1MBPS BIT(0)
447 #define HFA384X_RATES_2MBPS BIT(1)
448 #define HFA384X_RATES_5MBPS BIT(2)
449 #define HFA384X_RATES_11MBPS BIT(3)
451 #define HFA384X_ROAMING_FIRMWARE 1
452 #define HFA384X_ROAMING_HOST 2
453 #define HFA384X_ROAMING_DISABLED 3
455 #define HFA384X_WEPFLAGS_PRIVACYINVOKED BIT(0)
456 #define HFA384X_WEPFLAGS_EXCLUDEUNENCRYPTED BIT(1)
457 #define HFA384X_WEPFLAGS_HOSTENCRYPT BIT(4)
458 #define HFA384X_WEPFLAGS_HOSTDECRYPT BIT(7)
460 #define HFA384X_RX_STATUS_MSGTYPE (BIT(15) | BIT(14) | BIT(13))
461 #define HFA384X_RX_STATUS_PCF BIT(12)
462 #define HFA384X_RX_STATUS_MACPORT (BIT(10) | BIT(9) | BIT(8))
463 #define HFA384X_RX_STATUS_UNDECR BIT(1)
464 #define HFA384X_RX_STATUS_FCSERR BIT(0)
466 #define HFA384X_RX_STATUS_GET_MSGTYPE(s) \
467 (((s) & HFA384X_RX_STATUS_MSGTYPE) >> 13)
468 #define HFA384X_RX_STATUS_GET_MACPORT(s) \
469 (((s) & HFA384X_RX_STATUS_MACPORT) >> 8)
471 enum { HFA384X_RX_MSGTYPE_NORMAL
= 0, HFA384X_RX_MSGTYPE_RFC1042
= 1,
472 HFA384X_RX_MSGTYPE_BRIDGETUNNEL
= 2, HFA384X_RX_MSGTYPE_MGMT
= 4 };
475 #define HFA384X_TX_CTRL_ALT_RTRY BIT(5)
476 #define HFA384X_TX_CTRL_802_11 BIT(3)
477 #define HFA384X_TX_CTRL_802_3 0
478 #define HFA384X_TX_CTRL_TX_EX BIT(2)
479 #define HFA384X_TX_CTRL_TX_OK BIT(1)
481 #define HFA384X_TX_STATUS_RETRYERR BIT(0)
482 #define HFA384X_TX_STATUS_AGEDERR BIT(1)
483 #define HFA384X_TX_STATUS_DISCON BIT(2)
484 #define HFA384X_TX_STATUS_FORMERR BIT(3)
486 /* HFA3861/3863 (BBP) Control Registers */
487 #define HFA386X_CR_TX_CONFIGURE 0x12 /* CR9 */
488 #define HFA386X_CR_RX_CONFIGURE 0x14 /* CR10 */
489 #define HFA386X_CR_A_D_TEST_MODES2 0x1A /* CR13 */
490 #define HFA386X_CR_MANUAL_TX_POWER 0x3E /* CR31 */
491 #define HFA386X_CR_MEASURED_TX_POWER 0x74 /* CR58 */
496 #define PRISM2_TXFID_COUNT 8
497 #define PRISM2_DATA_MAXLEN 2304
498 #define PRISM2_TXFID_LEN (PRISM2_DATA_MAXLEN + sizeof(struct hfa384x_tx_frame))
499 #define PRISM2_TXFID_EMPTY 0xffff
500 #define PRISM2_TXFID_RESERVED 0xfffe
501 #define PRISM2_DUMMY_FID 0xffff
502 #define MAX_SSID_LEN 32
503 #define MAX_NAME_LEN 32 /* this is assumed to be equal to MAX_SSID_LEN */
505 #define PRISM2_DUMP_RX_HDR BIT(0)
506 #define PRISM2_DUMP_TX_HDR BIT(1)
507 #define PRISM2_DUMP_TXEXC_HDR BIT(2)
509 struct hostap_tx_callback_info
{
511 void (*func
)(struct sk_buff
*, int ok
, void *);
513 struct hostap_tx_callback_info
*next
;
517 /* IEEE 802.11 requires that STA supports concurrent reception of at least
518 * three fragmented frames. This define can be increased to support more
519 * concurrent frames, but it should be noted that each entry can consume about
520 * 2 kB of RAM and increasing cache size will slow down frame reassembly. */
521 #define PRISM2_FRAG_CACHE_LEN 4
523 struct prism2_frag_entry
{
524 unsigned long first_frag_time
;
526 unsigned int last_frag
;
528 u8 src_addr
[ETH_ALEN
];
529 u8 dst_addr
[ETH_ALEN
];
533 struct hostap_cmd_queue
{
534 struct list_head list
;
535 wait_queue_head_t
compl;
536 volatile enum { CMD_SLEEP
, CMD_CALLBACK
, CMD_COMPLETED
} type
;
537 void (*callback
)(struct net_device
*dev
, long context
, u16 resp0
,
540 u16 cmd
, param0
, param1
;
542 volatile int issued
, issuing
;
548 /* options for hw_shutdown */
549 #define HOSTAP_HW_NO_DISABLE BIT(0)
550 #define HOSTAP_HW_ENABLE_CMDCOMPL BIT(1)
552 typedef struct local_info local_info_t
;
554 struct prism2_helper_functions
{
555 /* these functions are defined in hardware model specific files
556 * (hostap_{cs,plx,pci}.c */
557 int (*card_present
)(local_info_t
*local
);
558 void (*cor_sreset
)(local_info_t
*local
);
559 void (*genesis_reset
)(local_info_t
*local
, int hcr
);
561 /* the following functions are from hostap_hw.c, but they may have some
562 * hardware model specific code */
564 /* FIX: low-level commands like cmd might disappear at some point to
565 * make it easier to change them if needed (e.g., cmd would be replaced
566 * with write_mif/read_mif/testcmd/inquire); at least get_rid and
567 * set_rid might move to hostap_{cs,plx,pci}.c */
568 int (*cmd
)(struct net_device
*dev
, u16 cmd
, u16 param0
, u16
*param1
,
570 void (*read_regs
)(struct net_device
*dev
, struct hfa384x_regs
*regs
);
571 int (*get_rid
)(struct net_device
*dev
, u16 rid
, void *buf
, int len
,
573 int (*set_rid
)(struct net_device
*dev
, u16 rid
, void *buf
, int len
);
574 int (*hw_enable
)(struct net_device
*dev
, int initial
);
575 int (*hw_config
)(struct net_device
*dev
, int initial
);
576 void (*hw_reset
)(struct net_device
*dev
);
577 void (*hw_shutdown
)(struct net_device
*dev
, int no_disable
);
578 int (*reset_port
)(struct net_device
*dev
);
579 void (*schedule_reset
)(local_info_t
*local
);
580 int (*download
)(local_info_t
*local
,
581 struct prism2_download_param
*param
);
582 int (*tx
)(struct sk_buff
*skb
, struct net_device
*dev
);
583 int (*set_tim
)(struct net_device
*dev
, int aid
, int set
);
584 int (*read_aux
)(struct net_device
*dev
, unsigned addr
, int len
,
587 int need_tx_headroom
; /* number of bytes of headroom needed before
588 * IEEE 802.11 header */
589 enum { HOSTAP_HW_PCCARD
, HOSTAP_HW_PLX
, HOSTAP_HW_PCI
} hw_type
;
593 struct prism2_download_data
{
597 struct prism2_download_data_area
{
598 u32 addr
; /* wlan card address */
600 u8
*data
; /* allocated data */
605 #define HOSTAP_MAX_BSS_COUNT 64
606 #define MAX_WPA_IE_LEN 64
608 struct hostap_bss_info
{
609 struct list_head list
;
610 unsigned long last_update
;
616 u8 wpa_ie
[MAX_WPA_IE_LEN
];
618 u8 rsn_ie
[MAX_WPA_IE_LEN
];
625 /* Per radio private Host AP data - shared by all net devices interfaces used
626 * by each radio (wlan#, wlan#ap, wlan#sta, WDS).
627 * ((struct hostap_interface *) netdev_priv(dev))->local points to this
630 struct module
*hw_module
;
633 int master_dev_auto_open
; /* was master device opened automatically */
634 int num_dev_open
; /* number of open devices */
635 struct net_device
*dev
; /* master radio device */
636 struct net_device
*ddev
; /* main data device */
637 struct list_head hostap_interfaces
; /* Host AP interface list (contains
638 * struct hostap_interface entries)
640 rwlock_t iface_lock
; /* hostap_interfaces read lock; use write lock
641 * when removing entries from the list.
642 * TX and RX paths can use read lock. */
643 spinlock_t cmdlock
, baplock
, lock
;
644 struct semaphore rid_bap_sem
;
645 u16 infofid
; /* MAC buffer id for info frame */
646 /* txfid, intransmitfid, next_txtid, and next_alloc are protected by
648 spinlock_t txfidlock
;
649 int txfid_len
; /* length of allocated TX buffers */
650 u16 txfid
[PRISM2_TXFID_COUNT
]; /* buffer IDs for TX frames */
651 /* buffer IDs for intransmit frames or PRISM2_TXFID_EMPTY if
652 * corresponding txfid is free for next TX frame */
653 u16 intransmitfid
[PRISM2_TXFID_COUNT
];
654 int next_txfid
; /* index to the next txfid to be checked for
656 int next_alloc
; /* index to the next intransmitfid to be checked for
657 * allocation events */
659 /* bitfield for atomic bitops */
660 #define HOSTAP_BITS_TRANSMIT 0
661 #define HOSTAP_BITS_BAP_TASKLET 1
662 #define HOSTAP_BITS_BAP_TASKLET2 2
667 char essid
[MAX_SSID_LEN
+ 1];
668 char name
[MAX_NAME_LEN
+ 1];
670 u16 channel_mask
; /* mask of allowed channels */
671 u16 scan_channel_mask
; /* mask of channels to be scanned */
672 struct comm_tallies_sums comm_tallies
;
673 struct net_device_stats stats
;
674 struct proc_dir_entry
*proc
;
675 int iw_mode
; /* operating mode (IW_MODE_*) */
676 int pseudo_adhoc
; /* 0: IW_MODE_ADHOC is real 802.11 compliant IBSS
677 * 1: IW_MODE_ADHOC is "pseudo IBSS" */
678 char bssid
[ETH_ALEN
];
683 int frame_dump
; /* dump RX/TX frame headers, PRISM2_DUMP_ flags */
684 int fw_tx_rate_control
;
689 int hw_reset_tries
; /* how many times reset has been tried */
693 int no_pri
; /* no PRI f/w present */
694 int sram_type
; /* 8 = x8 SRAM, 16 = x16 SRAM, -1 = unknown */
697 PRISM2_TXPOWER_AUTO
= 0, PRISM2_TXPOWER_OFF
,
698 PRISM2_TXPOWER_FIXED
, PRISM2_TXPOWER_UNKNOWN
700 int txpower
; /* if txpower_type == PRISM2_TXPOWER_FIXED */
702 /* command queue for hfa384x_cmd(); protected with cmdlock */
703 struct list_head cmd_queue
;
704 /* max_len for cmd_queue; in addition, cmd_callback can use two
705 * additional entries to prevent sleeping commands from stopping
707 #define HOSTAP_CMD_QUEUE_MAX_LEN 16
708 int cmd_queue_len
; /* number of entries in cmd_queue */
710 /* if card timeout is detected in interrupt context, reset_queue is
711 * used to schedule card reseting to be done in user context */
712 struct work_struct reset_queue
;
714 /* For scheduling a change of the promiscuous mode RID */
716 struct work_struct set_multicast_list_queue
;
718 struct work_struct set_tim_queue
;
719 struct list_head set_tim_list
;
720 spinlock_t set_tim_lock
;
722 int wds_max_connections
;
724 #define HOSTAP_WDS_BROADCAST_RA BIT(0)
725 #define HOSTAP_WDS_AP_CLIENT BIT(1)
726 #define HOSTAP_WDS_STANDARD_FRAME BIT(2)
728 u16 tx_control
; /* flags to be used in TX description */
729 int manual_retry_count
; /* -1 = use f/w default; otherwise retry count
730 * to be used with all frames */
732 struct iw_statistics wstats
;
733 unsigned long scan_timestamp
; /* Time started to scan */
735 PRISM2_MONITOR_80211
= 0, PRISM2_MONITOR_PRISM
= 1,
736 PRISM2_MONITOR_CAPHDR
= 2
738 int (*saved_eth_header_parse
)(struct sk_buff
*skb
,
739 unsigned char *haddr
);
740 int monitor_allow_fcserr
;
742 int hostapd
; /* whether user space daemon, hostapd, is used for AP
744 int hostapd_sta
; /* whether hostapd is used with an extra STA interface
746 struct net_device
*apdev
;
747 struct net_device_stats apdevstats
;
749 char assoc_ap_addr
[ETH_ALEN
];
750 struct net_device
*stadev
;
751 struct net_device_stats stadevstats
;
754 #define WEP_KEY_LEN 13
755 struct ieee80211_crypt_data
*crypt
[WEP_KEYS
];
756 int tx_keyidx
; /* default TX key index (crypt[tx_keyidx]) */
757 struct timer_list crypt_deinit_timer
;
758 struct list_head crypt_deinit_list
;
760 int open_wep
; /* allow unencrypted frames */
763 int privacy_invoked
; /* force privacy invoked flag even if no keys are
765 int fw_encrypt_ok
; /* whether firmware-based WEP encrypt is working
766 * in Host AP mode (STA f/w 1.4.9 or newer) */
767 int bcrx_sta_key
; /* use individual keys to override default keys even
768 * with RX of broad/multicast frames */
770 struct prism2_frag_entry frag_cache
[PRISM2_FRAG_CACHE_LEN
];
771 unsigned int frag_next_idx
;
773 int ieee_802_1x
; /* is IEEE 802.1X used */
775 int antsel_tx
, antsel_rx
;
776 int rts_threshold
; /* dot11RTSThreshold */
777 int fragm_threshold
; /* dot11FragmentationThreshold */
778 int auth_algs
; /* PRISM2_AUTH_ flags */
780 int enh_sec
; /* cnfEnhSecurity options (broadcast SSID hide/ignore) */
781 int tallies32
; /* 32-bit tallies in use */
783 struct prism2_helper_functions
*func
;
787 #define PRISM2_FW_VER(major, minor, variant) \
788 (((major) << 16) | ((minor) << 8) | variant)
791 /* Tasklets for handling hardware IRQ related operations outside hw IRQ
793 struct tasklet_struct bap_tasklet
;
795 struct tasklet_struct info_tasklet
;
796 struct sk_buff_head info_list
; /* info frames as skb's for
799 struct hostap_tx_callback_info
*tx_callback
; /* registered TX callbacks
802 struct tasklet_struct rx_tasklet
;
803 struct sk_buff_head rx_list
;
805 struct tasklet_struct sta_tx_exc_tasklet
;
806 struct sk_buff_head sta_tx_exc_list
;
809 unsigned long last_join_time
; /* time of last JoinRequest */
810 struct hfa384x_hostscan_result
*last_scan_results
;
811 int last_scan_results_count
;
812 enum { PRISM2_SCAN
, PRISM2_HOSTSCAN
} last_scan_type
;
813 struct work_struct info_queue
;
814 long pending_info
; /* bit field of pending info_queue items */
815 #define PRISM2_INFO_PENDING_LINKSTATUS 0
816 #define PRISM2_INFO_PENDING_SCANRESULTS 1
817 int prev_link_status
; /* previous received LinkStatus info */
818 int prev_linkstatus_connected
;
819 u8 preferred_ap
[6]; /* use this AP if possible */
821 #ifdef PRISM2_CALLBACK
822 void *callback_data
; /* Can be used in callbacks; e.g., allocate
823 * on enable event and free on disable event.
824 * Host AP driver code does not touch this. */
825 #endif /* PRISM2_CALLBACK */
827 wait_queue_head_t hostscan_wq
;
829 /* Passive scan in Host AP mode */
830 struct timer_list passive_scan_timer
;
831 int passive_scan_interval
; /* in seconds, 0 = disabled */
832 int passive_scan_channel
;
833 enum { PASSIVE_SCAN_WAIT
, PASSIVE_SCAN_LISTEN
} passive_scan_state
;
835 struct timer_list tick_timer
;
836 unsigned long last_tick_timer
;
837 unsigned int sw_tick_stuck
;
839 /* commsQuality / dBmCommsQuality data from periodic polling; only
840 * valid for Managed and Ad-hoc modes */
841 unsigned long last_comms_qual_update
;
842 int comms_qual
; /* in some odd unit.. */
843 int avg_signal
; /* in dB (note: negative) */
844 int avg_noise
; /* in dB (note: negative) */
845 struct work_struct comms_qual_update
;
847 /* RSSI to dBm adjustment (for RX descriptor fields) */
848 int rssi_to_dBm
; /* substract from RSSI to get approximate dBm value */
850 /* BSS list / protected by local->lock */
851 struct list_head bss_list
;
853 int wpa
; /* WPA support enabled */
854 int tkip_countermeasures
;
855 int drop_unencrypted
;
856 /* Generic IEEE 802.11 info element to be added to
857 * ProbeResp/Beacon/(Re)AssocReq */
859 size_t generic_elem_len
;
861 #ifdef PRISM2_DOWNLOAD_SUPPORT
862 /* Persistent volatile download data */
863 struct prism2_download_data
*dl_pri
;
864 struct prism2_download_data
*dl_sec
;
865 #endif /* PRISM2_DOWNLOAD_SUPPORT */
867 #ifdef PRISM2_IO_DEBUG
868 #define PRISM2_IO_DEBUG_SIZE 10000
869 u32 io_debug
[PRISM2_IO_DEBUG_SIZE
];
871 int io_debug_enabled
;
872 #endif /* PRISM2_IO_DEBUG */
874 /* Pointer to hardware model specific (cs,pci,plx) private data. */
879 /* Per interface private Host AP data
880 * Allocated for each net device that Host AP uses (wlan#, wlan#ap, wlan#sta,
881 * WDS) and netdev_priv(dev) points to this structure. */
882 struct hostap_interface
{
883 struct list_head list
; /* list entry in Host AP interface list */
884 struct net_device
*dev
; /* pointer to this device */
885 struct local_info
*local
; /* pointer to shared private data */
886 struct net_device_stats stats
;
887 struct iw_spy_data spy_data
; /* iwspy support */
888 struct iw_public_data wireless_data
;
891 HOSTAP_INTERFACE_MASTER
,
892 HOSTAP_INTERFACE_MAIN
,
894 HOSTAP_INTERFACE_STA
,
895 HOSTAP_INTERFACE_WDS
,
899 struct hostap_interface_wds
{
900 u8 remote_addr
[ETH_ALEN
];
906 #define HOSTAP_SKB_TX_DATA_MAGIC 0xf08a36a2
909 * TX meta data - stored in skb->cb buffer, so this must not be increased over
912 struct hostap_skb_tx_data
{
913 u32 magic
; /* HOSTAP_SKB_TX_DATA_MAGIC */
914 u8 rate
; /* transmit rate */
915 #define HOSTAP_TX_FLAGS_WDS BIT(0)
916 #define HOSTAP_TX_FLAGS_BUFFERED_FRAME BIT(1)
917 #define HOSTAP_TX_FLAGS_ADD_MOREDATA BIT(2)
918 u8 flags
; /* HOSTAP_TX_FLAGS_* */
920 struct hostap_interface
*iface
;
921 unsigned long jiffies
; /* queueing timestamp */
922 unsigned short ethertype
;
926 #ifndef PRISM2_NO_DEBUG
928 #define DEBUG_FID BIT(0)
929 #define DEBUG_PS BIT(1)
930 #define DEBUG_FLOW BIT(2)
931 #define DEBUG_AP BIT(3)
932 #define DEBUG_HW BIT(4)
933 #define DEBUG_EXTRA BIT(5)
934 #define DEBUG_EXTRA2 BIT(6)
935 #define DEBUG_PS2 BIT(7)
936 #define DEBUG_MASK (DEBUG_PS | DEBUG_AP | DEBUG_HW | DEBUG_EXTRA)
937 #define PDEBUG(n, args...) \
938 do { if ((n) & DEBUG_MASK) printk(KERN_DEBUG args); } while (0)
939 #define PDEBUG2(n, args...) \
940 do { if ((n) & DEBUG_MASK) printk(args); } while (0)
942 #else /* PRISM2_NO_DEBUG */
944 #define PDEBUG(n, args...)
945 #define PDEBUG2(n, args...)
947 #endif /* PRISM2_NO_DEBUG */
949 enum { BAP0
= 0, BAP1
= 1 };
951 #define PRISM2_IO_DEBUG_CMD_INB 0
952 #define PRISM2_IO_DEBUG_CMD_INW 1
953 #define PRISM2_IO_DEBUG_CMD_INSW 2
954 #define PRISM2_IO_DEBUG_CMD_OUTB 3
955 #define PRISM2_IO_DEBUG_CMD_OUTW 4
956 #define PRISM2_IO_DEBUG_CMD_OUTSW 5
957 #define PRISM2_IO_DEBUG_CMD_ERROR 6
958 #define PRISM2_IO_DEBUG_CMD_INTERRUPT 7
960 #ifdef PRISM2_IO_DEBUG
962 #define PRISM2_IO_DEBUG_ENTRY(cmd, reg, value) \
963 (((cmd) << 24) | ((reg) << 16) | value)
965 static inline void prism2_io_debug_add(struct net_device
*dev
, int cmd
,
968 struct hostap_interface
*iface
= netdev_priv(dev
);
969 local_info_t
*local
= iface
->local
;
971 if (!local
->io_debug_enabled
)
974 local
->io_debug
[local
->io_debug_head
] = jiffies
& 0xffffffff;
975 if (++local
->io_debug_head
>= PRISM2_IO_DEBUG_SIZE
)
976 local
->io_debug_head
= 0;
977 local
->io_debug
[local
->io_debug_head
] =
978 PRISM2_IO_DEBUG_ENTRY(cmd
, reg
, value
);
979 if (++local
->io_debug_head
>= PRISM2_IO_DEBUG_SIZE
)
980 local
->io_debug_head
= 0;
984 static inline void prism2_io_debug_error(struct net_device
*dev
, int err
)
986 struct hostap_interface
*iface
= netdev_priv(dev
);
987 local_info_t
*local
= iface
->local
;
990 if (!local
->io_debug_enabled
)
993 spin_lock_irqsave(&local
->lock
, flags
);
994 prism2_io_debug_add(dev
, PRISM2_IO_DEBUG_CMD_ERROR
, 0, err
);
995 if (local
->io_debug_enabled
== 1) {
996 local
->io_debug_enabled
= 0;
997 printk(KERN_DEBUG
"%s: I/O debug stopped\n", dev
->name
);
999 spin_unlock_irqrestore(&local
->lock
, flags
);
1002 #else /* PRISM2_IO_DEBUG */
1004 static inline void prism2_io_debug_add(struct net_device
*dev
, int cmd
,
1009 static inline void prism2_io_debug_error(struct net_device
*dev
, int err
)
1013 #endif /* PRISM2_IO_DEBUG */
1016 #ifdef PRISM2_CALLBACK
1018 /* Called when card is enabled */
1019 PRISM2_CALLBACK_ENABLE
,
1021 /* Called when card is disabled */
1022 PRISM2_CALLBACK_DISABLE
,
1024 /* Called when RX/TX starts/ends */
1025 PRISM2_CALLBACK_RX_START
, PRISM2_CALLBACK_RX_END
,
1026 PRISM2_CALLBACK_TX_START
, PRISM2_CALLBACK_TX_END
1028 void prism2_callback(local_info_t
*local
, int event
);
1029 #else /* PRISM2_CALLBACK */
1030 #define prism2_callback(d, e) do { } while (0)
1031 #endif /* PRISM2_CALLBACK */
1033 #endif /* __KERNEL__ */
1035 #endif /* HOSTAP_WLAN_H */