1 /* drivers/rtc/rtc-s3c.c
3 * Copyright (c) 2004,2006 Simtec Electronics
4 * Ben Dooks, <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
14 #include <linux/module.h>
16 #include <linux/string.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/interrupt.h>
20 #include <linux/rtc.h>
21 #include <linux/bcd.h>
22 #include <linux/clk.h>
24 #include <asm/hardware.h>
25 #include <asm/uaccess.h>
30 #include <asm/mach/time.h>
32 #include <asm/arch/regs-rtc.h>
34 /* I have yet to find an S3C implementation with more than one
35 * of these rtc blocks in */
37 static struct resource
*s3c_rtc_mem
;
39 static void __iomem
*s3c_rtc_base
;
40 static int s3c_rtc_alarmno
= NO_IRQ
;
41 static int s3c_rtc_tickno
= NO_IRQ
;
42 static int s3c_rtc_freq
= 1;
44 static DEFINE_SPINLOCK(s3c_rtc_pie_lock
);
45 static unsigned int tick_count
;
49 static irqreturn_t
s3c_rtc_alarmirq(int irq
, void *id
)
51 struct rtc_device
*rdev
= id
;
53 rtc_update_irq(&rdev
->class_dev
, 1, RTC_AF
| RTC_IRQF
);
57 static irqreturn_t
s3c_rtc_tickirq(int irq
, void *id
)
59 struct rtc_device
*rdev
= id
;
61 rtc_update_irq(&rdev
->class_dev
, tick_count
++, RTC_PF
| RTC_IRQF
);
65 /* Update control registers */
66 static void s3c_rtc_setaie(int to
)
70 pr_debug("%s: aie=%d\n", __FUNCTION__
, to
);
72 tmp
= readb(s3c_rtc_base
+ S3C2410_RTCALM
) & ~S3C2410_RTCALM_ALMEN
;
75 tmp
|= S3C2410_RTCALM_ALMEN
;
77 writeb(tmp
, s3c_rtc_base
+ S3C2410_RTCALM
);
80 static void s3c_rtc_setpie(int to
)
84 pr_debug("%s: pie=%d\n", __FUNCTION__
, to
);
86 spin_lock_irq(&s3c_rtc_pie_lock
);
87 tmp
= readb(s3c_rtc_base
+ S3C2410_TICNT
) & ~S3C2410_TICNT_ENABLE
;
90 tmp
|= S3C2410_TICNT_ENABLE
;
92 writeb(tmp
, s3c_rtc_base
+ S3C2410_TICNT
);
93 spin_unlock_irq(&s3c_rtc_pie_lock
);
96 static void s3c_rtc_setfreq(int freq
)
100 spin_lock_irq(&s3c_rtc_pie_lock
);
101 tmp
= readb(s3c_rtc_base
+ S3C2410_TICNT
) & S3C2410_TICNT_ENABLE
;
105 tmp
|= (128 / freq
)-1;
107 writeb(tmp
, s3c_rtc_base
+ S3C2410_TICNT
);
108 spin_unlock_irq(&s3c_rtc_pie_lock
);
111 /* Time read/write */
113 static int s3c_rtc_gettime(struct device
*dev
, struct rtc_time
*rtc_tm
)
115 unsigned int have_retried
= 0;
116 void __iomem
*base
= s3c_rtc_base
;
119 rtc_tm
->tm_min
= readb(base
+ S3C2410_RTCMIN
);
120 rtc_tm
->tm_hour
= readb(base
+ S3C2410_RTCHOUR
);
121 rtc_tm
->tm_mday
= readb(base
+ S3C2410_RTCDATE
);
122 rtc_tm
->tm_mon
= readb(base
+ S3C2410_RTCMON
);
123 rtc_tm
->tm_year
= readb(base
+ S3C2410_RTCYEAR
);
124 rtc_tm
->tm_sec
= readb(base
+ S3C2410_RTCSEC
);
126 /* the only way to work out wether the system was mid-update
127 * when we read it is to check the second counter, and if it
128 * is zero, then we re-try the entire read
131 if (rtc_tm
->tm_sec
== 0 && !have_retried
) {
136 pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n",
137 rtc_tm
->tm_year
, rtc_tm
->tm_mon
, rtc_tm
->tm_mday
,
138 rtc_tm
->tm_hour
, rtc_tm
->tm_min
, rtc_tm
->tm_sec
);
140 BCD_TO_BIN(rtc_tm
->tm_sec
);
141 BCD_TO_BIN(rtc_tm
->tm_min
);
142 BCD_TO_BIN(rtc_tm
->tm_hour
);
143 BCD_TO_BIN(rtc_tm
->tm_mday
);
144 BCD_TO_BIN(rtc_tm
->tm_mon
);
145 BCD_TO_BIN(rtc_tm
->tm_year
);
147 rtc_tm
->tm_year
+= 100;
153 static int s3c_rtc_settime(struct device
*dev
, struct rtc_time
*tm
)
155 void __iomem
*base
= s3c_rtc_base
;
156 int year
= tm
->tm_year
- 100;
158 pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n",
159 tm
->tm_year
, tm
->tm_mon
, tm
->tm_mday
,
160 tm
->tm_hour
, tm
->tm_min
, tm
->tm_sec
);
162 /* we get around y2k by simply not supporting it */
164 if (year
< 0 || year
>= 100) {
165 dev_err(dev
, "rtc only supports 100 years\n");
169 writeb(BIN2BCD(tm
->tm_sec
), base
+ S3C2410_RTCSEC
);
170 writeb(BIN2BCD(tm
->tm_min
), base
+ S3C2410_RTCMIN
);
171 writeb(BIN2BCD(tm
->tm_hour
), base
+ S3C2410_RTCHOUR
);
172 writeb(BIN2BCD(tm
->tm_mday
), base
+ S3C2410_RTCDATE
);
173 writeb(BIN2BCD(tm
->tm_mon
+ 1), base
+ S3C2410_RTCMON
);
174 writeb(BIN2BCD(year
), base
+ S3C2410_RTCYEAR
);
179 static int s3c_rtc_getalarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
181 struct rtc_time
*alm_tm
= &alrm
->time
;
182 void __iomem
*base
= s3c_rtc_base
;
185 alm_tm
->tm_sec
= readb(base
+ S3C2410_ALMSEC
);
186 alm_tm
->tm_min
= readb(base
+ S3C2410_ALMMIN
);
187 alm_tm
->tm_hour
= readb(base
+ S3C2410_ALMHOUR
);
188 alm_tm
->tm_mon
= readb(base
+ S3C2410_ALMMON
);
189 alm_tm
->tm_mday
= readb(base
+ S3C2410_ALMDATE
);
190 alm_tm
->tm_year
= readb(base
+ S3C2410_ALMYEAR
);
192 alm_en
= readb(base
+ S3C2410_RTCALM
);
194 alrm
->enabled
= (alm_en
& S3C2410_RTCALM_ALMEN
) ? 1 : 0;
196 pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n",
198 alm_tm
->tm_year
, alm_tm
->tm_mon
, alm_tm
->tm_mday
,
199 alm_tm
->tm_hour
, alm_tm
->tm_min
, alm_tm
->tm_sec
);
202 /* decode the alarm enable field */
204 if (alm_en
& S3C2410_RTCALM_SECEN
)
205 BCD_TO_BIN(alm_tm
->tm_sec
);
207 alm_tm
->tm_sec
= 0xff;
209 if (alm_en
& S3C2410_RTCALM_MINEN
)
210 BCD_TO_BIN(alm_tm
->tm_min
);
212 alm_tm
->tm_min
= 0xff;
214 if (alm_en
& S3C2410_RTCALM_HOUREN
)
215 BCD_TO_BIN(alm_tm
->tm_hour
);
217 alm_tm
->tm_hour
= 0xff;
219 if (alm_en
& S3C2410_RTCALM_DAYEN
)
220 BCD_TO_BIN(alm_tm
->tm_mday
);
222 alm_tm
->tm_mday
= 0xff;
224 if (alm_en
& S3C2410_RTCALM_MONEN
) {
225 BCD_TO_BIN(alm_tm
->tm_mon
);
228 alm_tm
->tm_mon
= 0xff;
231 if (alm_en
& S3C2410_RTCALM_YEAREN
)
232 BCD_TO_BIN(alm_tm
->tm_year
);
234 alm_tm
->tm_year
= 0xffff;
239 static int s3c_rtc_setalarm(struct device
*dev
, struct rtc_wkalrm
*alrm
)
241 struct rtc_time
*tm
= &alrm
->time
;
242 void __iomem
*base
= s3c_rtc_base
;
243 unsigned int alrm_en
;
245 pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n",
247 tm
->tm_mday
& 0xff, tm
->tm_mon
& 0xff, tm
->tm_year
& 0xff,
248 tm
->tm_hour
& 0xff, tm
->tm_min
& 0xff, tm
->tm_sec
);
251 alrm_en
= readb(base
+ S3C2410_RTCALM
) & S3C2410_RTCALM_ALMEN
;
252 writeb(0x00, base
+ S3C2410_RTCALM
);
254 if (tm
->tm_sec
< 60 && tm
->tm_sec
>= 0) {
255 alrm_en
|= S3C2410_RTCALM_SECEN
;
256 writeb(BIN2BCD(tm
->tm_sec
), base
+ S3C2410_ALMSEC
);
259 if (tm
->tm_min
< 60 && tm
->tm_min
>= 0) {
260 alrm_en
|= S3C2410_RTCALM_MINEN
;
261 writeb(BIN2BCD(tm
->tm_min
), base
+ S3C2410_ALMMIN
);
264 if (tm
->tm_hour
< 24 && tm
->tm_hour
>= 0) {
265 alrm_en
|= S3C2410_RTCALM_HOUREN
;
266 writeb(BIN2BCD(tm
->tm_hour
), base
+ S3C2410_ALMHOUR
);
269 pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en
);
271 writeb(alrm_en
, base
+ S3C2410_RTCALM
);
274 alrm_en
= readb(base
+ S3C2410_RTCALM
);
275 alrm_en
&= ~S3C2410_RTCALM_ALMEN
;
276 writeb(alrm_en
, base
+ S3C2410_RTCALM
);
277 disable_irq_wake(s3c_rtc_alarmno
);
281 enable_irq_wake(s3c_rtc_alarmno
);
283 disable_irq_wake(s3c_rtc_alarmno
);
288 static int s3c_rtc_ioctl(struct device
*dev
,
289 unsigned int cmd
, unsigned long arg
)
291 unsigned int ret
= -ENOIOCTLCMD
;
296 s3c_rtc_setaie((cmd
== RTC_AIE_ON
) ? 1 : 0);
303 s3c_rtc_setpie((cmd
== RTC_PIE_ON
) ? 1 : 0);
308 ret
= put_user(s3c_rtc_freq
, (unsigned long __user
*)arg
);
312 /* check for power of 2 */
314 if ((arg
& (arg
-1)) != 0 || arg
< 1) {
319 pr_debug("s3c2410_rtc: setting frequency %ld\n", arg
);
321 s3c_rtc_setfreq(arg
);
334 static int s3c_rtc_proc(struct device
*dev
, struct seq_file
*seq
)
336 unsigned int ticnt
= readb(s3c_rtc_base
+ S3C2410_TICNT
);
338 seq_printf(seq
, "periodic_IRQ\t: %s\n",
339 (ticnt
& S3C2410_TICNT_ENABLE
) ? "yes" : "no" );
341 seq_printf(seq
, "periodic_freq\t: %d\n", s3c_rtc_freq
);
346 static int s3c_rtc_open(struct device
*dev
)
348 struct platform_device
*pdev
= to_platform_device(dev
);
349 struct rtc_device
*rtc_dev
= platform_get_drvdata(pdev
);
352 ret
= request_irq(s3c_rtc_alarmno
, s3c_rtc_alarmirq
,
353 SA_INTERRUPT
, "s3c2410-rtc alarm", rtc_dev
);
356 dev_err(dev
, "IRQ%d error %d\n", s3c_rtc_alarmno
, ret
);
360 ret
= request_irq(s3c_rtc_tickno
, s3c_rtc_tickirq
,
361 SA_INTERRUPT
, "s3c2410-rtc tick", rtc_dev
);
364 dev_err(dev
, "IRQ%d error %d\n", s3c_rtc_tickno
, ret
);
371 free_irq(s3c_rtc_alarmno
, rtc_dev
);
375 static void s3c_rtc_release(struct device
*dev
)
377 struct platform_device
*pdev
= to_platform_device(dev
);
378 struct rtc_device
*rtc_dev
= platform_get_drvdata(pdev
);
380 /* do not clear AIE here, it may be needed for wake */
383 free_irq(s3c_rtc_alarmno
, rtc_dev
);
384 free_irq(s3c_rtc_tickno
, rtc_dev
);
387 static const struct rtc_class_ops s3c_rtcops
= {
388 .open
= s3c_rtc_open
,
389 .release
= s3c_rtc_release
,
390 .ioctl
= s3c_rtc_ioctl
,
391 .read_time
= s3c_rtc_gettime
,
392 .set_time
= s3c_rtc_settime
,
393 .read_alarm
= s3c_rtc_getalarm
,
394 .set_alarm
= s3c_rtc_setalarm
,
395 .proc
= s3c_rtc_proc
,
398 static void s3c_rtc_enable(struct platform_device
*pdev
, int en
)
400 void __iomem
*base
= s3c_rtc_base
;
403 if (s3c_rtc_base
== NULL
)
407 tmp
= readb(base
+ S3C2410_RTCCON
);
408 writeb(tmp
& ~S3C2410_RTCCON_RTCEN
, base
+ S3C2410_RTCCON
);
410 tmp
= readb(base
+ S3C2410_TICNT
);
411 writeb(tmp
& ~S3C2410_TICNT_ENABLE
, base
+ S3C2410_TICNT
);
413 /* re-enable the device, and check it is ok */
415 if ((readb(base
+S3C2410_RTCCON
) & S3C2410_RTCCON_RTCEN
) == 0){
416 dev_info(&pdev
->dev
, "rtc disabled, re-enabling\n");
418 tmp
= readb(base
+ S3C2410_RTCCON
);
419 writeb(tmp
|S3C2410_RTCCON_RTCEN
, base
+S3C2410_RTCCON
);
422 if ((readb(base
+ S3C2410_RTCCON
) & S3C2410_RTCCON_CNTSEL
)){
423 dev_info(&pdev
->dev
, "removing RTCCON_CNTSEL\n");
425 tmp
= readb(base
+ S3C2410_RTCCON
);
426 writeb(tmp
& ~S3C2410_RTCCON_CNTSEL
, base
+S3C2410_RTCCON
);
429 if ((readb(base
+ S3C2410_RTCCON
) & S3C2410_RTCCON_CLKRST
)){
430 dev_info(&pdev
->dev
, "removing RTCCON_CLKRST\n");
432 tmp
= readb(base
+ S3C2410_RTCCON
);
433 writeb(tmp
& ~S3C2410_RTCCON_CLKRST
, base
+S3C2410_RTCCON
);
438 static int s3c_rtc_remove(struct platform_device
*dev
)
440 struct rtc_device
*rtc
= platform_get_drvdata(dev
);
442 platform_set_drvdata(dev
, NULL
);
443 rtc_device_unregister(rtc
);
448 iounmap(s3c_rtc_base
);
449 release_resource(s3c_rtc_mem
);
455 static int s3c_rtc_probe(struct platform_device
*pdev
)
457 struct rtc_device
*rtc
;
458 struct resource
*res
;
461 pr_debug("%s: probe=%p\n", __FUNCTION__
, pdev
);
465 s3c_rtc_tickno
= platform_get_irq(pdev
, 1);
466 if (s3c_rtc_tickno
< 0) {
467 dev_err(&pdev
->dev
, "no irq for rtc tick\n");
471 s3c_rtc_alarmno
= platform_get_irq(pdev
, 0);
472 if (s3c_rtc_alarmno
< 0) {
473 dev_err(&pdev
->dev
, "no irq for alarm\n");
477 pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
478 s3c_rtc_tickno
, s3c_rtc_alarmno
);
480 /* get the memory region */
482 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
484 dev_err(&pdev
->dev
, "failed to get memory region resource\n");
488 s3c_rtc_mem
= request_mem_region(res
->start
,
489 res
->end
-res
->start
+1,
492 if (s3c_rtc_mem
== NULL
) {
493 dev_err(&pdev
->dev
, "failed to reserve memory region\n");
498 s3c_rtc_base
= ioremap(res
->start
, res
->end
- res
->start
+ 1);
499 if (s3c_rtc_base
== NULL
) {
500 dev_err(&pdev
->dev
, "failed ioremap()\n");
505 /* check to see if everything is setup correctly */
507 s3c_rtc_enable(pdev
, 1);
509 pr_debug("s3c2410_rtc: RTCCON=%02x\n",
510 readb(s3c_rtc_base
+ S3C2410_RTCCON
));
512 s3c_rtc_setfreq(s3c_rtc_freq
);
514 /* register RTC and exit */
516 rtc
= rtc_device_register("s3c", &pdev
->dev
, &s3c_rtcops
,
520 dev_err(&pdev
->dev
, "cannot attach rtc\n");
525 rtc
->max_user_freq
= 128;
527 platform_set_drvdata(pdev
, rtc
);
531 s3c_rtc_enable(pdev
, 0);
532 iounmap(s3c_rtc_base
);
535 release_resource(s3c_rtc_mem
);
543 /* RTC Power management control */
545 static struct timespec s3c_rtc_delta
;
547 static int ticnt_save
;
549 static int s3c_rtc_suspend(struct platform_device
*pdev
, pm_message_t state
)
552 struct timespec time
;
556 /* save TICNT for anyone using periodic interrupts */
558 ticnt_save
= readb(s3c_rtc_base
+ S3C2410_TICNT
);
560 /* calculate time delta for suspend */
562 s3c_rtc_gettime(&pdev
->dev
, &tm
);
563 rtc_tm_to_time(&tm
, &time
.tv_sec
);
564 save_time_delta(&s3c_rtc_delta
, &time
);
565 s3c_rtc_enable(pdev
, 0);
570 static int s3c_rtc_resume(struct platform_device
*pdev
)
573 struct timespec time
;
577 s3c_rtc_enable(pdev
, 1);
578 s3c_rtc_gettime(&pdev
->dev
, &tm
);
579 rtc_tm_to_time(&tm
, &time
.tv_sec
);
580 restore_time_delta(&s3c_rtc_delta
, &time
);
582 writeb(ticnt_save
, s3c_rtc_base
+ S3C2410_TICNT
);
586 #define s3c_rtc_suspend NULL
587 #define s3c_rtc_resume NULL
590 static struct platform_driver s3c2410_rtcdrv
= {
591 .probe
= s3c_rtc_probe
,
592 .remove
= s3c_rtc_remove
,
593 .suspend
= s3c_rtc_suspend
,
594 .resume
= s3c_rtc_resume
,
596 .name
= "s3c2410-rtc",
597 .owner
= THIS_MODULE
,
601 static char __initdata banner
[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
603 static int __init
s3c_rtc_init(void)
606 return platform_driver_register(&s3c2410_rtcdrv
);
609 static void __exit
s3c_rtc_exit(void)
611 platform_driver_unregister(&s3c2410_rtcdrv
);
614 module_init(s3c_rtc_init
);
615 module_exit(s3c_rtc_exit
);
617 MODULE_DESCRIPTION("Samsung S3C RTC Driver");
618 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
619 MODULE_LICENSE("GPL");