Linux 2.6.20.7
[linux/fpc-iii.git] / drivers / serial / atmel_serial.c
blob881f886b91c64ea604a90a2b011f75a0990ea88b
1 /*
2 * linux/drivers/char/atmel_serial.c
4 * Driver for Atmel AT91 / AT32 Serial ports
5 * Copyright (C) 2003 Rick Bronson
7 * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
8 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
37 #include <asm/io.h>
39 #include <asm/mach/serial_at91.h>
40 #include <asm/arch/board.h>
41 #include <asm/arch/at91_pdc.h>
42 #ifdef CONFIG_ARM
43 #include <asm/arch/cpu.h>
44 #include <asm/arch/gpio.h>
45 #endif
47 #include "atmel_serial.h"
49 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
50 #define SUPPORT_SYSRQ
51 #endif
53 #include <linux/serial_core.h>
55 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
57 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
58 * should coexist with the 8250 driver, such as if we have an external 16C550
59 * UART. */
60 #define SERIAL_ATMEL_MAJOR 204
61 #define MINOR_START 154
62 #define ATMEL_DEVICENAME "ttyAT"
64 #else
66 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
67 * name, but it is legally reserved for the 8250 driver. */
68 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
69 #define MINOR_START 64
70 #define ATMEL_DEVICENAME "ttyS"
72 #endif
74 #define ATMEL_ISR_PASS_LIMIT 256
76 #define UART_PUT_CR(port,v) writel(v, (port)->membase + ATMEL_US_CR)
77 #define UART_GET_MR(port) readl((port)->membase + ATMEL_US_MR)
78 #define UART_PUT_MR(port,v) writel(v, (port)->membase + ATMEL_US_MR)
79 #define UART_PUT_IER(port,v) writel(v, (port)->membase + ATMEL_US_IER)
80 #define UART_PUT_IDR(port,v) writel(v, (port)->membase + ATMEL_US_IDR)
81 #define UART_GET_IMR(port) readl((port)->membase + ATMEL_US_IMR)
82 #define UART_GET_CSR(port) readl((port)->membase + ATMEL_US_CSR)
83 #define UART_GET_CHAR(port) readl((port)->membase + ATMEL_US_RHR)
84 #define UART_PUT_CHAR(port,v) writel(v, (port)->membase + ATMEL_US_THR)
85 #define UART_GET_BRGR(port) readl((port)->membase + ATMEL_US_BRGR)
86 #define UART_PUT_BRGR(port,v) writel(v, (port)->membase + ATMEL_US_BRGR)
87 #define UART_PUT_RTOR(port,v) writel(v, (port)->membase + ATMEL_US_RTOR)
89 // #define UART_GET_CR(port) readl((port)->membase + ATMEL_US_CR) // is write-only
91 /* PDC registers */
92 #define UART_PUT_PTCR(port,v) writel(v, (port)->membase + ATMEL_PDC_PTCR)
93 #define UART_GET_PTSR(port) readl((port)->membase + ATMEL_PDC_PTSR)
95 #define UART_PUT_RPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RPR)
96 #define UART_GET_RPR(port) readl((port)->membase + ATMEL_PDC_RPR)
97 #define UART_PUT_RCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RCR)
98 #define UART_PUT_RNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNPR)
99 #define UART_PUT_RNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNCR)
101 #define UART_PUT_TPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TPR)
102 #define UART_PUT_TCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TCR)
103 //#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNPR)
104 //#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNCR)
106 static int (*atmel_open_hook)(struct uart_port *);
107 static void (*atmel_close_hook)(struct uart_port *);
110 * We wrap our port structure around the generic uart_port.
112 struct atmel_uart_port {
113 struct uart_port uart; /* uart */
114 struct clk *clk; /* uart clock */
115 unsigned short suspended; /* is port suspended? */
118 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
120 #ifdef SUPPORT_SYSRQ
121 static struct console atmel_console;
122 #endif
125 * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
127 static u_int atmel_tx_empty(struct uart_port *port)
129 return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
133 * Set state of the modem control output lines
135 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
137 unsigned int control = 0;
138 unsigned int mode;
140 #ifdef CONFIG_ARCH_AT91RM9200
141 if (cpu_is_at91rm9200()) {
143 * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21.
144 * We need to drive the pin manually.
146 if (port->mapbase == AT91RM9200_BASE_US0) {
147 if (mctrl & TIOCM_RTS)
148 at91_set_gpio_value(AT91_PIN_PA21, 0);
149 else
150 at91_set_gpio_value(AT91_PIN_PA21, 1);
153 #endif
155 if (mctrl & TIOCM_RTS)
156 control |= ATMEL_US_RTSEN;
157 else
158 control |= ATMEL_US_RTSDIS;
160 if (mctrl & TIOCM_DTR)
161 control |= ATMEL_US_DTREN;
162 else
163 control |= ATMEL_US_DTRDIS;
165 UART_PUT_CR(port, control);
167 /* Local loopback mode? */
168 mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
169 if (mctrl & TIOCM_LOOP)
170 mode |= ATMEL_US_CHMODE_LOC_LOOP;
171 else
172 mode |= ATMEL_US_CHMODE_NORMAL;
173 UART_PUT_MR(port, mode);
177 * Get state of the modem control input lines
179 static u_int atmel_get_mctrl(struct uart_port *port)
181 unsigned int status, ret = 0;
183 status = UART_GET_CSR(port);
186 * The control signals are active low.
188 if (!(status & ATMEL_US_DCD))
189 ret |= TIOCM_CD;
190 if (!(status & ATMEL_US_CTS))
191 ret |= TIOCM_CTS;
192 if (!(status & ATMEL_US_DSR))
193 ret |= TIOCM_DSR;
194 if (!(status & ATMEL_US_RI))
195 ret |= TIOCM_RI;
197 return ret;
201 * Stop transmitting.
203 static void atmel_stop_tx(struct uart_port *port)
205 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
207 UART_PUT_IDR(port, ATMEL_US_TXRDY);
211 * Start transmitting.
213 static void atmel_start_tx(struct uart_port *port)
215 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
217 UART_PUT_IER(port, ATMEL_US_TXRDY);
221 * Stop receiving - port is in process of being closed.
223 static void atmel_stop_rx(struct uart_port *port)
225 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
227 UART_PUT_IDR(port, ATMEL_US_RXRDY);
231 * Enable modem status interrupts
233 static void atmel_enable_ms(struct uart_port *port)
235 UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
239 * Control the transmission of a break signal
241 static void atmel_break_ctl(struct uart_port *port, int break_state)
243 if (break_state != 0)
244 UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
245 else
246 UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
250 * Characters received (called from interrupt handler)
252 static void atmel_rx_chars(struct uart_port *port)
254 struct tty_struct *tty = port->info->tty;
255 unsigned int status, ch, flg;
257 status = UART_GET_CSR(port);
258 while (status & ATMEL_US_RXRDY) {
259 ch = UART_GET_CHAR(port);
261 port->icount.rx++;
263 flg = TTY_NORMAL;
266 * note that the error handling code is
267 * out of the main execution path
269 if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
270 UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */
271 if (status & ATMEL_US_RXBRK) {
272 status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */
273 port->icount.brk++;
274 if (uart_handle_break(port))
275 goto ignore_char;
277 if (status & ATMEL_US_PARE)
278 port->icount.parity++;
279 if (status & ATMEL_US_FRAME)
280 port->icount.frame++;
281 if (status & ATMEL_US_OVRE)
282 port->icount.overrun++;
284 status &= port->read_status_mask;
286 if (status & ATMEL_US_RXBRK)
287 flg = TTY_BREAK;
288 else if (status & ATMEL_US_PARE)
289 flg = TTY_PARITY;
290 else if (status & ATMEL_US_FRAME)
291 flg = TTY_FRAME;
294 if (uart_handle_sysrq_char(port, ch))
295 goto ignore_char;
297 uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg);
299 ignore_char:
300 status = UART_GET_CSR(port);
303 tty_flip_buffer_push(tty);
307 * Transmit characters (called from interrupt handler)
309 static void atmel_tx_chars(struct uart_port *port)
311 struct circ_buf *xmit = &port->info->xmit;
313 if (port->x_char) {
314 UART_PUT_CHAR(port, port->x_char);
315 port->icount.tx++;
316 port->x_char = 0;
317 return;
319 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
320 atmel_stop_tx(port);
321 return;
324 while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
325 UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
326 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
327 port->icount.tx++;
328 if (uart_circ_empty(xmit))
329 break;
332 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
333 uart_write_wakeup(port);
335 if (uart_circ_empty(xmit))
336 atmel_stop_tx(port);
340 * Interrupt handler
342 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
344 struct uart_port *port = dev_id;
345 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
346 unsigned int status, pending, pass_counter = 0;
348 status = UART_GET_CSR(port);
349 pending = status & UART_GET_IMR(port);
350 while (pending) {
351 /* Interrupt receive */
352 if (pending & ATMEL_US_RXRDY)
353 atmel_rx_chars(port);
355 // TODO: All reads to CSR will clear these interrupts!
356 if (pending & ATMEL_US_RIIC) port->icount.rng++;
357 if (pending & ATMEL_US_DSRIC) port->icount.dsr++;
358 if (pending & ATMEL_US_DCDIC)
359 uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
360 if (pending & ATMEL_US_CTSIC)
361 uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
362 if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC))
363 wake_up_interruptible(&port->info->delta_msr_wait);
365 /* Interrupt transmit */
366 if (pending & ATMEL_US_TXRDY)
367 atmel_tx_chars(port);
369 if (pass_counter++ > ATMEL_ISR_PASS_LIMIT)
370 break;
372 status = UART_GET_CSR(port);
373 pending = status & UART_GET_IMR(port);
375 return IRQ_HANDLED;
379 * Perform initialization and enable port for reception
381 static int atmel_startup(struct uart_port *port)
383 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
384 int retval;
387 * Ensure that no interrupts are enabled otherwise when
388 * request_irq() is called we could get stuck trying to
389 * handle an unexpected interrupt
391 UART_PUT_IDR(port, -1);
394 * Allocate the IRQ
396 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, "atmel_serial", port);
397 if (retval) {
398 printk("atmel_serial: atmel_startup - Can't get irq\n");
399 return retval;
403 * If there is a specific "open" function (to register
404 * control line interrupts)
406 if (atmel_open_hook) {
407 retval = atmel_open_hook(port);
408 if (retval) {
409 free_irq(port->irq, port);
410 return retval;
415 * Finally, enable the serial port
417 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
418 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */
420 UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */
422 return 0;
426 * Disable the port
428 static void atmel_shutdown(struct uart_port *port)
430 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
433 * Disable all interrupts, port and break condition.
435 UART_PUT_CR(port, ATMEL_US_RSTSTA);
436 UART_PUT_IDR(port, -1);
439 * Free the interrupt
441 free_irq(port->irq, port);
444 * If there is a specific "close" function (to unregister
445 * control line interrupts)
447 if (atmel_close_hook)
448 atmel_close_hook(port);
452 * Power / Clock management.
454 static void atmel_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
456 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
458 switch (state) {
459 case 0:
461 * Enable the peripheral clock for this serial port.
462 * This is called on uart_open() or a resume event.
464 clk_enable(atmel_port->clk);
465 break;
466 case 3:
468 * Disable the peripheral clock for this serial port.
469 * This is called on uart_close() or a suspend event.
471 clk_disable(atmel_port->clk);
472 break;
473 default:
474 printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
479 * Change the port parameters
481 static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old)
483 unsigned long flags;
484 unsigned int mode, imr, quot, baud;
486 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
487 quot = uart_get_divisor(port, baud);
489 /* Get current mode register */
490 mode = UART_GET_MR(port) & ~(ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR);
492 /* byte size */
493 switch (termios->c_cflag & CSIZE) {
494 case CS5:
495 mode |= ATMEL_US_CHRL_5;
496 break;
497 case CS6:
498 mode |= ATMEL_US_CHRL_6;
499 break;
500 case CS7:
501 mode |= ATMEL_US_CHRL_7;
502 break;
503 default:
504 mode |= ATMEL_US_CHRL_8;
505 break;
508 /* stop bits */
509 if (termios->c_cflag & CSTOPB)
510 mode |= ATMEL_US_NBSTOP_2;
512 /* parity */
513 if (termios->c_cflag & PARENB) {
514 if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */
515 if (termios->c_cflag & PARODD)
516 mode |= ATMEL_US_PAR_MARK;
517 else
518 mode |= ATMEL_US_PAR_SPACE;
520 else if (termios->c_cflag & PARODD)
521 mode |= ATMEL_US_PAR_ODD;
522 else
523 mode |= ATMEL_US_PAR_EVEN;
525 else
526 mode |= ATMEL_US_PAR_NONE;
528 spin_lock_irqsave(&port->lock, flags);
530 port->read_status_mask = ATMEL_US_OVRE;
531 if (termios->c_iflag & INPCK)
532 port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
533 if (termios->c_iflag & (BRKINT | PARMRK))
534 port->read_status_mask |= ATMEL_US_RXBRK;
537 * Characters to ignore
539 port->ignore_status_mask = 0;
540 if (termios->c_iflag & IGNPAR)
541 port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
542 if (termios->c_iflag & IGNBRK) {
543 port->ignore_status_mask |= ATMEL_US_RXBRK;
545 * If we're ignoring parity and break indicators,
546 * ignore overruns too (for real raw support).
548 if (termios->c_iflag & IGNPAR)
549 port->ignore_status_mask |= ATMEL_US_OVRE;
552 // TODO: Ignore all characters if CREAD is set.
554 /* update the per-port timeout */
555 uart_update_timeout(port, termios->c_cflag, baud);
557 /* disable interrupts and drain transmitter */
558 imr = UART_GET_IMR(port); /* get interrupt mask */
559 UART_PUT_IDR(port, -1); /* disable all interrupts */
560 while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) { barrier(); }
562 /* disable receiver and transmitter */
563 UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
565 /* set the parity, stop bits and data size */
566 UART_PUT_MR(port, mode);
568 /* set the baud rate */
569 UART_PUT_BRGR(port, quot);
570 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
571 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
573 /* restore interrupts */
574 UART_PUT_IER(port, imr);
576 /* CTS flow-control and modem-status interrupts */
577 if (UART_ENABLE_MS(port, termios->c_cflag))
578 port->ops->enable_ms(port);
580 spin_unlock_irqrestore(&port->lock, flags);
584 * Return string describing the specified port
586 static const char *atmel_type(struct uart_port *port)
588 return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
592 * Release the memory region(s) being used by 'port'.
594 static void atmel_release_port(struct uart_port *port)
596 struct platform_device *pdev = to_platform_device(port->dev);
597 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
599 release_mem_region(port->mapbase, size);
601 if (port->flags & UPF_IOREMAP) {
602 iounmap(port->membase);
603 port->membase = NULL;
608 * Request the memory region(s) being used by 'port'.
610 static int atmel_request_port(struct uart_port *port)
612 struct platform_device *pdev = to_platform_device(port->dev);
613 int size = pdev->resource[0].end - pdev->resource[0].start + 1;
615 if (!request_mem_region(port->mapbase, size, "atmel_serial"))
616 return -EBUSY;
618 if (port->flags & UPF_IOREMAP) {
619 port->membase = ioremap(port->mapbase, size);
620 if (port->membase == NULL) {
621 release_mem_region(port->mapbase, size);
622 return -ENOMEM;
626 return 0;
630 * Configure/autoconfigure the port.
632 static void atmel_config_port(struct uart_port *port, int flags)
634 if (flags & UART_CONFIG_TYPE) {
635 port->type = PORT_ATMEL;
636 atmel_request_port(port);
641 * Verify the new serial_struct (for TIOCSSERIAL).
643 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
645 int ret = 0;
646 if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
647 ret = -EINVAL;
648 if (port->irq != ser->irq)
649 ret = -EINVAL;
650 if (ser->io_type != SERIAL_IO_MEM)
651 ret = -EINVAL;
652 if (port->uartclk / 16 != ser->baud_base)
653 ret = -EINVAL;
654 if ((void *)port->mapbase != ser->iomem_base)
655 ret = -EINVAL;
656 if (port->iobase != ser->port)
657 ret = -EINVAL;
658 if (ser->hub6 != 0)
659 ret = -EINVAL;
660 return ret;
663 static struct uart_ops atmel_pops = {
664 .tx_empty = atmel_tx_empty,
665 .set_mctrl = atmel_set_mctrl,
666 .get_mctrl = atmel_get_mctrl,
667 .stop_tx = atmel_stop_tx,
668 .start_tx = atmel_start_tx,
669 .stop_rx = atmel_stop_rx,
670 .enable_ms = atmel_enable_ms,
671 .break_ctl = atmel_break_ctl,
672 .startup = atmel_startup,
673 .shutdown = atmel_shutdown,
674 .set_termios = atmel_set_termios,
675 .type = atmel_type,
676 .release_port = atmel_release_port,
677 .request_port = atmel_request_port,
678 .config_port = atmel_config_port,
679 .verify_port = atmel_verify_port,
680 .pm = atmel_serial_pm,
684 * Configure the port from the platform device resource info.
686 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct platform_device *pdev)
688 struct uart_port *port = &atmel_port->uart;
689 struct atmel_uart_data *data = pdev->dev.platform_data;
691 port->iotype = UPIO_MEM;
692 port->flags = UPF_BOOT_AUTOCONF;
693 port->ops = &atmel_pops;
694 port->fifosize = 1;
695 port->line = pdev->id;
696 port->dev = &pdev->dev;
698 port->mapbase = pdev->resource[0].start;
699 port->irq = pdev->resource[1].start;
701 if (data->regs)
702 /* Already mapped by setup code */
703 port->membase = data->regs;
704 else {
705 port->flags |= UPF_IOREMAP;
706 port->membase = NULL;
709 if (!atmel_port->clk) { /* for console, the clock could already be configured */
710 atmel_port->clk = clk_get(&pdev->dev, "usart");
711 clk_enable(atmel_port->clk);
712 port->uartclk = clk_get_rate(atmel_port->clk);
717 * Register board-specific modem-control line handlers.
719 void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
721 if (fns->enable_ms)
722 atmel_pops.enable_ms = fns->enable_ms;
723 if (fns->get_mctrl)
724 atmel_pops.get_mctrl = fns->get_mctrl;
725 if (fns->set_mctrl)
726 atmel_pops.set_mctrl = fns->set_mctrl;
727 atmel_open_hook = fns->open;
728 atmel_close_hook = fns->close;
729 atmel_pops.pm = fns->pm;
730 atmel_pops.set_wake = fns->set_wake;
734 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
735 static void atmel_console_putchar(struct uart_port *port, int ch)
737 while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
738 barrier();
739 UART_PUT_CHAR(port, ch);
743 * Interrupts are disabled on entering
745 static void atmel_console_write(struct console *co, const char *s, u_int count)
747 struct uart_port *port = &atmel_ports[co->index].uart;
748 unsigned int status, imr;
751 * First, save IMR and then disable interrupts
753 imr = UART_GET_IMR(port); /* get interrupt mask */
754 UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
756 uart_console_write(port, s, count, atmel_console_putchar);
759 * Finally, wait for transmitter to become empty
760 * and restore IMR
762 do {
763 status = UART_GET_CSR(port);
764 } while (!(status & ATMEL_US_TXRDY));
765 UART_PUT_IER(port, imr); /* set interrupts back the way they were */
769 * If the port was already initialised (eg, by a boot loader), try to determine
770 * the current setup.
772 static void __init atmel_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits)
774 unsigned int mr, quot;
776 // TODO: CR is a write-only register
777 // unsigned int cr;
779 // cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN);
780 // if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) {
781 // /* ok, the port was enabled */
782 // }
784 mr = UART_GET_MR(port) & ATMEL_US_CHRL;
785 if (mr == ATMEL_US_CHRL_8)
786 *bits = 8;
787 else
788 *bits = 7;
790 mr = UART_GET_MR(port) & ATMEL_US_PAR;
791 if (mr == ATMEL_US_PAR_EVEN)
792 *parity = 'e';
793 else if (mr == ATMEL_US_PAR_ODD)
794 *parity = 'o';
797 * The serial core only rounds down when matching this to a
798 * supported baud rate. Make sure we don't end up slightly
799 * lower than one of those, as it would make us fall through
800 * to a much lower baud rate than we really want.
802 quot = UART_GET_BRGR(port);
803 *baud = port->uartclk / (16 * (quot - 1));
806 static int __init atmel_console_setup(struct console *co, char *options)
808 struct uart_port *port = &atmel_ports[co->index].uart;
809 int baud = 115200;
810 int bits = 8;
811 int parity = 'n';
812 int flow = 'n';
814 if (port->membase == 0) /* Port not initialized yet - delay setup */
815 return -ENODEV;
817 UART_PUT_IDR(port, -1); /* disable interrupts */
818 UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
819 UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
821 if (options)
822 uart_parse_options(options, &baud, &parity, &bits, &flow);
823 else
824 atmel_console_get_options(port, &baud, &parity, &bits);
826 return uart_set_options(port, co, baud, parity, bits, flow);
829 static struct uart_driver atmel_uart;
831 static struct console atmel_console = {
832 .name = ATMEL_DEVICENAME,
833 .write = atmel_console_write,
834 .device = uart_console_device,
835 .setup = atmel_console_setup,
836 .flags = CON_PRINTBUFFER,
837 .index = -1,
838 .data = &atmel_uart,
841 #define ATMEL_CONSOLE_DEVICE &atmel_console
844 * Early console initialization (before VM subsystem initialized).
846 static int __init atmel_console_init(void)
848 if (atmel_default_console_device) {
849 add_preferred_console(ATMEL_DEVICENAME, atmel_default_console_device->id, NULL);
850 atmel_init_port(&(atmel_ports[atmel_default_console_device->id]), atmel_default_console_device);
851 register_console(&atmel_console);
854 return 0;
856 console_initcall(atmel_console_init);
859 * Late console initialization.
861 static int __init atmel_late_console_init(void)
863 if (atmel_default_console_device && !(atmel_console.flags & CON_ENABLED))
864 register_console(&atmel_console);
866 return 0;
868 core_initcall(atmel_late_console_init);
870 #else
871 #define ATMEL_CONSOLE_DEVICE NULL
872 #endif
874 static struct uart_driver atmel_uart = {
875 .owner = THIS_MODULE,
876 .driver_name = "atmel_serial",
877 .dev_name = ATMEL_DEVICENAME,
878 .major = SERIAL_ATMEL_MAJOR,
879 .minor = MINOR_START,
880 .nr = ATMEL_MAX_UART,
881 .cons = ATMEL_CONSOLE_DEVICE,
884 #ifdef CONFIG_PM
885 static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state)
887 struct uart_port *port = platform_get_drvdata(pdev);
888 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
890 if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock())
891 enable_irq_wake(port->irq);
892 else {
893 uart_suspend_port(&atmel_uart, port);
894 atmel_port->suspended = 1;
897 return 0;
900 static int atmel_serial_resume(struct platform_device *pdev)
902 struct uart_port *port = platform_get_drvdata(pdev);
903 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
905 if (atmel_port->suspended) {
906 uart_resume_port(&atmel_uart, port);
907 atmel_port->suspended = 0;
909 else
910 disable_irq_wake(port->irq);
912 return 0;
914 #else
915 #define atmel_serial_suspend NULL
916 #define atmel_serial_resume NULL
917 #endif
919 static int __devinit atmel_serial_probe(struct platform_device *pdev)
921 struct atmel_uart_port *port;
922 int ret;
924 port = &atmel_ports[pdev->id];
925 atmel_init_port(port, pdev);
927 ret = uart_add_one_port(&atmel_uart, &port->uart);
928 if (!ret) {
929 device_init_wakeup(&pdev->dev, 1);
930 platform_set_drvdata(pdev, port);
933 return ret;
936 static int __devexit atmel_serial_remove(struct platform_device *pdev)
938 struct uart_port *port = platform_get_drvdata(pdev);
939 struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port;
940 int ret = 0;
942 clk_disable(atmel_port->clk);
943 clk_put(atmel_port->clk);
945 device_init_wakeup(&pdev->dev, 0);
946 platform_set_drvdata(pdev, NULL);
948 if (port) {
949 ret = uart_remove_one_port(&atmel_uart, port);
950 kfree(port);
953 return ret;
956 static struct platform_driver atmel_serial_driver = {
957 .probe = atmel_serial_probe,
958 .remove = __devexit_p(atmel_serial_remove),
959 .suspend = atmel_serial_suspend,
960 .resume = atmel_serial_resume,
961 .driver = {
962 .name = "atmel_usart",
963 .owner = THIS_MODULE,
967 static int __init atmel_serial_init(void)
969 int ret;
971 ret = uart_register_driver(&atmel_uart);
972 if (ret)
973 return ret;
975 ret = platform_driver_register(&atmel_serial_driver);
976 if (ret)
977 uart_unregister_driver(&atmel_uart);
979 return ret;
982 static void __exit atmel_serial_exit(void)
984 platform_driver_unregister(&atmel_serial_driver);
985 uart_unregister_driver(&atmel_uart);
988 module_init(atmel_serial_init);
989 module_exit(atmel_serial_exit);
991 MODULE_AUTHOR("Rick Bronson");
992 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
993 MODULE_LICENSE("GPL");