2 * Copyright (C) 2013 Altera Corporation
3 * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
5 * Based on cpuinfo.c from microblaze
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/seq_file.h>
26 #include <linux/string.h>
28 #include <asm/cpuinfo.h>
30 struct cpuinfo cpuinfo
;
33 pr_err("ERROR: Nios II " x " different for kernel and DTS\n")
35 static inline u32
fcpu(struct device_node
*cpu
, const char *n
)
39 of_property_read_u32(cpu
, n
, &val
);
44 void __init
setup_cpuinfo(void)
46 struct device_node
*cpu
;
50 cpu
= of_find_node_by_type(NULL
, "cpu");
52 panic("%s: No CPU found in devicetree!\n", __func__
);
54 if (!of_property_read_bool(cpu
, "altr,has-initda"))
55 panic("initda instruction is unimplemented. Please update your "
56 "hardware system to have more than 4-byte line data "
59 cpuinfo
.cpu_clock_freq
= fcpu(cpu
, "clock-frequency");
61 str
= of_get_property(cpu
, "altr,implementation", &len
);
63 strlcpy(cpuinfo
.cpu_impl
, str
, sizeof(cpuinfo
.cpu_impl
));
65 strcpy(cpuinfo
.cpu_impl
, "<unknown>");
67 cpuinfo
.has_div
= of_property_read_bool(cpu
, "altr,has-div");
68 cpuinfo
.has_mul
= of_property_read_bool(cpu
, "altr,has-mul");
69 cpuinfo
.has_mulx
= of_property_read_bool(cpu
, "altr,has-mulx");
70 cpuinfo
.has_bmx
= of_property_read_bool(cpu
, "altr,has-bmx");
71 cpuinfo
.has_cdx
= of_property_read_bool(cpu
, "altr,has-cdx");
72 cpuinfo
.mmu
= of_property_read_bool(cpu
, "altr,has-mmu");
74 if (IS_ENABLED(CONFIG_NIOS2_HW_DIV_SUPPORT
) && !cpuinfo
.has_div
)
77 if (IS_ENABLED(CONFIG_NIOS2_HW_MUL_SUPPORT
) && !cpuinfo
.has_mul
)
80 if (IS_ENABLED(CONFIG_NIOS2_HW_MULX_SUPPORT
) && !cpuinfo
.has_mulx
)
83 if (IS_ENABLED(CONFIG_NIOS2_BMX_SUPPORT
) && !cpuinfo
.has_bmx
)
86 if (IS_ENABLED(CONFIG_NIOS2_CDX_SUPPORT
) && !cpuinfo
.has_cdx
)
89 cpuinfo
.tlb_num_ways
= fcpu(cpu
, "altr,tlb-num-ways");
90 if (!cpuinfo
.tlb_num_ways
)
91 panic("altr,tlb-num-ways can't be 0. Please check your hardware "
93 cpuinfo
.icache_line_size
= fcpu(cpu
, "icache-line-size");
94 cpuinfo
.icache_size
= fcpu(cpu
, "icache-size");
95 if (CONFIG_NIOS2_ICACHE_SIZE
!= cpuinfo
.icache_size
)
96 pr_warn("Warning: icache size configuration mismatch "
97 "(0x%x vs 0x%x) of CONFIG_NIOS2_ICACHE_SIZE vs "
98 "device tree icache-size\n",
99 CONFIG_NIOS2_ICACHE_SIZE
, cpuinfo
.icache_size
);
101 cpuinfo
.dcache_line_size
= fcpu(cpu
, "dcache-line-size");
102 if (CONFIG_NIOS2_DCACHE_LINE_SIZE
!= cpuinfo
.dcache_line_size
)
103 pr_warn("Warning: dcache line size configuration mismatch "
104 "(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_LINE_SIZE vs "
105 "device tree dcache-line-size\n",
106 CONFIG_NIOS2_DCACHE_LINE_SIZE
, cpuinfo
.dcache_line_size
);
107 cpuinfo
.dcache_size
= fcpu(cpu
, "dcache-size");
108 if (CONFIG_NIOS2_DCACHE_SIZE
!= cpuinfo
.dcache_size
)
109 pr_warn("Warning: dcache size configuration mismatch "
110 "(0x%x vs 0x%x) of CONFIG_NIOS2_DCACHE_SIZE vs "
111 "device tree dcache-size\n",
112 CONFIG_NIOS2_DCACHE_SIZE
, cpuinfo
.dcache_size
);
114 cpuinfo
.tlb_pid_num_bits
= fcpu(cpu
, "altr,pid-num-bits");
115 cpuinfo
.tlb_num_ways_log2
= ilog2(cpuinfo
.tlb_num_ways
);
116 cpuinfo
.tlb_num_entries
= fcpu(cpu
, "altr,tlb-num-entries");
117 cpuinfo
.tlb_num_lines
= cpuinfo
.tlb_num_entries
/ cpuinfo
.tlb_num_ways
;
118 cpuinfo
.tlb_ptr_sz
= fcpu(cpu
, "altr,tlb-ptr-sz");
120 cpuinfo
.reset_addr
= fcpu(cpu
, "altr,reset-addr");
121 cpuinfo
.exception_addr
= fcpu(cpu
, "altr,exception-addr");
122 cpuinfo
.fast_tlb_miss_exc_addr
= fcpu(cpu
, "altr,fast-tlb-miss-addr");
125 #ifdef CONFIG_PROC_FS
128 * Get CPU information for use by the procfs.
130 static int show_cpuinfo(struct seq_file
*m
, void *v
)
132 const u32 clockfreq
= cpuinfo
.cpu_clock_freq
;
135 "CPU:\t\tNios II/%s\n"
139 "Clocking:\t%u.%02u MHz\n"
140 "BogoMips:\t%lu.%02lu\n"
141 "Calibration:\t%lu loops\n",
143 CONFIG_NIOS2_ARCH_REVISION
,
144 cpuinfo
.mmu
? "present" : "none",
145 clockfreq
/ 1000000, (clockfreq
/ 100000) % 10,
146 (loops_per_jiffy
* HZ
) / 500000,
147 ((loops_per_jiffy
* HZ
) / 5000) % 100,
148 (loops_per_jiffy
* HZ
));
157 cpuinfo
.has_mul
? "yes" : "no",
158 cpuinfo
.has_mulx
? "yes" : "no",
159 cpuinfo
.has_div
? "yes" : "no",
160 cpuinfo
.has_bmx
? "yes" : "no",
161 cpuinfo
.has_cdx
? "yes" : "no");
164 "Icache:\t\t%ukB, line length: %u\n",
165 cpuinfo
.icache_size
>> 10,
166 cpuinfo
.icache_line_size
);
169 "Dcache:\t\t%ukB, line length: %u\n",
170 cpuinfo
.dcache_size
>> 10,
171 cpuinfo
.dcache_line_size
);
174 "TLB:\t\t%u ways, %u entries, %u PID bits\n",
175 cpuinfo
.tlb_num_ways
,
176 cpuinfo
.tlb_num_entries
,
177 cpuinfo
.tlb_pid_num_bits
);
182 static void *cpuinfo_start(struct seq_file
*m
, loff_t
*pos
)
184 unsigned long i
= *pos
;
186 return i
< num_possible_cpus() ? (void *) (i
+ 1) : NULL
;
189 static void *cpuinfo_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
192 return cpuinfo_start(m
, pos
);
195 static void cpuinfo_stop(struct seq_file
*m
, void *v
)
199 const struct seq_operations cpuinfo_op
= {
200 .start
= cpuinfo_start
,
201 .next
= cpuinfo_next
,
202 .stop
= cpuinfo_stop
,
206 #endif /* CONFIG_PROC_FS */