2 * Common pmac/prep/chrp pci routines. -- Cort
5 #include <linux/kernel.h>
7 #include <linux/delay.h>
8 #include <linux/string.h>
9 #include <linux/init.h>
10 #include <linux/capability.h>
11 #include <linux/sched.h>
12 #include <linux/errno.h>
13 #include <linux/bootmem.h>
14 #include <linux/irq.h>
15 #include <linux/list.h>
17 #include <asm/processor.h>
20 #include <asm/sections.h>
21 #include <asm/pci-bridge.h>
22 #include <asm/byteorder.h>
23 #include <asm/uaccess.h>
24 #include <asm/machdep.h>
29 #define DBG(x...) printk(x)
34 unsigned long isa_io_base
= 0;
35 unsigned long pci_dram_offset
= 0;
36 int pcibios_assign_bus_offset
= 1;
38 void pcibios_make_OF_bus_map(void);
40 static void fixup_broken_pcnet32(struct pci_dev
* dev
);
41 static void fixup_cpc710_pci64(struct pci_dev
* dev
);
43 static u8
* pci_to_OF_bus_map
;
46 /* By default, we don't re-assign bus numbers. We do this only on
49 static int pci_assign_all_buses
;
53 static int pci_bus_count
;
56 fixup_hide_host_resource_fsl(struct pci_dev
* dev
)
58 int i
, class = dev
->class >> 8;
60 if ((class == PCI_CLASS_PROCESSOR_POWERPC
) &&
61 (dev
->hdr_type
== PCI_HEADER_TYPE_NORMAL
) &&
62 (dev
->bus
->parent
== NULL
)) {
63 for (i
= 0; i
< DEVICE_COUNT_RESOURCE
; i
++) {
64 dev
->resource
[i
].start
= 0;
65 dev
->resource
[i
].end
= 0;
66 dev
->resource
[i
].flags
= 0;
70 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MOTOROLA
, PCI_ANY_ID
, fixup_hide_host_resource_fsl
);
71 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE
, PCI_ANY_ID
, fixup_hide_host_resource_fsl
);
74 fixup_broken_pcnet32(struct pci_dev
* dev
)
76 if ((dev
->class>>8 == PCI_CLASS_NETWORK_ETHERNET
)) {
77 dev
->vendor
= PCI_VENDOR_ID_AMD
;
78 pci_write_config_word(dev
, PCI_VENDOR_ID
, PCI_VENDOR_ID_AMD
);
81 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT
, PCI_ANY_ID
, fixup_broken_pcnet32
);
84 fixup_cpc710_pci64(struct pci_dev
* dev
)
86 /* Hide the PCI64 BARs from the kernel as their content doesn't
87 * fit well in the resource management
89 dev
->resource
[0].start
= dev
->resource
[0].end
= 0;
90 dev
->resource
[0].flags
= 0;
91 dev
->resource
[1].start
= dev
->resource
[1].end
= 0;
92 dev
->resource
[1].flags
= 0;
94 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM
, PCI_DEVICE_ID_IBM_CPC710_PCI64
, fixup_cpc710_pci64
);
98 update_bridge_resource(struct pci_dev
*dev
, struct resource
*res
)
100 u8 io_base_lo
, io_limit_lo
;
101 u16 mem_base
, mem_limit
;
103 resource_size_t start
, end
, off
;
104 struct pci_controller
*hose
= dev
->sysdata
;
107 printk("update_bridge_base: no hose?\n");
110 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
111 pci_write_config_word(dev
, PCI_COMMAND
,
112 cmd
& ~(PCI_COMMAND_IO
| PCI_COMMAND_MEMORY
));
113 if (res
->flags
& IORESOURCE_IO
) {
114 off
= (unsigned long) hose
->io_base_virt
- isa_io_base
;
115 start
= res
->start
- off
;
116 end
= res
->end
- off
;
117 io_base_lo
= (start
>> 8) & PCI_IO_RANGE_MASK
;
118 io_limit_lo
= (end
>> 8) & PCI_IO_RANGE_MASK
;
120 io_base_lo
|= PCI_IO_RANGE_TYPE_32
;
122 io_base_lo
|= PCI_IO_RANGE_TYPE_16
;
123 pci_write_config_word(dev
, PCI_IO_BASE_UPPER16
,
125 pci_write_config_word(dev
, PCI_IO_LIMIT_UPPER16
,
127 pci_write_config_byte(dev
, PCI_IO_BASE
, io_base_lo
);
128 pci_write_config_byte(dev
, PCI_IO_LIMIT
, io_limit_lo
);
130 } else if ((res
->flags
& (IORESOURCE_MEM
| IORESOURCE_PREFETCH
))
132 off
= hose
->pci_mem_offset
;
133 mem_base
= ((res
->start
- off
) >> 16) & PCI_MEMORY_RANGE_MASK
;
134 mem_limit
= ((res
->end
- off
) >> 16) & PCI_MEMORY_RANGE_MASK
;
135 pci_write_config_word(dev
, PCI_MEMORY_BASE
, mem_base
);
136 pci_write_config_word(dev
, PCI_MEMORY_LIMIT
, mem_limit
);
138 } else if ((res
->flags
& (IORESOURCE_MEM
| IORESOURCE_PREFETCH
))
139 == (IORESOURCE_MEM
| IORESOURCE_PREFETCH
)) {
140 off
= hose
->pci_mem_offset
;
141 mem_base
= ((res
->start
- off
) >> 16) & PCI_PREF_RANGE_MASK
;
142 mem_limit
= ((res
->end
- off
) >> 16) & PCI_PREF_RANGE_MASK
;
143 pci_write_config_word(dev
, PCI_PREF_MEMORY_BASE
, mem_base
);
144 pci_write_config_word(dev
, PCI_PREF_MEMORY_LIMIT
, mem_limit
);
147 DBG(KERN_ERR
"PCI: ugh, bridge %s res has flags=%lx\n",
148 pci_name(dev
), res
->flags
);
150 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);
156 * Functions below are used on OpenFirmware machines.
159 make_one_node_map(struct device_node
* node
, u8 pci_bus
)
161 const int *bus_range
;
164 if (pci_bus
>= pci_bus_count
)
166 bus_range
= of_get_property(node
, "bus-range", &len
);
167 if (bus_range
== NULL
|| len
< 2 * sizeof(int)) {
168 printk(KERN_WARNING
"Can't get bus-range for %s, "
169 "assuming it starts at 0\n", node
->full_name
);
170 pci_to_OF_bus_map
[pci_bus
] = 0;
172 pci_to_OF_bus_map
[pci_bus
] = bus_range
[0];
174 for (node
=node
->child
; node
!= 0;node
= node
->sibling
) {
176 const unsigned int *class_code
, *reg
;
178 class_code
= of_get_property(node
, "class-code", NULL
);
179 if (!class_code
|| ((*class_code
>> 8) != PCI_CLASS_BRIDGE_PCI
&&
180 (*class_code
>> 8) != PCI_CLASS_BRIDGE_CARDBUS
))
182 reg
= of_get_property(node
, "reg", NULL
);
185 dev
= pci_get_bus_and_slot(pci_bus
, ((reg
[0] >> 8) & 0xff));
186 if (!dev
|| !dev
->subordinate
) {
190 make_one_node_map(node
, dev
->subordinate
->number
);
196 pcibios_make_OF_bus_map(void)
199 struct pci_controller
*hose
, *tmp
;
200 struct property
*map_prop
;
201 struct device_node
*dn
;
203 pci_to_OF_bus_map
= kmalloc(pci_bus_count
, GFP_KERNEL
);
204 if (!pci_to_OF_bus_map
) {
205 printk(KERN_ERR
"Can't allocate OF bus map !\n");
209 /* We fill the bus map with invalid values, that helps
212 for (i
=0; i
<pci_bus_count
; i
++)
213 pci_to_OF_bus_map
[i
] = 0xff;
215 /* For each hose, we begin searching bridges */
216 list_for_each_entry_safe(hose
, tmp
, &hose_list
, list_node
) {
217 struct device_node
* node
= hose
->dn
;
221 make_one_node_map(node
, hose
->first_busno
);
223 dn
= of_find_node_by_path("/");
224 map_prop
= of_find_property(dn
, "pci-OF-bus-map", NULL
);
226 BUG_ON(pci_bus_count
> map_prop
->length
);
227 memcpy(map_prop
->value
, pci_to_OF_bus_map
, pci_bus_count
);
231 printk("PCI->OF bus map:\n");
232 for (i
=0; i
<pci_bus_count
; i
++) {
233 if (pci_to_OF_bus_map
[i
] == 0xff)
235 printk("%d -> %d\n", i
, pci_to_OF_bus_map
[i
]);
240 typedef int (*pci_OF_scan_iterator
)(struct device_node
* node
, void* data
);
242 static struct device_node
*
243 scan_OF_pci_childs(struct device_node
* node
, pci_OF_scan_iterator filter
, void* data
)
245 struct device_node
* sub_node
;
247 for (; node
!= 0;node
= node
->sibling
) {
248 const unsigned int *class_code
;
250 if (filter(node
, data
))
253 /* For PCI<->PCI bridges or CardBus bridges, we go down
254 * Note: some OFs create a parent node "multifunc-device" as
255 * a fake root for all functions of a multi-function device,
256 * we go down them as well.
258 class_code
= of_get_property(node
, "class-code", NULL
);
259 if ((!class_code
|| ((*class_code
>> 8) != PCI_CLASS_BRIDGE_PCI
&&
260 (*class_code
>> 8) != PCI_CLASS_BRIDGE_CARDBUS
)) &&
261 strcmp(node
->name
, "multifunc-device"))
263 sub_node
= scan_OF_pci_childs(node
->child
, filter
, data
);
270 static struct device_node
*scan_OF_for_pci_dev(struct device_node
*parent
,
273 struct device_node
*np
= NULL
;
277 while ((np
= of_get_next_child(parent
, np
)) != NULL
) {
278 reg
= of_get_property(np
, "reg", &psize
);
279 if (reg
== NULL
|| psize
< 4)
281 if (((reg
[0] >> 8) & 0xff) == devfn
)
288 static struct device_node
*scan_OF_for_pci_bus(struct pci_bus
*bus
)
290 struct device_node
*parent
, *np
;
292 /* Are we a root bus ? */
293 if (bus
->self
== NULL
|| bus
->parent
== NULL
) {
294 struct pci_controller
*hose
= pci_bus_to_host(bus
);
297 return of_node_get(hose
->dn
);
300 /* not a root bus, we need to get our parent */
301 parent
= scan_OF_for_pci_bus(bus
->parent
);
305 /* now iterate for children for a match */
306 np
= scan_OF_for_pci_dev(parent
, bus
->self
->devfn
);
313 * Scans the OF tree for a device node matching a PCI device
316 pci_busdev_to_OF_node(struct pci_bus
*bus
, int devfn
)
318 struct device_node
*parent
, *np
;
323 DBG("pci_busdev_to_OF_node(%d,0x%x)\n", bus
->number
, devfn
);
324 parent
= scan_OF_for_pci_bus(bus
);
327 DBG(" parent is %s\n", parent
? parent
->full_name
: "<NULL>");
328 np
= scan_OF_for_pci_dev(parent
, devfn
);
330 DBG(" result is %s\n", np
? np
->full_name
: "<NULL>");
332 /* XXX most callers don't release the returned node
333 * mostly because ppc64 doesn't increase the refcount,
334 * we need to fix that.
338 EXPORT_SYMBOL(pci_busdev_to_OF_node
);
341 pci_device_to_OF_node(struct pci_dev
*dev
)
343 return pci_busdev_to_OF_node(dev
->bus
, dev
->devfn
);
345 EXPORT_SYMBOL(pci_device_to_OF_node
);
348 find_OF_pci_device_filter(struct device_node
* node
, void* data
)
350 return ((void *)node
== data
);
354 * Returns the PCI device matching a given OF node
357 pci_device_from_OF_node(struct device_node
* node
, u8
* bus
, u8
* devfn
)
359 const unsigned int *reg
;
360 struct pci_controller
* hose
;
361 struct pci_dev
* dev
= NULL
;
365 /* Make sure it's really a PCI device */
366 hose
= pci_find_hose_for_OF_device(node
);
367 if (!hose
|| !hose
->dn
)
369 if (!scan_OF_pci_childs(hose
->dn
->child
,
370 find_OF_pci_device_filter
, (void *)node
))
372 reg
= of_get_property(node
, "reg", NULL
);
375 *bus
= (reg
[0] >> 16) & 0xff;
376 *devfn
= ((reg
[0] >> 8) & 0xff);
378 /* Ok, here we need some tweak. If we have already renumbered
379 * all busses, we can't rely on the OF bus number any more.
380 * the pci_to_OF_bus_map is not enough as several PCI busses
381 * may match the same OF bus number.
383 if (!pci_to_OF_bus_map
)
386 for_each_pci_dev(dev
)
387 if (pci_to_OF_bus_map
[dev
->bus
->number
] == *bus
&&
388 dev
->devfn
== *devfn
) {
389 *bus
= dev
->bus
->number
;
396 EXPORT_SYMBOL(pci_device_from_OF_node
);
398 /* We create the "pci-OF-bus-map" property now so it appears in the
402 pci_create_OF_bus_map(void)
404 struct property
* of_prop
;
405 struct device_node
*dn
;
407 of_prop
= (struct property
*) alloc_bootmem(sizeof(struct property
) + 256);
410 dn
= of_find_node_by_path("/");
412 memset(of_prop
, -1, sizeof(struct property
) + 256);
413 of_prop
->name
= "pci-OF-bus-map";
414 of_prop
->length
= 256;
415 of_prop
->value
= &of_prop
[1];
416 prom_add_property(dn
, of_prop
);
421 #else /* CONFIG_PPC_OF */
422 void pcibios_make_OF_bus_map(void)
425 #endif /* CONFIG_PPC_OF */
427 static int __init
pcibios_init(void)
429 struct pci_controller
*hose
, *tmp
;
433 printk(KERN_INFO
"PCI: Probing PCI hardware\n");
435 if (ppc_pci_flags
& PPC_PCI_REASSIGN_ALL_BUS
)
436 pci_assign_all_buses
= 1;
438 /* Scan all of the recorded PCI controllers. */
439 list_for_each_entry_safe(hose
, tmp
, &hose_list
, list_node
) {
440 if (pci_assign_all_buses
)
441 hose
->first_busno
= next_busno
;
442 hose
->last_busno
= 0xff;
443 bus
= pci_scan_bus_parented(hose
->parent
, hose
->first_busno
,
446 pci_bus_add_devices(bus
);
447 hose
->last_busno
= bus
->subordinate
;
449 if (pci_assign_all_buses
|| next_busno
<= hose
->last_busno
)
450 next_busno
= hose
->last_busno
+ pcibios_assign_bus_offset
;
452 pci_bus_count
= next_busno
;
454 /* OpenFirmware based machines need a map of OF bus
455 * numbers vs. kernel bus numbers since we may have to
458 if (pci_assign_all_buses
&& have_of
)
459 pcibios_make_OF_bus_map();
461 /* Call common code to handle resource allocation */
462 pcibios_resource_survey();
464 /* Call machine dependent post-init code */
465 if (ppc_md
.pcibios_after_init
)
466 ppc_md
.pcibios_after_init();
471 subsys_initcall(pcibios_init
);
473 void __devinit
pcibios_do_bus_setup(struct pci_bus
*bus
)
475 struct pci_controller
*hose
= (struct pci_controller
*) bus
->sysdata
;
476 unsigned long io_offset
;
477 struct resource
*res
;
480 /* Hookup PHB resources */
481 io_offset
= (unsigned long)hose
->io_base_virt
- isa_io_base
;
482 if (bus
->parent
== NULL
) {
483 /* This is a host bridge - fill in its resources */
486 bus
->resource
[0] = res
= &hose
->io_resource
;
489 printk(KERN_ERR
"I/O resource not set for host"
490 " bridge %d\n", hose
->global_number
);
492 res
->end
= IO_SPACE_LIMIT
;
493 res
->flags
= IORESOURCE_IO
;
495 res
->start
= (res
->start
+ io_offset
) & 0xffffffffu
;
496 res
->end
= (res
->end
+ io_offset
) & 0xffffffffu
;
498 for (i
= 0; i
< 3; ++i
) {
499 res
= &hose
->mem_resources
[i
];
503 printk(KERN_ERR
"Memory resource not set for "
504 "host bridge %d\n", hose
->global_number
);
505 res
->start
= hose
->pci_mem_offset
;
507 res
->flags
= IORESOURCE_MEM
;
509 bus
->resource
[i
+1] = res
;
514 /* the next one is stolen from the alpha port... */
516 pcibios_update_irq(struct pci_dev
*dev
, int irq
)
518 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, irq
);
519 /* XXX FIXME - update OF device tree node interrupt property */
522 static struct pci_controller
*
523 pci_bus_to_hose(int bus
)
525 struct pci_controller
*hose
, *tmp
;
527 list_for_each_entry_safe(hose
, tmp
, &hose_list
, list_node
)
528 if (bus
>= hose
->first_busno
&& bus
<= hose
->last_busno
)
533 /* Provide information on locations of various I/O regions in physical
534 * memory. Do this on a per-card basis so that we choose the right
536 * Note that the returned IO or memory base is a physical address
539 long sys_pciconfig_iobase(long which
, unsigned long bus
, unsigned long devfn
)
541 struct pci_controller
* hose
;
542 long result
= -EOPNOTSUPP
;
544 hose
= pci_bus_to_hose(bus
);
549 case IOBASE_BRIDGE_NUMBER
:
550 return (long)hose
->first_busno
;
552 return (long)hose
->pci_mem_offset
;
554 return (long)hose
->io_base_phys
;
556 return (long)isa_io_base
;
558 return (long)isa_mem_base
;
564 unsigned long pci_address_to_pio(phys_addr_t address
)
566 struct pci_controller
*hose
, *tmp
;
568 list_for_each_entry_safe(hose
, tmp
, &hose_list
, list_node
) {
569 unsigned int size
= hose
->io_resource
.end
-
570 hose
->io_resource
.start
+ 1;
571 if (address
>= hose
->io_base_phys
&&
572 address
< (hose
->io_base_phys
+ size
)) {
574 (unsigned long)hose
->io_base_virt
- _IO_BASE
;
575 return base
+ (address
- hose
->io_base_phys
);
578 return (unsigned int)-1;
580 EXPORT_SYMBOL(pci_address_to_pio
);
583 * Null PCI config access functions, for the case when we can't
586 #define NULL_PCI_OP(rw, size, type) \
588 null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
590 return PCIBIOS_DEVICE_NOT_FOUND; \
594 null_read_config(struct pci_bus
*bus
, unsigned int devfn
, int offset
,
597 return PCIBIOS_DEVICE_NOT_FOUND
;
601 null_write_config(struct pci_bus
*bus
, unsigned int devfn
, int offset
,
604 return PCIBIOS_DEVICE_NOT_FOUND
;
607 static struct pci_ops null_pci_ops
=
609 .read
= null_read_config
,
610 .write
= null_write_config
,
614 * These functions are used early on before PCI scanning is done
615 * and all of the pci_dev and pci_bus structures have been created.
617 static struct pci_bus
*
618 fake_pci_bus(struct pci_controller
*hose
, int busnr
)
620 static struct pci_bus bus
;
623 hose
= pci_bus_to_hose(busnr
);
625 printk(KERN_ERR
"Can't find hose for PCI bus %d!\n", busnr
);
629 bus
.ops
= hose
? hose
->ops
: &null_pci_ops
;
633 #define EARLY_PCI_OP(rw, size, type) \
634 int early_##rw##_config_##size(struct pci_controller *hose, int bus, \
635 int devfn, int offset, type value) \
637 return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \
638 devfn, offset, value); \
641 EARLY_PCI_OP(read
, byte
, u8
*)
642 EARLY_PCI_OP(read
, word
, u16
*)
643 EARLY_PCI_OP(read
, dword
, u32
*)
644 EARLY_PCI_OP(write
, byte
, u8
)
645 EARLY_PCI_OP(write
, word
, u16
)
646 EARLY_PCI_OP(write
, dword
, u32
)
648 extern int pci_bus_find_capability (struct pci_bus
*bus
, unsigned int devfn
, int cap
);
649 int early_find_capability(struct pci_controller
*hose
, int bus
, int devfn
,
652 return pci_bus_find_capability(fake_pci_bus(hose
, bus
), devfn
, cap
);