2 * Copyright (C) 2008 Marvell International Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/sched.h>
13 #include <linux/init.h>
14 #include <linux/cpufreq.h>
15 #include <linux/slab.h>
18 #include <mach/generic.h>
19 #include <mach/pxa3xx-regs.h>
27 #define SMCFS_104M (2)
28 #define SMCFS_208M (5)
30 #define SFLFS_104M (0)
31 #define SFLFS_156M (1)
32 #define SFLFS_208M (2)
33 #define SFLFS_312M (3)
35 #define XSPCLK_156M (0)
36 #define XSPCLK_NONE (3)
39 #define DMCFS_260M (3)
41 struct pxa3xx_freq_info
{
42 unsigned int cpufreq_mhz
;
43 unsigned int core_xl
: 5;
44 unsigned int core_xn
: 3;
46 unsigned int dmcfs
: 2;
47 unsigned int smcfs
: 3;
48 unsigned int sflfs
: 2;
49 unsigned int df_clkdiv
: 3;
51 int vcc_core
; /* in mV */
52 int vcc_sram
; /* in mV */
55 #define OP(cpufreq, _xl, _xn, _hss, _dmc, _smc, _sfl, _dfi, vcore, vsram) \
57 .cpufreq_mhz = cpufreq, \
60 .hss = HSS_##_hss##M, \
61 .dmcfs = DMCFS_##_dmc##M, \
62 .smcfs = SMCFS_##_smc##M, \
63 .sflfs = SFLFS_##_sfl##M, \
69 static struct pxa3xx_freq_info pxa300_freqs
[] = {
70 /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
71 OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */
72 OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
73 OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
74 OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
77 static struct pxa3xx_freq_info pxa320_freqs
[] = {
78 /* CPU XL XN HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
79 OP(104, 8, 1, 104, 260, 78, 104, 3, 1000, 1100), /* 104MHz */
80 OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
81 OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
82 OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
83 OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */
86 static unsigned int pxa3xx_freqs_num
;
87 static struct pxa3xx_freq_info
*pxa3xx_freqs
;
88 static struct cpufreq_frequency_table
*pxa3xx_freqs_table
;
90 static int setup_freqs_table(struct cpufreq_policy
*policy
,
91 struct pxa3xx_freq_info
*freqs
, int num
)
93 struct cpufreq_frequency_table
*table
;
96 table
= kcalloc(num
+ 1, sizeof(*table
), GFP_KERNEL
);
100 for (i
= 0; i
< num
; i
++) {
101 table
[i
].driver_data
= i
;
102 table
[i
].frequency
= freqs
[i
].cpufreq_mhz
* 1000;
104 table
[num
].driver_data
= i
;
105 table
[num
].frequency
= CPUFREQ_TABLE_END
;
107 pxa3xx_freqs
= freqs
;
108 pxa3xx_freqs_num
= num
;
109 pxa3xx_freqs_table
= table
;
111 policy
->freq_table
= table
;
116 static void __update_core_freq(struct pxa3xx_freq_info
*info
)
118 uint32_t mask
= ACCR_XN_MASK
| ACCR_XL_MASK
;
119 uint32_t accr
= ACCR
;
122 accr
&= ~(ACCR_XN_MASK
| ACCR_XL_MASK
| ACCR_XSPCLK_MASK
);
123 accr
|= ACCR_XN(info
->core_xn
) | ACCR_XL(info
->core_xl
);
125 /* No clock until core PLL is re-locked */
126 accr
|= ACCR_XSPCLK(XSPCLK_NONE
);
128 xclkcfg
= (info
->core_xn
== 2) ? 0x3 : 0x2; /* turbo bit */
131 __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg
));
133 while ((ACSR
& mask
) != (accr
& mask
))
137 static void __update_bus_freq(struct pxa3xx_freq_info
*info
)
140 uint32_t accr
= ACCR
;
142 mask
= ACCR_SMCFS_MASK
| ACCR_SFLFS_MASK
| ACCR_HSS_MASK
|
146 accr
|= ACCR_SMCFS(info
->smcfs
) | ACCR_SFLFS(info
->sflfs
) |
147 ACCR_HSS(info
->hss
) | ACCR_DMCFS(info
->dmcfs
);
151 while ((ACSR
& mask
) != (accr
& mask
))
155 static unsigned int pxa3xx_cpufreq_get(unsigned int cpu
)
157 return pxa3xx_get_clk_frequency_khz(0);
160 static int pxa3xx_cpufreq_set(struct cpufreq_policy
*policy
, unsigned int index
)
162 struct pxa3xx_freq_info
*next
;
165 if (policy
->cpu
!= 0)
168 next
= &pxa3xx_freqs
[index
];
170 local_irq_save(flags
);
171 __update_core_freq(next
);
172 __update_bus_freq(next
);
173 local_irq_restore(flags
);
178 static int pxa3xx_cpufreq_init(struct cpufreq_policy
*policy
)
182 /* set default policy and cpuinfo */
183 policy
->min
= policy
->cpuinfo
.min_freq
= 104000;
184 policy
->max
= policy
->cpuinfo
.max_freq
=
185 (cpu_is_pxa320()) ? 806000 : 624000;
186 policy
->cpuinfo
.transition_latency
= 1000; /* FIXME: 1 ms, assumed */
188 if (cpu_is_pxa300() || cpu_is_pxa310())
189 ret
= setup_freqs_table(policy
, pxa300_freqs
,
190 ARRAY_SIZE(pxa300_freqs
));
193 ret
= setup_freqs_table(policy
, pxa320_freqs
,
194 ARRAY_SIZE(pxa320_freqs
));
197 pr_err("failed to setup frequency table\n");
201 pr_info("CPUFREQ support for PXA3xx initialized\n");
205 static struct cpufreq_driver pxa3xx_cpufreq_driver
= {
206 .flags
= CPUFREQ_NEED_INITIAL_FREQ_CHECK
,
207 .verify
= cpufreq_generic_frequency_table_verify
,
208 .target_index
= pxa3xx_cpufreq_set
,
209 .init
= pxa3xx_cpufreq_init
,
210 .get
= pxa3xx_cpufreq_get
,
211 .name
= "pxa3xx-cpufreq",
214 static int __init
cpufreq_init(void)
217 return cpufreq_register_driver(&pxa3xx_cpufreq_driver
);
221 module_init(cpufreq_init
);
223 static void __exit
cpufreq_exit(void)
225 cpufreq_unregister_driver(&pxa3xx_cpufreq_driver
);
227 module_exit(cpufreq_exit
);
229 MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx");
230 MODULE_LICENSE("GPL");