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drm/radeon: only check the sink type on DP connectors
[linux/fpc-iii.git] / drivers / rtc / rtc-x1205.c
blob5638b7ba8b06afb26e0f5faf2770e9cdaf921d0b
1 /*
2 * An i2c driver for the Xicor/Intersil X1205 RTC
3 * Copyright 2004 Karen Spearel
4 * Copyright 2005 Alessandro Zummo
5 *
6 * please send all reports to:
7 * Karen Spearel <kas111 at gmail dot com>
8 * Alessandro Zummo <a.zummo@towertech.it>
9 *
10 * based on a lot of other RTC drivers.
11 *
12 * Information and datasheet:
13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
19
20 #include <linux/i2c.h>
21 #include <linux/bcd.h>
22 #include <linux/rtc.h>
23 #include <linux/delay.h>
24 #include <linux/module.h>
25 #include <linux/bitops.h>
26
27 #define DRV_VERSION "1.0.8"
28
29 /* offsets into CCR area */
30
31 #define CCR_SEC 0
32 #define CCR_MIN 1
33 #define CCR_HOUR 2
34 #define CCR_MDAY 3
35 #define CCR_MONTH 4
36 #define CCR_YEAR 5
37 #define CCR_WDAY 6
38 #define CCR_Y2K 7
39
40 #define X1205_REG_SR 0x3F /* status register */
41 #define X1205_REG_Y2K 0x37
42 #define X1205_REG_DW 0x36
43 #define X1205_REG_YR 0x35
44 #define X1205_REG_MO 0x34
45 #define X1205_REG_DT 0x33
46 #define X1205_REG_HR 0x32
47 #define X1205_REG_MN 0x31
48 #define X1205_REG_SC 0x30
49 #define X1205_REG_DTR 0x13
50 #define X1205_REG_ATR 0x12
51 #define X1205_REG_INT 0x11
52 #define X1205_REG_0 0x10
53 #define X1205_REG_Y2K1 0x0F
54 #define X1205_REG_DWA1 0x0E
55 #define X1205_REG_YRA1 0x0D
56 #define X1205_REG_MOA1 0x0C
57 #define X1205_REG_DTA1 0x0B
58 #define X1205_REG_HRA1 0x0A
59 #define X1205_REG_MNA1 0x09
60 #define X1205_REG_SCA1 0x08
61 #define X1205_REG_Y2K0 0x07
62 #define X1205_REG_DWA0 0x06
63 #define X1205_REG_YRA0 0x05
64 #define X1205_REG_MOA0 0x04
65 #define X1205_REG_DTA0 0x03
66 #define X1205_REG_HRA0 0x02
67 #define X1205_REG_MNA0 0x01
68 #define X1205_REG_SCA0 0x00
69
70 #define X1205_CCR_BASE 0x30 /* Base address of CCR */
71 #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
72
73 #define X1205_SR_RTCF 0x01 /* Clock failure */
74 #define X1205_SR_WEL 0x02 /* Write Enable Latch */
75 #define X1205_SR_RWEL 0x04 /* Register Write Enable */
76 #define X1205_SR_AL0 0x20 /* Alarm 0 match */
77
78 #define X1205_DTR_DTR0 0x01
79 #define X1205_DTR_DTR1 0x02
80 #define X1205_DTR_DTR2 0x04
81
82 #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
83
84 #define X1205_INT_AL0E 0x20 /* Alarm 0 enable */
85
86 static struct i2c_driver x1205_driver;
87
88 /*
89 * In the routines that deal directly with the x1205 hardware, we use
90 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
91 * Epoch is initialized as 2000. Time is set to UTC.
92 */
93 static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
94 unsigned char reg_base)
95 {
96 unsigned char dt_addr[2] = { 0, reg_base };
97 unsigned char buf[8];
98 int i;
99
100 struct i2c_msg msgs[] = {
101 {/* setup read ptr */
102 .addr = client->addr,
103 .len = 2,
104 .buf = dt_addr
105 },
106 {/* read date */
107 .addr = client->addr,
108 .flags = I2C_M_RD,
109 .len = 8,
110 .buf = buf
111 },
112 };
113
114 /* read date registers */
115 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
116 dev_err(&client->dev, "%s: read error\n", __func__);
117 return -EIO;
118 }
119
120 dev_dbg(&client->dev,
121 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
122 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
123 __func__,
124 buf[0], buf[1], buf[2], buf[3],
125 buf[4], buf[5], buf[6], buf[7]);
126
127 /* Mask out the enable bits if these are alarm registers */
128 if (reg_base < X1205_CCR_BASE)
129 for (i = 0; i <= 4; i++)
130 buf[i] &= 0x7F;
131
132 tm->tm_sec = bcd2bin(buf[CCR_SEC]);
133 tm->tm_min = bcd2bin(buf[CCR_MIN]);
134 tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
135 tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
136 tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
137 tm->tm_year = bcd2bin(buf[CCR_YEAR])
138 + (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
139 tm->tm_wday = buf[CCR_WDAY];
140
141 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
142 "mday=%d, mon=%d, year=%d, wday=%d\n",
143 __func__,
144 tm->tm_sec, tm->tm_min, tm->tm_hour,
145 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
146
147 return 0;
148 }
149
150 static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
151 {
152 static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
153
154 struct i2c_msg msgs[] = {
155 { /* setup read ptr */
156 .addr = client->addr,
157 .len = 2,
158 .buf = sr_addr
159 },
160 { /* read status */
161 .addr = client->addr,
162 .flags = I2C_M_RD,
163 .len = 1,
164 .buf = sr
165 },
166 };
167
168 /* read status register */
169 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
170 dev_err(&client->dev, "%s: read error\n", __func__);
171 return -EIO;
172 }
173
174 return 0;
175 }
176
177 static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
178 u8 reg_base, unsigned char alm_enable)
179 {
180 int i, xfer;
181 unsigned char rdata[10] = { 0, reg_base };
182 unsigned char *buf = rdata + 2;
183
184 static const unsigned char wel[3] = { 0, X1205_REG_SR,
185 X1205_SR_WEL };
186
187 static const unsigned char rwel[3] = { 0, X1205_REG_SR,
188 X1205_SR_WEL | X1205_SR_RWEL };
189
190 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
191
192 dev_dbg(&client->dev,
193 "%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
194 __func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
195 tm->tm_mon, tm->tm_year, tm->tm_wday);
196
197 buf[CCR_SEC] = bin2bcd(tm->tm_sec);
198 buf[CCR_MIN] = bin2bcd(tm->tm_min);
199
200 /* set hour and 24hr bit */
201 buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
202
203 buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
204
205 /* month, 1 - 12 */
206 buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
207
208 /* year, since the rtc epoch*/
209 buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
210 buf[CCR_WDAY] = tm->tm_wday & 0x07;
211 buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
212
213 /* If writing alarm registers, set compare bits on registers 0-4 */
214 if (reg_base < X1205_CCR_BASE)
215 for (i = 0; i <= 4; i++)
216 buf[i] |= 0x80;
217
218 /* this sequence is required to unlock the chip */
219 xfer = i2c_master_send(client, wel, 3);
220 if (xfer != 3) {
221 dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
222 return -EIO;
223 }
224
225 xfer = i2c_master_send(client, rwel, 3);
226 if (xfer != 3) {
227 dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
228 return -EIO;
229 }
230
231 xfer = i2c_master_send(client, rdata, sizeof(rdata));
232 if (xfer != sizeof(rdata)) {
233 dev_err(&client->dev,
234 "%s: result=%d addr=%02x, data=%02x\n",
235 __func__,
236 xfer, rdata[1], rdata[2]);
237 return -EIO;
238 }
239
240 /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
241 if (reg_base < X1205_CCR_BASE) {
242 unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
243
244 msleep(10);
245
246 /* ...and set or clear the AL0E bit in the INT register */
247
248 /* Need to set RWEL again as the write has cleared it */
249 xfer = i2c_master_send(client, rwel, 3);
250 if (xfer != 3) {
251 dev_err(&client->dev,
252 "%s: aloe rwel - %d\n",
253 __func__,
254 xfer);
255 return -EIO;
256 }
257
258 if (alm_enable)
259 al0e[2] = X1205_INT_AL0E;
260
261 xfer = i2c_master_send(client, al0e, 3);
262 if (xfer != 3) {
263 dev_err(&client->dev,
264 "%s: al0e - %d\n",
265 __func__,
266 xfer);
267 return -EIO;
268 }
269
270 /* and wait 10msec again for this write to complete */
271 msleep(10);
272 }
273
274 /* disable further writes */
275 xfer = i2c_master_send(client, diswe, 3);
276 if (xfer != 3) {
277 dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
278 return -EIO;
279 }
280
281 return 0;
282 }
283
284 static int x1205_fix_osc(struct i2c_client *client)
285 {
286 int err;
287 struct rtc_time tm;
288
289 memset(&tm, 0, sizeof(tm));
290
291 err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
292 if (err < 0)
293 dev_err(&client->dev, "unable to restart the oscillator\n");
294
295 return err;
296 }
297
298 static int x1205_get_dtrim(struct i2c_client *client, int *trim)
299 {
300 unsigned char dtr;
301 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
302
303 struct i2c_msg msgs[] = {
304 { /* setup read ptr */
305 .addr = client->addr,
306 .len = 2,
307 .buf = dtr_addr
308 },
309 { /* read dtr */
310 .addr = client->addr,
311 .flags = I2C_M_RD,
312 .len = 1,
313 .buf = &dtr
314 },
315 };
316
317 /* read dtr register */
318 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
319 dev_err(&client->dev, "%s: read error\n", __func__);
320 return -EIO;
321 }
322
323 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
324
325 *trim = 0;
326
327 if (dtr & X1205_DTR_DTR0)
328 *trim += 20;
329
330 if (dtr & X1205_DTR_DTR1)
331 *trim += 10;
332
333 if (dtr & X1205_DTR_DTR2)
334 *trim = -*trim;
335
336 return 0;
337 }
338
339 static int x1205_get_atrim(struct i2c_client *client, int *trim)
340 {
341 s8 atr;
342 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
343
344 struct i2c_msg msgs[] = {
345 {/* setup read ptr */
346 .addr = client->addr,
347 .len = 2,
348 .buf = atr_addr
349 },
350 {/* read atr */
351 .addr = client->addr,
352 .flags = I2C_M_RD,
353 .len = 1,
354 .buf = &atr
355 },
356 };
357
358 /* read atr register */
359 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
360 dev_err(&client->dev, "%s: read error\n", __func__);
361 return -EIO;
362 }
363
364 dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
365
366 /* atr is a two's complement value on 6 bits,
367 * perform sign extension. The formula is
368 * Catr = (atr * 0.25pF) + 11.00pF.
369 */
370 atr = sign_extend32(atr, 5);
371
372 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
373
374 *trim = (atr * 250) + 11000;
375
376 dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
377
378 return 0;
379 }
380
381 struct x1205_limit {
382 unsigned char reg, mask, min, max;
383 };
384
385 static int x1205_validate_client(struct i2c_client *client)
386 {
387 int i, xfer;
388
389 /* Probe array. We will read the register at the specified
390 * address and check if the given bits are zero.
391 */
392 static const unsigned char probe_zero_pattern[] = {
393 /* register, mask */
394 X1205_REG_SR, 0x18,
395 X1205_REG_DTR, 0xF8,
396 X1205_REG_ATR, 0xC0,
397 X1205_REG_INT, 0x18,
398 X1205_REG_0, 0xFF,
399 };
400
401 static const struct x1205_limit probe_limits_pattern[] = {
402 /* register, mask, min, max */
403 { X1205_REG_Y2K, 0xFF, 19, 20 },
404 { X1205_REG_DW, 0xFF, 0, 6 },
405 { X1205_REG_YR, 0xFF, 0, 99 },
406 { X1205_REG_MO, 0xFF, 0, 12 },
407 { X1205_REG_DT, 0xFF, 0, 31 },
408 { X1205_REG_HR, 0x7F, 0, 23 },
409 { X1205_REG_MN, 0xFF, 0, 59 },
410 { X1205_REG_SC, 0xFF, 0, 59 },
411 { X1205_REG_Y2K1, 0xFF, 19, 20 },
412 { X1205_REG_Y2K0, 0xFF, 19, 20 },
413 };
414
415 /* check that registers have bits a 0 where expected */
416 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
417 unsigned char buf;
418
419 unsigned char addr[2] = { 0, probe_zero_pattern[i] };
420
421 struct i2c_msg msgs[2] = {
422 {
423 .addr = client->addr,
424 .len = 2,
425 .buf = addr
426 },
427 {
428 .addr = client->addr,
429 .flags = I2C_M_RD,
430 .len = 1,
431 .buf = &buf
432 },
433 };
434
435 xfer = i2c_transfer(client->adapter, msgs, 2);
436 if (xfer != 2) {
437 dev_err(&client->dev,
438 "%s: could not read register %x\n",
439 __func__, probe_zero_pattern[i]);
440
441 return -EIO;
442 }
443
444 if ((buf & probe_zero_pattern[i+1]) != 0) {
445 dev_err(&client->dev,
446 "%s: register=%02x, zero pattern=%d, value=%x\n",
447 __func__, probe_zero_pattern[i], i, buf);
448
449 return -ENODEV;
450 }
451 }
452
453 /* check limits (only registers with bcd values) */
454 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
455 unsigned char reg, value;
456
457 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
458
459 struct i2c_msg msgs[2] = {
460 {
461 .addr = client->addr,
462 .len = 2,
463 .buf = addr
464 },
465 {
466 .addr = client->addr,
467 .flags = I2C_M_RD,
468 .len = 1,
469 .buf = &reg
470 },
471 };
472
473 xfer = i2c_transfer(client->adapter, msgs, 2);
474 if (xfer != 2) {
475 dev_err(&client->dev,
476 "%s: could not read register %x\n",
477 __func__, probe_limits_pattern[i].reg);
478
479 return -EIO;
480 }
481
482 value = bcd2bin(reg & probe_limits_pattern[i].mask);
483
484 if (value > probe_limits_pattern[i].max ||
485 value < probe_limits_pattern[i].min) {
486 dev_dbg(&client->dev,
487 "%s: register=%x, lim pattern=%d, value=%d\n",
488 __func__, probe_limits_pattern[i].reg,
489 i, value);
490
491 return -ENODEV;
492 }
493 }
494
495 return 0;
496 }
497
498 static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
499 {
500 int err;
501 unsigned char intreg, status;
502 static unsigned char int_addr[2] = { 0, X1205_REG_INT };
503 struct i2c_client *client = to_i2c_client(dev);
504 struct i2c_msg msgs[] = {
505 { /* setup read ptr */
506 .addr = client->addr,
507 .len = 2,
508 .buf = int_addr
509 },
510 {/* read INT register */
511
512 .addr = client->addr,
513 .flags = I2C_M_RD,
514 .len = 1,
515 .buf = &intreg
516 },
517 };
518
519 /* read interrupt register and status register */
520 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
521 dev_err(&client->dev, "%s: read error\n", __func__);
522 return -EIO;
523 }
524 err = x1205_get_status(client, &status);
525 if (err == 0) {
526 alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
527 alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
528 err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
529 }
530 return err;
531 }
532
533 static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
534 {
535 return x1205_set_datetime(to_i2c_client(dev),
536 &alrm->time, X1205_ALM0_BASE, alrm->enabled);
537 }
538
539 static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
540 {
541 return x1205_get_datetime(to_i2c_client(dev),
542 tm, X1205_CCR_BASE);
543 }
544
545 static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
546 {
547 return x1205_set_datetime(to_i2c_client(dev),
548 tm, X1205_CCR_BASE, 0);
549 }
550
551 static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
552 {
553 int err, dtrim, atrim;
554
555 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
556 if (!err)
557 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
558
559 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
560 if (!err)
561 seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
562 atrim / 1000, atrim % 1000);
563 return 0;
564 }
565
566 static const struct rtc_class_ops x1205_rtc_ops = {
567 .proc = x1205_rtc_proc,
568 .read_time = x1205_rtc_read_time,
569 .set_time = x1205_rtc_set_time,
570 .read_alarm = x1205_rtc_read_alarm,
571 .set_alarm = x1205_rtc_set_alarm,
572 };
573
574 static ssize_t x1205_sysfs_show_atrim(struct device *dev,
575 struct device_attribute *attr, char *buf)
576 {
577 int err, atrim;
578
579 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
580 if (err)
581 return err;
582
583 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
584 }
585 static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
586
587 static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
588 struct device_attribute *attr, char *buf)
589 {
590 int err, dtrim;
591
592 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
593 if (err)
594 return err;
595
596 return sprintf(buf, "%d ppm\n", dtrim);
597 }
598 static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
599
600 static int x1205_sysfs_register(struct device *dev)
601 {
602 int err;
603
604 err = device_create_file(dev, &dev_attr_atrim);
605 if (err)
606 return err;
607
608 err = device_create_file(dev, &dev_attr_dtrim);
609 if (err)
610 device_remove_file(dev, &dev_attr_atrim);
611
612 return err;
613 }
614
615 static void x1205_sysfs_unregister(struct device *dev)
616 {
617 device_remove_file(dev, &dev_attr_atrim);
618 device_remove_file(dev, &dev_attr_dtrim);
619 }
620
621
622 static int x1205_probe(struct i2c_client *client,
623 const struct i2c_device_id *id)
624 {
625 int err = 0;
626 unsigned char sr;
627 struct rtc_device *rtc;
628
629 dev_dbg(&client->dev, "%s\n", __func__);
630
631 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
632 return -ENODEV;
633
634 if (x1205_validate_client(client) < 0)
635 return -ENODEV;
636
637 dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
638
639 rtc = devm_rtc_device_register(&client->dev, x1205_driver.driver.name,
640 &x1205_rtc_ops, THIS_MODULE);
641
642 if (IS_ERR(rtc))
643 return PTR_ERR(rtc);
644
645 i2c_set_clientdata(client, rtc);
646
647 /* Check for power failures and eventually enable the osc */
648 err = x1205_get_status(client, &sr);
649 if (!err) {
650 if (sr & X1205_SR_RTCF) {
651 dev_err(&client->dev,
652 "power failure detected, "
653 "please set the clock\n");
654 udelay(50);
655 x1205_fix_osc(client);
656 }
657 } else {
658 dev_err(&client->dev, "couldn't read status\n");
659 }
660
661 err = x1205_sysfs_register(&client->dev);
662 if (err)
663 dev_err(&client->dev, "Unable to create sysfs entries\n");
664
665 return 0;
666 }
667
668 static int x1205_remove(struct i2c_client *client)
669 {
670 x1205_sysfs_unregister(&client->dev);
671 return 0;
672 }
673
674 static const struct i2c_device_id x1205_id[] = {
675 { "x1205", 0 },
676 { }
677 };
678 MODULE_DEVICE_TABLE(i2c, x1205_id);
679
680 static struct i2c_driver x1205_driver = {
681 .driver = {
682 .name = "rtc-x1205",
683 },
684 .probe = x1205_probe,
685 .remove = x1205_remove,
686 .id_table = x1205_id,
687 };
688
689 module_i2c_driver(x1205_driver);
690
691 MODULE_AUTHOR(
692 "Karen Spearel <kas111 at gmail dot com>, "
693 "Alessandro Zummo <a.zummo@towertech.it>");
694 MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
695 MODULE_LICENSE("GPL");
696 MODULE_VERSION(DRV_VERSION);
Linux with added FPC-III support