workqueue: add 'flush_delayed_work()' to run and wait for delayed work
[linux/fpc-iii.git] / arch / arm / mach-mx2 / generic.c
blobae8f759134d1ca141cd1f01914ee25257a184eb3
1 /*
2 * generic.c
4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
21 #include <linux/mm.h>
22 #include <linux/init.h>
23 #include <mach/hardware.h>
24 #include <mach/common.h>
25 #include <asm/pgtable.h>
26 #include <asm/mach/map.h>
28 /* MX27 memory map definition */
29 static struct map_desc mxc_io_desc[] __initdata = {
31 * this fixed mapping covers:
32 * - AIPI1
33 * - AIPI2
34 * - AITC
35 * - ROM Patch
36 * - and some reserved space
39 .virtual = AIPI_BASE_ADDR_VIRT,
40 .pfn = __phys_to_pfn(AIPI_BASE_ADDR),
41 .length = AIPI_SIZE,
42 .type = MT_DEVICE
45 * this fixed mapping covers:
46 * - CSI
47 * - ATA
50 .virtual = SAHB1_BASE_ADDR_VIRT,
51 .pfn = __phys_to_pfn(SAHB1_BASE_ADDR),
52 .length = SAHB1_SIZE,
53 .type = MT_DEVICE
56 * this fixed mapping covers:
57 * - EMI
60 .virtual = X_MEMC_BASE_ADDR_VIRT,
61 .pfn = __phys_to_pfn(X_MEMC_BASE_ADDR),
62 .length = X_MEMC_SIZE,
63 .type = MT_DEVICE
68 * Initialize the memory map. It is called during the
69 * system startup to create static physical to virtual
70 * memory map for the IO modules.
72 void __init mx21_map_io(void)
74 mxc_set_cpu_type(MXC_CPU_MX21);
75 mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
77 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
80 void __init mx27_map_io(void)
82 mxc_set_cpu_type(MXC_CPU_MX27);
83 mxc_arch_reset_init(IO_ADDRESS(WDOG_BASE_ADDR));
85 iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
88 void __init mx27_init_irq(void)
90 mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
93 void __init mx21_init_irq(void)
95 mx27_init_irq();