2 * drivers/net/mv643xx_eth.c - Driver for MV643XX ethernet ports
3 * Copyright (C) 2002 Matthew Dharm <mdharm@momenco.com>
5 * Based on the 64360 driver from:
6 * Copyright (C) 2002 rabeeh@galileo.co.il
8 * Copyright (C) 2003 PMC-Sierra, Inc.,
9 * written by Manish Lachwani
11 * Copyright (C) 2003 Ralf Baechle <ralf@linux-mips.org>
13 * Copyright (C) 2004-2006 MontaVista Software, Inc.
14 * Dale Farnsworth <dale@farnsworth.org>
16 * Copyright (C) 2004 Steven J. Hill <sjhill1@rockwellcollins.com>
17 * <sjhill@realitydiluted.com>
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version 2
22 * of the License, or (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
33 #include <linux/init.h>
34 #include <linux/dma-mapping.h>
37 #include <linux/tcp.h>
38 #include <linux/udp.h>
39 #include <linux/etherdevice.h>
41 #include <linux/bitops.h>
42 #include <linux/delay.h>
43 #include <linux/ethtool.h>
44 #include <linux/platform_device.h>
47 #include <asm/types.h>
48 #include <asm/pgtable.h>
49 #include <asm/system.h>
50 #include <asm/delay.h>
51 #include "mv643xx_eth.h"
53 /* Static function declarations */
54 static void eth_port_uc_addr_get(struct net_device
*dev
,
55 unsigned char *MacAddr
);
56 static void eth_port_set_multicast_list(struct net_device
*);
57 static void mv643xx_eth_port_enable_tx(unsigned int port_num
,
59 static void mv643xx_eth_port_enable_rx(unsigned int port_num
,
61 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num
);
62 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num
);
63 static int mv643xx_eth_open(struct net_device
*);
64 static int mv643xx_eth_stop(struct net_device
*);
65 static int mv643xx_eth_change_mtu(struct net_device
*, int);
66 static struct net_device_stats
*mv643xx_eth_get_stats(struct net_device
*);
67 static void eth_port_init_mac_tables(unsigned int eth_port_num
);
69 static int mv643xx_poll(struct net_device
*dev
, int *budget
);
71 static int ethernet_phy_get(unsigned int eth_port_num
);
72 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
);
73 static int ethernet_phy_detect(unsigned int eth_port_num
);
74 static int mv643xx_mdio_read(struct net_device
*dev
, int phy_id
, int location
);
75 static void mv643xx_mdio_write(struct net_device
*dev
, int phy_id
, int location
, int val
);
76 static int mv643xx_eth_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
);
77 static const struct ethtool_ops mv643xx_ethtool_ops
;
79 static char mv643xx_driver_name
[] = "mv643xx_eth";
80 static char mv643xx_driver_version
[] = "1.0";
82 static void __iomem
*mv643xx_eth_shared_base
;
84 /* used to protect MV643XX_ETH_SMI_REG, which is shared across ports */
85 static DEFINE_SPINLOCK(mv643xx_eth_phy_lock
);
87 static inline u32
mv_read(int offset
)
89 void __iomem
*reg_base
;
91 reg_base
= mv643xx_eth_shared_base
- MV643XX_ETH_SHARED_REGS
;
93 return readl(reg_base
+ offset
);
96 static inline void mv_write(int offset
, u32 data
)
98 void __iomem
*reg_base
;
100 reg_base
= mv643xx_eth_shared_base
- MV643XX_ETH_SHARED_REGS
;
101 writel(data
, reg_base
+ offset
);
105 * Changes MTU (maximum transfer unit) of the gigabit ethenret port
107 * Input : pointer to ethernet interface network device structure
109 * Output : 0 upon success, -EINVAL upon failure
111 static int mv643xx_eth_change_mtu(struct net_device
*dev
, int new_mtu
)
113 if ((new_mtu
> 9500) || (new_mtu
< 64))
118 * Stop then re-open the interface. This will allocate RX skb's with
120 * There is a possible danger that the open will not successed, due
121 * to memory is full, which might fail the open function.
123 if (netif_running(dev
)) {
124 mv643xx_eth_stop(dev
);
125 if (mv643xx_eth_open(dev
))
127 "%s: Fatal error on opening device\n",
135 * mv643xx_eth_rx_refill_descs
137 * Fills / refills RX queue on a certain gigabit ethernet port
139 * Input : pointer to ethernet interface network device structure
142 static void mv643xx_eth_rx_refill_descs(struct net_device
*dev
)
144 struct mv643xx_private
*mp
= netdev_priv(dev
);
145 struct pkt_info pkt_info
;
149 while (mp
->rx_desc_count
< mp
->rx_ring_size
) {
150 skb
= dev_alloc_skb(ETH_RX_SKB_SIZE
+ dma_get_cache_alignment());
154 unaligned
= (u32
)skb
->data
& (dma_get_cache_alignment() - 1);
156 skb_reserve(skb
, dma_get_cache_alignment() - unaligned
);
157 pkt_info
.cmd_sts
= ETH_RX_ENABLE_INTERRUPT
;
158 pkt_info
.byte_cnt
= ETH_RX_SKB_SIZE
;
159 pkt_info
.buf_ptr
= dma_map_single(NULL
, skb
->data
,
160 ETH_RX_SKB_SIZE
, DMA_FROM_DEVICE
);
161 pkt_info
.return_info
= skb
;
162 if (eth_rx_return_buff(mp
, &pkt_info
) != ETH_OK
) {
164 "%s: Error allocating RX Ring\n", dev
->name
);
167 skb_reserve(skb
, ETH_HW_IP_ALIGN
);
170 * If RX ring is empty of SKB, set a timer to try allocating
171 * again at a later time.
173 if (mp
->rx_desc_count
== 0) {
174 printk(KERN_INFO
"%s: Rx ring is empty\n", dev
->name
);
175 mp
->timeout
.expires
= jiffies
+ (HZ
/ 10); /* 100 mSec */
176 add_timer(&mp
->timeout
);
181 * mv643xx_eth_rx_refill_descs_timer_wrapper
183 * Timer routine to wake up RX queue filling task. This function is
184 * used only in case the RX queue is empty, and all alloc_skb has
185 * failed (due to out of memory event).
187 * Input : pointer to ethernet interface network device structure
190 static inline void mv643xx_eth_rx_refill_descs_timer_wrapper(unsigned long data
)
192 mv643xx_eth_rx_refill_descs((struct net_device
*)data
);
196 * mv643xx_eth_update_mac_address
198 * Update the MAC address of the port in the address table
200 * Input : pointer to ethernet interface network device structure
203 static void mv643xx_eth_update_mac_address(struct net_device
*dev
)
205 struct mv643xx_private
*mp
= netdev_priv(dev
);
206 unsigned int port_num
= mp
->port_num
;
208 eth_port_init_mac_tables(port_num
);
209 eth_port_uc_addr_set(port_num
, dev
->dev_addr
);
213 * mv643xx_eth_set_rx_mode
215 * Change from promiscuos to regular rx mode
217 * Input : pointer to ethernet interface network device structure
220 static void mv643xx_eth_set_rx_mode(struct net_device
*dev
)
222 struct mv643xx_private
*mp
= netdev_priv(dev
);
225 config_reg
= mv_read(MV643XX_ETH_PORT_CONFIG_REG(mp
->port_num
));
226 if (dev
->flags
& IFF_PROMISC
)
227 config_reg
|= (u32
) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE
;
229 config_reg
&= ~(u32
) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE
;
230 mv_write(MV643XX_ETH_PORT_CONFIG_REG(mp
->port_num
), config_reg
);
232 eth_port_set_multicast_list(dev
);
236 * mv643xx_eth_set_mac_address
238 * Change the interface's mac address.
239 * No special hardware thing should be done because interface is always
240 * put in promiscuous mode.
242 * Input : pointer to ethernet interface network device structure and
243 * a pointer to the designated entry to be added to the cache.
244 * Output : zero upon success, negative upon failure
246 static int mv643xx_eth_set_mac_address(struct net_device
*dev
, void *addr
)
250 for (i
= 0; i
< 6; i
++)
251 /* +2 is for the offset of the HW addr type */
252 dev
->dev_addr
[i
] = ((unsigned char *)addr
)[i
+ 2];
253 mv643xx_eth_update_mac_address(dev
);
258 * mv643xx_eth_tx_timeout
260 * Called upon a timeout on transmitting a packet
262 * Input : pointer to ethernet interface network device structure.
265 static void mv643xx_eth_tx_timeout(struct net_device
*dev
)
267 struct mv643xx_private
*mp
= netdev_priv(dev
);
269 printk(KERN_INFO
"%s: TX timeout ", dev
->name
);
271 /* Do the reset outside of interrupt context */
272 schedule_work(&mp
->tx_timeout_task
);
276 * mv643xx_eth_tx_timeout_task
278 * Actual routine to reset the adapter when a timeout on Tx has occurred
280 static void mv643xx_eth_tx_timeout_task(struct work_struct
*ugly
)
282 struct mv643xx_private
*mp
= container_of(ugly
, struct mv643xx_private
,
284 struct net_device
*dev
= mp
->mii
.dev
; /* yuck */
286 if (!netif_running(dev
))
289 netif_stop_queue(dev
);
291 eth_port_reset(mp
->port_num
);
294 if (mp
->tx_ring_size
- mp
->tx_desc_count
>= MAX_DESCS_PER_SKB
)
295 netif_wake_queue(dev
);
299 * mv643xx_eth_free_tx_descs - Free the tx desc data for completed descriptors
301 * If force is non-zero, frees uncompleted descriptors as well
303 int mv643xx_eth_free_tx_descs(struct net_device
*dev
, int force
)
305 struct mv643xx_private
*mp
= netdev_priv(dev
);
306 struct eth_tx_desc
*desc
;
315 while (mp
->tx_desc_count
> 0) {
316 spin_lock_irqsave(&mp
->lock
, flags
);
318 /* tx_desc_count might have changed before acquiring the lock */
319 if (mp
->tx_desc_count
<= 0) {
320 spin_unlock_irqrestore(&mp
->lock
, flags
);
324 tx_index
= mp
->tx_used_desc_q
;
325 desc
= &mp
->p_tx_desc_area
[tx_index
];
326 cmd_sts
= desc
->cmd_sts
;
328 if (!force
&& (cmd_sts
& ETH_BUFFER_OWNED_BY_DMA
)) {
329 spin_unlock_irqrestore(&mp
->lock
, flags
);
333 mp
->tx_used_desc_q
= (tx_index
+ 1) % mp
->tx_ring_size
;
336 addr
= desc
->buf_ptr
;
337 count
= desc
->byte_cnt
;
338 skb
= mp
->tx_skb
[tx_index
];
340 mp
->tx_skb
[tx_index
] = NULL
;
342 if (cmd_sts
& ETH_ERROR_SUMMARY
) {
343 printk("%s: Error in TX\n", dev
->name
);
344 mp
->stats
.tx_errors
++;
347 spin_unlock_irqrestore(&mp
->lock
, flags
);
349 if (cmd_sts
& ETH_TX_FIRST_DESC
)
350 dma_unmap_single(NULL
, addr
, count
, DMA_TO_DEVICE
);
352 dma_unmap_page(NULL
, addr
, count
, DMA_TO_DEVICE
);
355 dev_kfree_skb_irq(skb
);
363 static void mv643xx_eth_free_completed_tx_descs(struct net_device
*dev
)
365 struct mv643xx_private
*mp
= netdev_priv(dev
);
367 if (mv643xx_eth_free_tx_descs(dev
, 0) &&
368 mp
->tx_ring_size
- mp
->tx_desc_count
>= MAX_DESCS_PER_SKB
)
369 netif_wake_queue(dev
);
372 static void mv643xx_eth_free_all_tx_descs(struct net_device
*dev
)
374 mv643xx_eth_free_tx_descs(dev
, 1);
378 * mv643xx_eth_receive
380 * This function is forward packets that are received from the port's
381 * queues toward kernel core or FastRoute them to another interface.
383 * Input : dev - a pointer to the required interface
384 * max - maximum number to receive (0 means unlimted)
386 * Output : number of served packets
388 static int mv643xx_eth_receive_queue(struct net_device
*dev
, int budget
)
390 struct mv643xx_private
*mp
= netdev_priv(dev
);
391 struct net_device_stats
*stats
= &mp
->stats
;
392 unsigned int received_packets
= 0;
394 struct pkt_info pkt_info
;
396 while (budget
-- > 0 && eth_port_receive(mp
, &pkt_info
) == ETH_OK
) {
397 dma_unmap_single(NULL
, pkt_info
.buf_ptr
, ETH_RX_SKB_SIZE
,
404 * Note byte count includes 4 byte CRC count
407 stats
->rx_bytes
+= pkt_info
.byte_cnt
;
408 skb
= pkt_info
.return_info
;
410 * In case received a packet without first / last bits on OR
411 * the error summary bit is on, the packets needs to be dropeed.
413 if (((pkt_info
.cmd_sts
414 & (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
)) !=
415 (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
))
416 || (pkt_info
.cmd_sts
& ETH_ERROR_SUMMARY
)) {
418 if ((pkt_info
.cmd_sts
& (ETH_RX_FIRST_DESC
|
419 ETH_RX_LAST_DESC
)) !=
420 (ETH_RX_FIRST_DESC
| ETH_RX_LAST_DESC
)) {
423 "%s: Received packet spread "
424 "on multiple descriptors\n",
427 if (pkt_info
.cmd_sts
& ETH_ERROR_SUMMARY
)
430 dev_kfree_skb_irq(skb
);
433 * The -4 is for the CRC in the trailer of the
436 skb_put(skb
, pkt_info
.byte_cnt
- 4);
439 if (pkt_info
.cmd_sts
& ETH_LAYER_4_CHECKSUM_OK
) {
440 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
442 (pkt_info
.cmd_sts
& 0x0007fff8) >> 3);
444 skb
->protocol
= eth_type_trans(skb
, dev
);
446 netif_receive_skb(skb
);
451 dev
->last_rx
= jiffies
;
453 mv643xx_eth_rx_refill_descs(dev
); /* Fill RX ring with skb's */
455 return received_packets
;
458 /* Set the mv643xx port configuration register for the speed/duplex mode. */
459 static void mv643xx_eth_update_pscr(struct net_device
*dev
,
460 struct ethtool_cmd
*ecmd
)
462 struct mv643xx_private
*mp
= netdev_priv(dev
);
463 int port_num
= mp
->port_num
;
467 o_pscr
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
470 /* clear speed, duplex and rx buffer size fields */
471 n_pscr
&= ~(MV643XX_ETH_SET_MII_SPEED_TO_100
|
472 MV643XX_ETH_SET_GMII_SPEED_TO_1000
|
473 MV643XX_ETH_SET_FULL_DUPLEX_MODE
|
474 MV643XX_ETH_MAX_RX_PACKET_MASK
);
476 if (ecmd
->duplex
== DUPLEX_FULL
)
477 n_pscr
|= MV643XX_ETH_SET_FULL_DUPLEX_MODE
;
479 if (ecmd
->speed
== SPEED_1000
)
480 n_pscr
|= MV643XX_ETH_SET_GMII_SPEED_TO_1000
|
481 MV643XX_ETH_MAX_RX_PACKET_9700BYTE
;
483 if (ecmd
->speed
== SPEED_100
)
484 n_pscr
|= MV643XX_ETH_SET_MII_SPEED_TO_100
;
485 n_pscr
|= MV643XX_ETH_MAX_RX_PACKET_1522BYTE
;
488 if (n_pscr
!= o_pscr
) {
489 if ((o_pscr
& MV643XX_ETH_SERIAL_PORT_ENABLE
) == 0)
490 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
493 queues
= mv643xx_eth_port_disable_tx(port_num
);
495 o_pscr
&= ~MV643XX_ETH_SERIAL_PORT_ENABLE
;
496 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
498 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
500 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
),
503 mv643xx_eth_port_enable_tx(port_num
, queues
);
509 * mv643xx_eth_int_handler
511 * Main interrupt handler for the gigbit ethernet ports
513 * Input : irq - irq number (not used)
514 * dev_id - a pointer to the required interface's data structure
519 static irqreturn_t
mv643xx_eth_int_handler(int irq
, void *dev_id
)
521 struct net_device
*dev
= (struct net_device
*)dev_id
;
522 struct mv643xx_private
*mp
= netdev_priv(dev
);
523 u32 eth_int_cause
, eth_int_cause_ext
= 0;
524 unsigned int port_num
= mp
->port_num
;
526 /* Read interrupt cause registers */
527 eth_int_cause
= mv_read(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
)) &
529 if (eth_int_cause
& ETH_INT_CAUSE_EXT
) {
530 eth_int_cause_ext
= mv_read(
531 MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
)) &
532 ETH_INT_UNMASK_ALL_EXT
;
533 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
),
537 /* PHY status changed */
538 if (eth_int_cause_ext
& ETH_INT_CAUSE_PHY
) {
539 struct ethtool_cmd cmd
;
541 if (mii_link_ok(&mp
->mii
)) {
542 mii_ethtool_gset(&mp
->mii
, &cmd
);
543 mv643xx_eth_update_pscr(dev
, &cmd
);
544 mv643xx_eth_port_enable_tx(port_num
,
545 ETH_TX_QUEUES_ENABLED
);
546 if (!netif_carrier_ok(dev
)) {
547 netif_carrier_on(dev
);
548 if (mp
->tx_ring_size
- mp
->tx_desc_count
>=
550 netif_wake_queue(dev
);
552 } else if (netif_carrier_ok(dev
)) {
553 netif_stop_queue(dev
);
554 netif_carrier_off(dev
);
559 if (eth_int_cause
& ETH_INT_CAUSE_RX
) {
560 /* schedule the NAPI poll routine to maintain port */
561 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
563 /* wait for previous write to complete */
564 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
566 netif_rx_schedule(dev
);
569 if (eth_int_cause
& ETH_INT_CAUSE_RX
)
570 mv643xx_eth_receive_queue(dev
, INT_MAX
);
572 if (eth_int_cause_ext
& ETH_INT_CAUSE_TX
)
573 mv643xx_eth_free_completed_tx_descs(dev
);
576 * If no real interrupt occured, exit.
577 * This can happen when using gigE interrupt coalescing mechanism.
579 if ((eth_int_cause
== 0x0) && (eth_int_cause_ext
== 0x0))
588 * eth_port_set_rx_coal - Sets coalescing interrupt mechanism on RX path
591 * This routine sets the RX coalescing interrupt mechanism parameter.
592 * This parameter is a timeout counter, that counts in 64 t_clk
593 * chunks ; that when timeout event occurs a maskable interrupt
595 * The parameter is calculated using the tClk of the MV-643xx chip
596 * , and the required delay of the interrupt in usec.
599 * unsigned int eth_port_num Ethernet port number
600 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
601 * unsigned int delay Delay in usec
604 * Interrupt coalescing mechanism value is set in MV-643xx chip.
607 * The interrupt coalescing value set in the gigE port.
610 static unsigned int eth_port_set_rx_coal(unsigned int eth_port_num
,
611 unsigned int t_clk
, unsigned int delay
)
613 unsigned int coal
= ((t_clk
/ 1000000) * delay
) / 64;
615 /* Set RX Coalescing mechanism */
616 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num
),
617 ((coal
& 0x3fff) << 8) |
618 (mv_read(MV643XX_ETH_SDMA_CONFIG_REG(eth_port_num
))
626 * eth_port_set_tx_coal - Sets coalescing interrupt mechanism on TX path
629 * This routine sets the TX coalescing interrupt mechanism parameter.
630 * This parameter is a timeout counter, that counts in 64 t_clk
631 * chunks ; that when timeout event occurs a maskable interrupt
633 * The parameter is calculated using the t_cLK frequency of the
634 * MV-643xx chip and the required delay in the interrupt in uSec
637 * unsigned int eth_port_num Ethernet port number
638 * unsigned int t_clk t_clk of the MV-643xx chip in HZ units
639 * unsigned int delay Delay in uSeconds
642 * Interrupt coalescing mechanism value is set in MV-643xx chip.
645 * The interrupt coalescing value set in the gigE port.
648 static unsigned int eth_port_set_tx_coal(unsigned int eth_port_num
,
649 unsigned int t_clk
, unsigned int delay
)
652 coal
= ((t_clk
/ 1000000) * delay
) / 64;
653 /* Set TX Coalescing mechanism */
654 mv_write(MV643XX_ETH_TX_FIFO_URGENT_THRESHOLD_REG(eth_port_num
),
660 * ether_init_rx_desc_ring - Curve a Rx chain desc list and buffer in memory.
663 * This function prepares a Rx chained list of descriptors and packet
664 * buffers in a form of a ring. The routine must be called after port
665 * initialization routine and before port start routine.
666 * The Ethernet SDMA engine uses CPU bus addresses to access the various
667 * devices in the system (i.e. DRAM). This function uses the ethernet
668 * struct 'virtual to physical' routine (set by the user) to set the ring
669 * with physical addresses.
672 * struct mv643xx_private *mp Ethernet Port Control srtuct.
675 * The routine updates the Ethernet port control struct with information
676 * regarding the Rx descriptors and buffers.
681 static void ether_init_rx_desc_ring(struct mv643xx_private
*mp
)
683 volatile struct eth_rx_desc
*p_rx_desc
;
684 int rx_desc_num
= mp
->rx_ring_size
;
687 /* initialize the next_desc_ptr links in the Rx descriptors ring */
688 p_rx_desc
= (struct eth_rx_desc
*)mp
->p_rx_desc_area
;
689 for (i
= 0; i
< rx_desc_num
; i
++) {
690 p_rx_desc
[i
].next_desc_ptr
= mp
->rx_desc_dma
+
691 ((i
+ 1) % rx_desc_num
) * sizeof(struct eth_rx_desc
);
694 /* Save Rx desc pointer to driver struct. */
695 mp
->rx_curr_desc_q
= 0;
696 mp
->rx_used_desc_q
= 0;
698 mp
->rx_desc_area_size
= rx_desc_num
* sizeof(struct eth_rx_desc
);
702 * ether_init_tx_desc_ring - Curve a Tx chain desc list and buffer in memory.
705 * This function prepares a Tx chained list of descriptors and packet
706 * buffers in a form of a ring. The routine must be called after port
707 * initialization routine and before port start routine.
708 * The Ethernet SDMA engine uses CPU bus addresses to access the various
709 * devices in the system (i.e. DRAM). This function uses the ethernet
710 * struct 'virtual to physical' routine (set by the user) to set the ring
711 * with physical addresses.
714 * struct mv643xx_private *mp Ethernet Port Control srtuct.
717 * The routine updates the Ethernet port control struct with information
718 * regarding the Tx descriptors and buffers.
723 static void ether_init_tx_desc_ring(struct mv643xx_private
*mp
)
725 int tx_desc_num
= mp
->tx_ring_size
;
726 struct eth_tx_desc
*p_tx_desc
;
729 /* Initialize the next_desc_ptr links in the Tx descriptors ring */
730 p_tx_desc
= (struct eth_tx_desc
*)mp
->p_tx_desc_area
;
731 for (i
= 0; i
< tx_desc_num
; i
++) {
732 p_tx_desc
[i
].next_desc_ptr
= mp
->tx_desc_dma
+
733 ((i
+ 1) % tx_desc_num
) * sizeof(struct eth_tx_desc
);
736 mp
->tx_curr_desc_q
= 0;
737 mp
->tx_used_desc_q
= 0;
739 mp
->tx_desc_area_size
= tx_desc_num
* sizeof(struct eth_tx_desc
);
742 static int mv643xx_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
744 struct mv643xx_private
*mp
= netdev_priv(dev
);
747 spin_lock_irq(&mp
->lock
);
748 err
= mii_ethtool_sset(&mp
->mii
, cmd
);
749 spin_unlock_irq(&mp
->lock
);
754 static int mv643xx_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
756 struct mv643xx_private
*mp
= netdev_priv(dev
);
759 spin_lock_irq(&mp
->lock
);
760 err
= mii_ethtool_gset(&mp
->mii
, cmd
);
761 spin_unlock_irq(&mp
->lock
);
763 /* The PHY may support 1000baseT_Half, but the mv643xx does not */
764 cmd
->supported
&= ~SUPPORTED_1000baseT_Half
;
765 cmd
->advertising
&= ~ADVERTISED_1000baseT_Half
;
773 * This function is called when openning the network device. The function
774 * should initialize all the hardware, initialize cyclic Rx/Tx
775 * descriptors chain and buffers and allocate an IRQ to the network
778 * Input : a pointer to the network device structure
780 * Output : zero of success , nonzero if fails.
783 static int mv643xx_eth_open(struct net_device
*dev
)
785 struct mv643xx_private
*mp
= netdev_priv(dev
);
786 unsigned int port_num
= mp
->port_num
;
790 /* Clear any pending ethernet port interrupts */
791 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
), 0);
792 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
793 /* wait for previous write to complete */
794 mv_read (MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
));
796 err
= request_irq(dev
->irq
, mv643xx_eth_int_handler
,
797 IRQF_SHARED
| IRQF_SAMPLE_RANDOM
, dev
->name
, dev
);
799 printk(KERN_ERR
"Can not assign IRQ number to MV643XX_eth%d\n",
806 memset(&mp
->timeout
, 0, sizeof(struct timer_list
));
807 mp
->timeout
.function
= mv643xx_eth_rx_refill_descs_timer_wrapper
;
808 mp
->timeout
.data
= (unsigned long)dev
;
810 /* Allocate RX and TX skb rings */
811 mp
->rx_skb
= kmalloc(sizeof(*mp
->rx_skb
) * mp
->rx_ring_size
,
814 printk(KERN_ERR
"%s: Cannot allocate Rx skb ring\n", dev
->name
);
818 mp
->tx_skb
= kmalloc(sizeof(*mp
->tx_skb
) * mp
->tx_ring_size
,
821 printk(KERN_ERR
"%s: Cannot allocate Tx skb ring\n", dev
->name
);
823 goto out_free_rx_skb
;
826 /* Allocate TX ring */
827 mp
->tx_desc_count
= 0;
828 size
= mp
->tx_ring_size
* sizeof(struct eth_tx_desc
);
829 mp
->tx_desc_area_size
= size
;
831 if (mp
->tx_sram_size
) {
832 mp
->p_tx_desc_area
= ioremap(mp
->tx_sram_addr
,
834 mp
->tx_desc_dma
= mp
->tx_sram_addr
;
836 mp
->p_tx_desc_area
= dma_alloc_coherent(NULL
, size
,
840 if (!mp
->p_tx_desc_area
) {
841 printk(KERN_ERR
"%s: Cannot allocate Tx Ring (size %d bytes)\n",
844 goto out_free_tx_skb
;
846 BUG_ON((u32
) mp
->p_tx_desc_area
& 0xf); /* check 16-byte alignment */
847 memset((void *)mp
->p_tx_desc_area
, 0, mp
->tx_desc_area_size
);
849 ether_init_tx_desc_ring(mp
);
851 /* Allocate RX ring */
852 mp
->rx_desc_count
= 0;
853 size
= mp
->rx_ring_size
* sizeof(struct eth_rx_desc
);
854 mp
->rx_desc_area_size
= size
;
856 if (mp
->rx_sram_size
) {
857 mp
->p_rx_desc_area
= ioremap(mp
->rx_sram_addr
,
859 mp
->rx_desc_dma
= mp
->rx_sram_addr
;
861 mp
->p_rx_desc_area
= dma_alloc_coherent(NULL
, size
,
865 if (!mp
->p_rx_desc_area
) {
866 printk(KERN_ERR
"%s: Cannot allocate Rx ring (size %d bytes)\n",
868 printk(KERN_ERR
"%s: Freeing previously allocated TX queues...",
870 if (mp
->rx_sram_size
)
871 iounmap(mp
->p_tx_desc_area
);
873 dma_free_coherent(NULL
, mp
->tx_desc_area_size
,
874 mp
->p_tx_desc_area
, mp
->tx_desc_dma
);
876 goto out_free_tx_skb
;
878 memset((void *)mp
->p_rx_desc_area
, 0, size
);
880 ether_init_rx_desc_ring(mp
);
882 mv643xx_eth_rx_refill_descs(dev
); /* Fill RX ring with skb's */
886 /* Interrupt Coalescing */
890 eth_port_set_rx_coal(port_num
, 133000000, MV643XX_RX_COAL
);
894 eth_port_set_tx_coal(port_num
, 133000000, MV643XX_TX_COAL
);
896 /* Unmask phy and link status changes interrupts */
897 mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num
),
898 ETH_INT_UNMASK_ALL_EXT
);
900 /* Unmask RX buffer and TX end interrupt */
901 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), ETH_INT_UNMASK_ALL
);
910 free_irq(dev
->irq
, dev
);
915 static void mv643xx_eth_free_tx_rings(struct net_device
*dev
)
917 struct mv643xx_private
*mp
= netdev_priv(dev
);
920 mv643xx_eth_port_disable_tx(mp
->port_num
);
922 /* Free outstanding skb's on TX ring */
923 mv643xx_eth_free_all_tx_descs(dev
);
925 BUG_ON(mp
->tx_used_desc_q
!= mp
->tx_curr_desc_q
);
928 if (mp
->tx_sram_size
)
929 iounmap(mp
->p_tx_desc_area
);
931 dma_free_coherent(NULL
, mp
->tx_desc_area_size
,
932 mp
->p_tx_desc_area
, mp
->tx_desc_dma
);
935 static void mv643xx_eth_free_rx_rings(struct net_device
*dev
)
937 struct mv643xx_private
*mp
= netdev_priv(dev
);
938 unsigned int port_num
= mp
->port_num
;
942 mv643xx_eth_port_disable_rx(port_num
);
944 /* Free preallocated skb's on RX rings */
945 for (curr
= 0; mp
->rx_desc_count
&& curr
< mp
->rx_ring_size
; curr
++) {
946 if (mp
->rx_skb
[curr
]) {
947 dev_kfree_skb(mp
->rx_skb
[curr
]);
952 if (mp
->rx_desc_count
)
954 "%s: Error in freeing Rx Ring. %d skb's still"
955 " stuck in RX Ring - ignoring them\n", dev
->name
,
958 if (mp
->rx_sram_size
)
959 iounmap(mp
->p_rx_desc_area
);
961 dma_free_coherent(NULL
, mp
->rx_desc_area_size
,
962 mp
->p_rx_desc_area
, mp
->rx_desc_dma
);
968 * This function is used when closing the network device.
969 * It updates the hardware,
970 * release all memory that holds buffers and descriptors and release the IRQ.
971 * Input : a pointer to the device structure
972 * Output : zero if success , nonzero if fails
975 static int mv643xx_eth_stop(struct net_device
*dev
)
977 struct mv643xx_private
*mp
= netdev_priv(dev
);
978 unsigned int port_num
= mp
->port_num
;
980 /* Mask all interrupts on ethernet port */
981 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), ETH_INT_MASK_ALL
);
982 /* wait for previous write to complete */
983 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
986 netif_poll_disable(dev
);
988 netif_carrier_off(dev
);
989 netif_stop_queue(dev
);
991 eth_port_reset(mp
->port_num
);
993 mv643xx_eth_free_tx_rings(dev
);
994 mv643xx_eth_free_rx_rings(dev
);
997 netif_poll_enable(dev
);
1000 free_irq(dev
->irq
, dev
);
1009 * This function is used in case of NAPI
1011 static int mv643xx_poll(struct net_device
*dev
, int *budget
)
1013 struct mv643xx_private
*mp
= netdev_priv(dev
);
1014 int done
= 1, orig_budget
, work_done
;
1015 unsigned int port_num
= mp
->port_num
;
1017 #ifdef MV643XX_TX_FAST_REFILL
1018 if (++mp
->tx_clean_threshold
> 5) {
1019 mv643xx_eth_free_completed_tx_descs(dev
);
1020 mp
->tx_clean_threshold
= 0;
1024 if ((mv_read(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num
)))
1025 != (u32
) mp
->rx_used_desc_q
) {
1026 orig_budget
= *budget
;
1027 if (orig_budget
> dev
->quota
)
1028 orig_budget
= dev
->quota
;
1029 work_done
= mv643xx_eth_receive_queue(dev
, orig_budget
);
1030 *budget
-= work_done
;
1031 dev
->quota
-= work_done
;
1032 if (work_done
>= orig_budget
)
1037 netif_rx_complete(dev
);
1038 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num
), 0);
1039 mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num
), 0);
1040 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
),
1041 ETH_INT_UNMASK_ALL
);
1044 return done
? 0 : 1;
1049 * has_tiny_unaligned_frags - check if skb has any small, unaligned fragments
1051 * Hardware can't handle unaligned fragments smaller than 9 bytes.
1052 * This helper function detects that case.
1055 static inline unsigned int has_tiny_unaligned_frags(struct sk_buff
*skb
)
1060 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
1061 fragp
= &skb_shinfo(skb
)->frags
[frag
];
1062 if (fragp
->size
<= 8 && fragp
->page_offset
& 0x7)
1069 * eth_alloc_tx_desc_index - return the index of the next available tx desc
1071 static int eth_alloc_tx_desc_index(struct mv643xx_private
*mp
)
1075 BUG_ON(mp
->tx_desc_count
>= mp
->tx_ring_size
);
1077 tx_desc_curr
= mp
->tx_curr_desc_q
;
1078 mp
->tx_curr_desc_q
= (tx_desc_curr
+ 1) % mp
->tx_ring_size
;
1080 BUG_ON(mp
->tx_curr_desc_q
== mp
->tx_used_desc_q
);
1082 return tx_desc_curr
;
1086 * eth_tx_fill_frag_descs - fill tx hw descriptors for an skb's fragments.
1088 * Ensure the data for each fragment to be transmitted is mapped properly,
1089 * then fill in descriptors in the tx hw queue.
1091 static void eth_tx_fill_frag_descs(struct mv643xx_private
*mp
,
1092 struct sk_buff
*skb
)
1096 struct eth_tx_desc
*desc
;
1098 for (frag
= 0; frag
< skb_shinfo(skb
)->nr_frags
; frag
++) {
1099 skb_frag_t
*this_frag
= &skb_shinfo(skb
)->frags
[frag
];
1101 tx_index
= eth_alloc_tx_desc_index(mp
);
1102 desc
= &mp
->p_tx_desc_area
[tx_index
];
1104 desc
->cmd_sts
= ETH_BUFFER_OWNED_BY_DMA
;
1105 /* Last Frag enables interrupt and frees the skb */
1106 if (frag
== (skb_shinfo(skb
)->nr_frags
- 1)) {
1107 desc
->cmd_sts
|= ETH_ZERO_PADDING
|
1109 ETH_TX_ENABLE_INTERRUPT
;
1110 mp
->tx_skb
[tx_index
] = skb
;
1112 mp
->tx_skb
[tx_index
] = NULL
;
1114 desc
= &mp
->p_tx_desc_area
[tx_index
];
1116 desc
->byte_cnt
= this_frag
->size
;
1117 desc
->buf_ptr
= dma_map_page(NULL
, this_frag
->page
,
1118 this_frag
->page_offset
,
1125 * eth_tx_submit_descs_for_skb - submit data from an skb to the tx hw
1127 * Ensure the data for an skb to be transmitted is mapped properly,
1128 * then fill in descriptors in the tx hw queue and start the hardware.
1130 static void eth_tx_submit_descs_for_skb(struct mv643xx_private
*mp
,
1131 struct sk_buff
*skb
)
1134 struct eth_tx_desc
*desc
;
1137 int nr_frags
= skb_shinfo(skb
)->nr_frags
;
1139 cmd_sts
= ETH_TX_FIRST_DESC
| ETH_GEN_CRC
| ETH_BUFFER_OWNED_BY_DMA
;
1141 tx_index
= eth_alloc_tx_desc_index(mp
);
1142 desc
= &mp
->p_tx_desc_area
[tx_index
];
1145 eth_tx_fill_frag_descs(mp
, skb
);
1147 length
= skb_headlen(skb
);
1148 mp
->tx_skb
[tx_index
] = NULL
;
1150 cmd_sts
|= ETH_ZERO_PADDING
|
1152 ETH_TX_ENABLE_INTERRUPT
;
1154 mp
->tx_skb
[tx_index
] = skb
;
1157 desc
->byte_cnt
= length
;
1158 desc
->buf_ptr
= dma_map_single(NULL
, skb
->data
, length
, DMA_TO_DEVICE
);
1160 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
1161 BUG_ON(skb
->protocol
!= ETH_P_IP
);
1163 cmd_sts
|= ETH_GEN_TCP_UDP_CHECKSUM
|
1164 ETH_GEN_IP_V_4_CHECKSUM
|
1165 skb
->nh
.iph
->ihl
<< ETH_TX_IHL_SHIFT
;
1167 switch (skb
->nh
.iph
->protocol
) {
1169 cmd_sts
|= ETH_UDP_FRAME
;
1170 desc
->l4i_chk
= skb
->h
.uh
->check
;
1173 desc
->l4i_chk
= skb
->h
.th
->check
;
1179 /* Errata BTS #50, IHL must be 5 if no HW checksum */
1180 cmd_sts
|= 5 << ETH_TX_IHL_SHIFT
;
1184 /* ensure all other descriptors are written before first cmd_sts */
1186 desc
->cmd_sts
= cmd_sts
;
1188 /* ensure all descriptors are written before poking hardware */
1190 mv643xx_eth_port_enable_tx(mp
->port_num
, ETH_TX_QUEUES_ENABLED
);
1192 mp
->tx_desc_count
+= nr_frags
+ 1;
1196 * mv643xx_eth_start_xmit - queue an skb to the hardware for transmission
1199 static int mv643xx_eth_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
1201 struct mv643xx_private
*mp
= netdev_priv(dev
);
1202 struct net_device_stats
*stats
= &mp
->stats
;
1203 unsigned long flags
;
1205 BUG_ON(netif_queue_stopped(dev
));
1206 BUG_ON(skb
== NULL
);
1208 if (mp
->tx_ring_size
- mp
->tx_desc_count
< MAX_DESCS_PER_SKB
) {
1209 printk(KERN_ERR
"%s: transmit with queue full\n", dev
->name
);
1210 netif_stop_queue(dev
);
1214 if (has_tiny_unaligned_frags(skb
)) {
1215 if (__skb_linearize(skb
)) {
1216 stats
->tx_dropped
++;
1217 printk(KERN_DEBUG
"%s: failed to linearize tiny "
1218 "unaligned fragment\n", dev
->name
);
1223 spin_lock_irqsave(&mp
->lock
, flags
);
1225 eth_tx_submit_descs_for_skb(mp
, skb
);
1226 stats
->tx_bytes
= skb
->len
;
1227 stats
->tx_packets
++;
1228 dev
->trans_start
= jiffies
;
1230 if (mp
->tx_ring_size
- mp
->tx_desc_count
< MAX_DESCS_PER_SKB
)
1231 netif_stop_queue(dev
);
1233 spin_unlock_irqrestore(&mp
->lock
, flags
);
1235 return 0; /* success */
1239 * mv643xx_eth_get_stats
1241 * Returns a pointer to the interface statistics.
1243 * Input : dev - a pointer to the required interface
1245 * Output : a pointer to the interface's statistics
1248 static struct net_device_stats
*mv643xx_eth_get_stats(struct net_device
*dev
)
1250 struct mv643xx_private
*mp
= netdev_priv(dev
);
1255 #ifdef CONFIG_NET_POLL_CONTROLLER
1256 static void mv643xx_netpoll(struct net_device
*netdev
)
1258 struct mv643xx_private
*mp
= netdev_priv(netdev
);
1259 int port_num
= mp
->port_num
;
1261 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), ETH_INT_MASK_ALL
);
1262 /* wait for previous write to complete */
1263 mv_read(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
1265 mv643xx_eth_int_handler(netdev
->irq
, netdev
);
1267 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), ETH_INT_UNMASK_ALL
);
1271 static void mv643xx_init_ethtool_cmd(struct net_device
*dev
, int phy_address
,
1272 int speed
, int duplex
,
1273 struct ethtool_cmd
*cmd
)
1275 struct mv643xx_private
*mp
= netdev_priv(dev
);
1277 memset(cmd
, 0, sizeof(*cmd
));
1279 cmd
->port
= PORT_MII
;
1280 cmd
->transceiver
= XCVR_INTERNAL
;
1281 cmd
->phy_address
= phy_address
;
1284 cmd
->autoneg
= AUTONEG_ENABLE
;
1285 /* mii lib checks, but doesn't use speed on AUTONEG_ENABLE */
1286 cmd
->speed
= SPEED_100
;
1287 cmd
->advertising
= ADVERTISED_10baseT_Half
|
1288 ADVERTISED_10baseT_Full
|
1289 ADVERTISED_100baseT_Half
|
1290 ADVERTISED_100baseT_Full
;
1291 if (mp
->mii
.supports_gmii
)
1292 cmd
->advertising
|= ADVERTISED_1000baseT_Full
;
1294 cmd
->autoneg
= AUTONEG_DISABLE
;
1296 cmd
->duplex
= duplex
;
1303 * First function called after registering the network device.
1304 * It's purpose is to initialize the device as an ethernet device,
1305 * fill the ethernet device structure with pointers * to functions,
1306 * and set the MAC address of the interface
1308 * Input : struct device *
1309 * Output : -ENOMEM if failed , 0 if success
1311 static int mv643xx_eth_probe(struct platform_device
*pdev
)
1313 struct mv643xx_eth_platform_data
*pd
;
1315 struct mv643xx_private
*mp
;
1316 struct net_device
*dev
;
1318 struct resource
*res
;
1320 struct ethtool_cmd cmd
;
1321 int duplex
= DUPLEX_HALF
;
1322 int speed
= 0; /* default to auto-negotiation */
1324 pd
= pdev
->dev
.platform_data
;
1326 printk(KERN_ERR
"No mv643xx_eth_platform_data\n");
1330 dev
= alloc_etherdev(sizeof(struct mv643xx_private
));
1334 platform_set_drvdata(pdev
, dev
);
1336 mp
= netdev_priv(dev
);
1338 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1340 dev
->irq
= res
->start
;
1342 dev
->open
= mv643xx_eth_open
;
1343 dev
->stop
= mv643xx_eth_stop
;
1344 dev
->hard_start_xmit
= mv643xx_eth_start_xmit
;
1345 dev
->get_stats
= mv643xx_eth_get_stats
;
1346 dev
->set_mac_address
= mv643xx_eth_set_mac_address
;
1347 dev
->set_multicast_list
= mv643xx_eth_set_rx_mode
;
1349 /* No need to Tx Timeout */
1350 dev
->tx_timeout
= mv643xx_eth_tx_timeout
;
1352 dev
->poll
= mv643xx_poll
;
1356 #ifdef CONFIG_NET_POLL_CONTROLLER
1357 dev
->poll_controller
= mv643xx_netpoll
;
1360 dev
->watchdog_timeo
= 2 * HZ
;
1361 dev
->tx_queue_len
= mp
->tx_ring_size
;
1363 dev
->change_mtu
= mv643xx_eth_change_mtu
;
1364 dev
->do_ioctl
= mv643xx_eth_do_ioctl
;
1365 SET_ETHTOOL_OPS(dev
, &mv643xx_ethtool_ops
);
1367 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1368 #ifdef MAX_SKB_FRAGS
1370 * Zero copy can only work if we use Discovery II memory. Else, we will
1371 * have to map the buffers to ISA memory which is only 16 MB
1373 dev
->features
= NETIF_F_SG
| NETIF_F_IP_CSUM
;
1377 /* Configure the timeout task */
1378 INIT_WORK(&mp
->tx_timeout_task
, mv643xx_eth_tx_timeout_task
);
1380 spin_lock_init(&mp
->lock
);
1382 port_num
= mp
->port_num
= pd
->port_number
;
1384 /* set default config values */
1385 eth_port_uc_addr_get(dev
, dev
->dev_addr
);
1386 mp
->rx_ring_size
= MV643XX_ETH_PORT_DEFAULT_RECEIVE_QUEUE_SIZE
;
1387 mp
->tx_ring_size
= MV643XX_ETH_PORT_DEFAULT_TRANSMIT_QUEUE_SIZE
;
1389 if (is_valid_ether_addr(pd
->mac_addr
))
1390 memcpy(dev
->dev_addr
, pd
->mac_addr
, 6);
1392 if (pd
->phy_addr
|| pd
->force_phy_addr
)
1393 ethernet_phy_set(port_num
, pd
->phy_addr
);
1395 if (pd
->rx_queue_size
)
1396 mp
->rx_ring_size
= pd
->rx_queue_size
;
1398 if (pd
->tx_queue_size
)
1399 mp
->tx_ring_size
= pd
->tx_queue_size
;
1401 if (pd
->tx_sram_size
) {
1402 mp
->tx_sram_size
= pd
->tx_sram_size
;
1403 mp
->tx_sram_addr
= pd
->tx_sram_addr
;
1406 if (pd
->rx_sram_size
) {
1407 mp
->rx_sram_size
= pd
->rx_sram_size
;
1408 mp
->rx_sram_addr
= pd
->rx_sram_addr
;
1411 duplex
= pd
->duplex
;
1414 /* Hook up MII support for ethtool */
1416 mp
->mii
.mdio_read
= mv643xx_mdio_read
;
1417 mp
->mii
.mdio_write
= mv643xx_mdio_write
;
1418 mp
->mii
.phy_id
= ethernet_phy_get(port_num
);
1419 mp
->mii
.phy_id_mask
= 0x3f;
1420 mp
->mii
.reg_num_mask
= 0x1f;
1422 err
= ethernet_phy_detect(port_num
);
1424 pr_debug("MV643xx ethernet port %d: "
1425 "No PHY detected at addr %d\n",
1426 port_num
, ethernet_phy_get(port_num
));
1430 ethernet_phy_reset(port_num
);
1431 mp
->mii
.supports_gmii
= mii_check_gmii_support(&mp
->mii
);
1432 mv643xx_init_ethtool_cmd(dev
, mp
->mii
.phy_id
, speed
, duplex
, &cmd
);
1433 mv643xx_eth_update_pscr(dev
, &cmd
);
1434 mv643xx_set_settings(dev
, &cmd
);
1436 SET_MODULE_OWNER(dev
);
1437 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1438 err
= register_netdev(dev
);
1444 "%s: port %d with MAC address %02x:%02x:%02x:%02x:%02x:%02x\n",
1445 dev
->name
, port_num
, p
[0], p
[1], p
[2], p
[3], p
[4], p
[5]);
1447 if (dev
->features
& NETIF_F_SG
)
1448 printk(KERN_NOTICE
"%s: Scatter Gather Enabled\n", dev
->name
);
1450 if (dev
->features
& NETIF_F_IP_CSUM
)
1451 printk(KERN_NOTICE
"%s: TX TCP/IP Checksumming Supported\n",
1454 #ifdef MV643XX_CHECKSUM_OFFLOAD_TX
1455 printk(KERN_NOTICE
"%s: RX TCP/UDP Checksum Offload ON \n", dev
->name
);
1459 printk(KERN_NOTICE
"%s: TX and RX Interrupt Coalescing ON \n",
1464 printk(KERN_NOTICE
"%s: RX NAPI Enabled \n", dev
->name
);
1467 if (mp
->tx_sram_size
> 0)
1468 printk(KERN_NOTICE
"%s: Using SRAM\n", dev
->name
);
1478 static int mv643xx_eth_remove(struct platform_device
*pdev
)
1480 struct net_device
*dev
= platform_get_drvdata(pdev
);
1482 unregister_netdev(dev
);
1483 flush_scheduled_work();
1486 platform_set_drvdata(pdev
, NULL
);
1490 static int mv643xx_eth_shared_probe(struct platform_device
*pdev
)
1492 struct resource
*res
;
1494 printk(KERN_NOTICE
"MV-643xx 10/100/1000 Ethernet Driver\n");
1496 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1500 mv643xx_eth_shared_base
= ioremap(res
->start
,
1501 MV643XX_ETH_SHARED_REGS_SIZE
);
1502 if (mv643xx_eth_shared_base
== NULL
)
1509 static int mv643xx_eth_shared_remove(struct platform_device
*pdev
)
1511 iounmap(mv643xx_eth_shared_base
);
1512 mv643xx_eth_shared_base
= NULL
;
1517 static void mv643xx_eth_shutdown(struct platform_device
*pdev
)
1519 struct net_device
*dev
= platform_get_drvdata(pdev
);
1520 struct mv643xx_private
*mp
= netdev_priv(dev
);
1521 unsigned int port_num
= mp
->port_num
;
1523 /* Mask all interrupts on ethernet port */
1524 mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num
), 0);
1525 mv_read (MV643XX_ETH_INTERRUPT_MASK_REG(port_num
));
1527 eth_port_reset(port_num
);
1530 static struct platform_driver mv643xx_eth_driver
= {
1531 .probe
= mv643xx_eth_probe
,
1532 .remove
= mv643xx_eth_remove
,
1533 .shutdown
= mv643xx_eth_shutdown
,
1535 .name
= MV643XX_ETH_NAME
,
1539 static struct platform_driver mv643xx_eth_shared_driver
= {
1540 .probe
= mv643xx_eth_shared_probe
,
1541 .remove
= mv643xx_eth_shared_remove
,
1543 .name
= MV643XX_ETH_SHARED_NAME
,
1548 * mv643xx_init_module
1550 * Registers the network drivers into the Linux kernel
1556 static int __init
mv643xx_init_module(void)
1560 rc
= platform_driver_register(&mv643xx_eth_shared_driver
);
1562 rc
= platform_driver_register(&mv643xx_eth_driver
);
1564 platform_driver_unregister(&mv643xx_eth_shared_driver
);
1570 * mv643xx_cleanup_module
1572 * Registers the network drivers into the Linux kernel
1578 static void __exit
mv643xx_cleanup_module(void)
1580 platform_driver_unregister(&mv643xx_eth_driver
);
1581 platform_driver_unregister(&mv643xx_eth_shared_driver
);
1584 module_init(mv643xx_init_module
);
1585 module_exit(mv643xx_cleanup_module
);
1587 MODULE_LICENSE("GPL");
1588 MODULE_AUTHOR( "Rabeeh Khoury, Assaf Hoffman, Matthew Dharm, Manish Lachwani"
1589 " and Dale Farnsworth");
1590 MODULE_DESCRIPTION("Ethernet driver for Marvell MV643XX");
1593 * The second part is the low level driver of the gigE ethernet ports.
1597 * Marvell's Gigabit Ethernet controller low level driver
1600 * This file introduce low level API to Marvell's Gigabit Ethernet
1601 * controller. This Gigabit Ethernet Controller driver API controls
1602 * 1) Operations (i.e. port init, start, reset etc').
1603 * 2) Data flow (i.e. port send, receive etc').
1604 * Each Gigabit Ethernet port is controlled via
1605 * struct mv643xx_private.
1606 * This struct includes user configuration information as well as
1607 * driver internal data needed for its operations.
1609 * Supported Features:
1610 * - This low level driver is OS independent. Allocating memory for
1611 * the descriptor rings and buffers are not within the scope of
1613 * - The user is free from Rx/Tx queue managing.
1614 * - This low level driver introduce functionality API that enable
1615 * the to operate Marvell's Gigabit Ethernet Controller in a
1617 * - Simple Gigabit Ethernet port operation API.
1618 * - Simple Gigabit Ethernet port data flow API.
1619 * - Data flow and operation API support per queue functionality.
1620 * - Support cached descriptors for better performance.
1621 * - Enable access to all four DRAM banks and internal SRAM memory
1623 * - PHY access and control API.
1624 * - Port control register configuration API.
1625 * - Full control over Unicast and Multicast MAC configurations.
1629 * Initialization phase
1630 * This phase complete the initialization of the the
1631 * mv643xx_private struct.
1632 * User information regarding port configuration has to be set
1633 * prior to calling the port initialization routine.
1635 * In this phase any port Tx/Rx activity is halted, MIB counters
1636 * are cleared, PHY address is set according to user parameter and
1637 * access to DRAM and internal SRAM memory spaces.
1639 * Driver ring initialization
1640 * Allocating memory for the descriptor rings and buffers is not
1641 * within the scope of this driver. Thus, the user is required to
1642 * allocate memory for the descriptors ring and buffers. Those
1643 * memory parameters are used by the Rx and Tx ring initialization
1644 * routines in order to curve the descriptor linked list in a form
1646 * Note: Pay special attention to alignment issues when using
1647 * cached descriptors/buffers. In this phase the driver store
1648 * information in the mv643xx_private struct regarding each queue
1652 * This phase prepares the Ethernet port for Rx and Tx activity.
1653 * It uses the information stored in the mv643xx_private struct to
1654 * initialize the various port registers.
1657 * All packet references to/from the driver are done using
1659 * This struct is a unified struct used with Rx and Tx operations.
1660 * This way the user is not required to be familiar with neither
1661 * Tx nor Rx descriptors structures.
1662 * The driver's descriptors rings are management by indexes.
1663 * Those indexes controls the ring resources and used to indicate
1664 * a SW resource error:
1666 * This index points to the current available resource for use. For
1667 * example in Rx process this index will point to the descriptor
1668 * that will be passed to the user upon calling the receive
1669 * routine. In Tx process, this index will point to the descriptor
1670 * that will be assigned with the user packet info and transmitted.
1672 * This index points to the descriptor that need to restore its
1673 * resources. For example in Rx process, using the Rx buffer return
1674 * API will attach the buffer returned in packet info to the
1675 * descriptor pointed by 'used'. In Tx process, using the Tx
1676 * descriptor return will merely return the user packet info with
1677 * the command status of the transmitted buffer pointed by the
1678 * 'used' index. Nevertheless, it is essential to use this routine
1679 * to update the 'used' index.
1681 * This index supports Tx Scatter-Gather. It points to the first
1682 * descriptor of a packet assembled of multiple buffers. For
1683 * example when in middle of Such packet we have a Tx resource
1684 * error the 'curr' index get the value of 'first' to indicate
1685 * that the ring returned to its state before trying to transmit
1688 * Receive operation:
1689 * The eth_port_receive API set the packet information struct,
1690 * passed by the caller, with received information from the
1691 * 'current' SDMA descriptor.
1692 * It is the user responsibility to return this resource back
1693 * to the Rx descriptor ring to enable the reuse of this source.
1694 * Return Rx resource is done using the eth_rx_return_buff API.
1696 * Prior to calling the initialization routine eth_port_init() the user
1697 * must set the following fields under mv643xx_private struct:
1698 * port_num User Ethernet port number.
1699 * port_config User port configuration value.
1700 * port_config_extend User port config extend value.
1701 * port_sdma_config User port SDMA config value.
1702 * port_serial_control User port serial control value.
1704 * This driver data flow is done using the struct pkt_info which
1705 * is a unified struct for Rx and Tx operations:
1707 * byte_cnt Tx/Rx descriptor buffer byte count.
1708 * l4i_chk CPU provided TCP Checksum. For Tx operation
1710 * cmd_sts Tx/Rx descriptor command status.
1711 * buf_ptr Tx/Rx descriptor buffer pointer.
1712 * return_info Tx/Rx user resource return information.
1716 static int ethernet_phy_get(unsigned int eth_port_num
);
1717 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
);
1719 /* Ethernet Port routines */
1720 static void eth_port_set_filter_table_entry(int table
, unsigned char entry
);
1723 * eth_port_init - Initialize the Ethernet port driver
1726 * This function prepares the ethernet port to start its activity:
1727 * 1) Completes the ethernet port driver struct initialization toward port
1729 * 2) Resets the device to a quiescent state in case of warm reboot.
1730 * 3) Enable SDMA access to all four DRAM banks as well as internal SRAM.
1731 * 4) Clean MAC tables. The reset status of those tables is unknown.
1732 * 5) Set PHY address.
1733 * Note: Call this routine prior to eth_port_start routine and after
1734 * setting user values in the user fields of Ethernet port control
1738 * struct mv643xx_private *mp Ethernet port control struct
1746 static void eth_port_init(struct mv643xx_private
*mp
)
1748 mp
->rx_resource_err
= 0;
1750 eth_port_reset(mp
->port_num
);
1752 eth_port_init_mac_tables(mp
->port_num
);
1756 * eth_port_start - Start the Ethernet port activity.
1759 * This routine prepares the Ethernet port for Rx and Tx activity:
1760 * 1. Initialize Tx and Rx Current Descriptor Pointer for each queue that
1761 * has been initialized a descriptor's ring (using
1762 * ether_init_tx_desc_ring for Tx and ether_init_rx_desc_ring for Rx)
1763 * 2. Initialize and enable the Ethernet configuration port by writing to
1764 * the port's configuration and command registers.
1765 * 3. Initialize and enable the SDMA by writing to the SDMA's
1766 * configuration and command registers. After completing these steps,
1767 * the ethernet port SDMA can starts to perform Rx and Tx activities.
1769 * Note: Each Rx and Tx queue descriptor's list must be initialized prior
1770 * to calling this function (use ether_init_tx_desc_ring for Tx queues
1771 * and ether_init_rx_desc_ring for Rx queues).
1774 * dev - a pointer to the required interface
1777 * Ethernet port is ready to receive and transmit.
1782 static void eth_port_start(struct net_device
*dev
)
1784 struct mv643xx_private
*mp
= netdev_priv(dev
);
1785 unsigned int port_num
= mp
->port_num
;
1786 int tx_curr_desc
, rx_curr_desc
;
1788 struct ethtool_cmd ethtool_cmd
;
1790 /* Assignment of Tx CTRP of given queue */
1791 tx_curr_desc
= mp
->tx_curr_desc_q
;
1792 mv_write(MV643XX_ETH_TX_CURRENT_QUEUE_DESC_PTR_0(port_num
),
1793 (u32
)((struct eth_tx_desc
*)mp
->tx_desc_dma
+ tx_curr_desc
));
1795 /* Assignment of Rx CRDP of given queue */
1796 rx_curr_desc
= mp
->rx_curr_desc_q
;
1797 mv_write(MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_0(port_num
),
1798 (u32
)((struct eth_rx_desc
*)mp
->rx_desc_dma
+ rx_curr_desc
));
1800 /* Add the assigned Ethernet address to the port's address table */
1801 eth_port_uc_addr_set(port_num
, dev
->dev_addr
);
1803 /* Assign port configuration and command. */
1804 mv_write(MV643XX_ETH_PORT_CONFIG_REG(port_num
),
1805 MV643XX_ETH_PORT_CONFIG_DEFAULT_VALUE
);
1807 mv_write(MV643XX_ETH_PORT_CONFIG_EXTEND_REG(port_num
),
1808 MV643XX_ETH_PORT_CONFIG_EXTEND_DEFAULT_VALUE
);
1810 pscr
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
1812 pscr
&= ~(MV643XX_ETH_SERIAL_PORT_ENABLE
| MV643XX_ETH_FORCE_LINK_PASS
);
1813 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1815 pscr
|= MV643XX_ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL
|
1816 MV643XX_ETH_DISABLE_AUTO_NEG_SPEED_GMII
|
1817 MV643XX_ETH_DISABLE_AUTO_NEG_FOR_DUPLX
|
1818 MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL
|
1819 MV643XX_ETH_SERIAL_PORT_CONTROL_RESERVED
;
1821 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1823 pscr
|= MV643XX_ETH_SERIAL_PORT_ENABLE
;
1824 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), pscr
);
1826 /* Assign port SDMA configuration */
1827 mv_write(MV643XX_ETH_SDMA_CONFIG_REG(port_num
),
1828 MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE
);
1830 /* Enable port Rx. */
1831 mv643xx_eth_port_enable_rx(port_num
, ETH_RX_QUEUES_ENABLED
);
1833 /* Disable port bandwidth limits by clearing MTU register */
1834 mv_write(MV643XX_ETH_MAXIMUM_TRANSMIT_UNIT(port_num
), 0);
1836 /* save phy settings across reset */
1837 mv643xx_get_settings(dev
, ðtool_cmd
);
1838 ethernet_phy_reset(mp
->port_num
);
1839 mv643xx_set_settings(dev
, ðtool_cmd
);
1843 * eth_port_uc_addr_set - This function Set the port Unicast address.
1846 * This function Set the port Ethernet MAC address.
1849 * unsigned int eth_port_num Port number.
1850 * char * p_addr Address to be set
1853 * Set MAC address low and high registers. also calls
1854 * eth_port_set_filter_table_entry() to set the unicast
1855 * table with the proper information.
1861 static void eth_port_uc_addr_set(unsigned int eth_port_num
,
1862 unsigned char *p_addr
)
1868 mac_l
= (p_addr
[4] << 8) | (p_addr
[5]);
1869 mac_h
= (p_addr
[0] << 24) | (p_addr
[1] << 16) | (p_addr
[2] << 8) |
1872 mv_write(MV643XX_ETH_MAC_ADDR_LOW(eth_port_num
), mac_l
);
1873 mv_write(MV643XX_ETH_MAC_ADDR_HIGH(eth_port_num
), mac_h
);
1875 /* Accept frames of this address */
1876 table
= MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE(eth_port_num
);
1877 eth_port_set_filter_table_entry(table
, p_addr
[5] & 0x0f);
1881 * eth_port_uc_addr_get - This function retrieves the port Unicast address
1882 * (MAC address) from the ethernet hw registers.
1885 * This function retrieves the port Ethernet MAC address.
1888 * unsigned int eth_port_num Port number.
1889 * char *MacAddr pointer where the MAC address is stored
1892 * Copy the MAC address to the location pointed to by MacAddr
1898 static void eth_port_uc_addr_get(struct net_device
*dev
, unsigned char *p_addr
)
1900 struct mv643xx_private
*mp
= netdev_priv(dev
);
1904 mac_h
= mv_read(MV643XX_ETH_MAC_ADDR_HIGH(mp
->port_num
));
1905 mac_l
= mv_read(MV643XX_ETH_MAC_ADDR_LOW(mp
->port_num
));
1907 p_addr
[0] = (mac_h
>> 24) & 0xff;
1908 p_addr
[1] = (mac_h
>> 16) & 0xff;
1909 p_addr
[2] = (mac_h
>> 8) & 0xff;
1910 p_addr
[3] = mac_h
& 0xff;
1911 p_addr
[4] = (mac_l
>> 8) & 0xff;
1912 p_addr
[5] = mac_l
& 0xff;
1916 * The entries in each table are indexed by a hash of a packet's MAC
1917 * address. One bit in each entry determines whether the packet is
1918 * accepted. There are 4 entries (each 8 bits wide) in each register
1919 * of the table. The bits in each entry are defined as follows:
1920 * 0 Accept=1, Drop=0
1921 * 3-1 Queue (ETH_Q0=0)
1924 static void eth_port_set_filter_table_entry(int table
, unsigned char entry
)
1926 unsigned int table_reg
;
1927 unsigned int tbl_offset
;
1928 unsigned int reg_offset
;
1930 tbl_offset
= (entry
/ 4) * 4; /* Register offset of DA table entry */
1931 reg_offset
= entry
% 4; /* Entry offset within the register */
1933 /* Set "accepts frame bit" at specified table entry */
1934 table_reg
= mv_read(table
+ tbl_offset
);
1935 table_reg
|= 0x01 << (8 * reg_offset
);
1936 mv_write(table
+ tbl_offset
, table_reg
);
1940 * eth_port_mc_addr - Multicast address settings.
1942 * The MV device supports multicast using two tables:
1943 * 1) Special Multicast Table for MAC addresses of the form
1944 * 0x01-00-5E-00-00-XX (where XX is between 0x00 and 0x_FF).
1945 * The MAC DA[7:0] bits are used as a pointer to the Special Multicast
1946 * Table entries in the DA-Filter table.
1947 * 2) Other Multicast Table for multicast of another type. A CRC-8bit
1948 * is used as an index to the Other Multicast Table entries in the
1949 * DA-Filter table. This function calculates the CRC-8bit value.
1950 * In either case, eth_port_set_filter_table_entry() is then called
1951 * to set to set the actual table entry.
1953 static void eth_port_mc_addr(unsigned int eth_port_num
, unsigned char *p_addr
)
1957 unsigned char crc_result
= 0;
1963 if ((p_addr
[0] == 0x01) && (p_addr
[1] == 0x00) &&
1964 (p_addr
[2] == 0x5E) && (p_addr
[3] == 0x00) && (p_addr
[4] == 0x00)) {
1965 table
= MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
1967 eth_port_set_filter_table_entry(table
, p_addr
[5]);
1971 /* Calculate CRC-8 out of the given address */
1972 mac_h
= (p_addr
[0] << 8) | (p_addr
[1]);
1973 mac_l
= (p_addr
[2] << 24) | (p_addr
[3] << 16) |
1974 (p_addr
[4] << 8) | (p_addr
[5] << 0);
1976 for (i
= 0; i
< 32; i
++)
1977 mac_array
[i
] = (mac_l
>> i
) & 0x1;
1978 for (i
= 32; i
< 48; i
++)
1979 mac_array
[i
] = (mac_h
>> (i
- 32)) & 0x1;
1981 crc
[0] = mac_array
[45] ^ mac_array
[43] ^ mac_array
[40] ^ mac_array
[39] ^
1982 mac_array
[35] ^ mac_array
[34] ^ mac_array
[31] ^ mac_array
[30] ^
1983 mac_array
[28] ^ mac_array
[23] ^ mac_array
[21] ^ mac_array
[19] ^
1984 mac_array
[18] ^ mac_array
[16] ^ mac_array
[14] ^ mac_array
[12] ^
1985 mac_array
[8] ^ mac_array
[7] ^ mac_array
[6] ^ mac_array
[0];
1987 crc
[1] = mac_array
[46] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[43] ^
1988 mac_array
[41] ^ mac_array
[39] ^ mac_array
[36] ^ mac_array
[34] ^
1989 mac_array
[32] ^ mac_array
[30] ^ mac_array
[29] ^ mac_array
[28] ^
1990 mac_array
[24] ^ mac_array
[23] ^ mac_array
[22] ^ mac_array
[21] ^
1991 mac_array
[20] ^ mac_array
[18] ^ mac_array
[17] ^ mac_array
[16] ^
1992 mac_array
[15] ^ mac_array
[14] ^ mac_array
[13] ^ mac_array
[12] ^
1993 mac_array
[9] ^ mac_array
[6] ^ mac_array
[1] ^ mac_array
[0];
1995 crc
[2] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[44] ^ mac_array
[43] ^
1996 mac_array
[42] ^ mac_array
[39] ^ mac_array
[37] ^ mac_array
[34] ^
1997 mac_array
[33] ^ mac_array
[29] ^ mac_array
[28] ^ mac_array
[25] ^
1998 mac_array
[24] ^ mac_array
[22] ^ mac_array
[17] ^ mac_array
[15] ^
1999 mac_array
[13] ^ mac_array
[12] ^ mac_array
[10] ^ mac_array
[8] ^
2000 mac_array
[6] ^ mac_array
[2] ^ mac_array
[1] ^ mac_array
[0];
2002 crc
[3] = mac_array
[47] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[43] ^
2003 mac_array
[40] ^ mac_array
[38] ^ mac_array
[35] ^ mac_array
[34] ^
2004 mac_array
[30] ^ mac_array
[29] ^ mac_array
[26] ^ mac_array
[25] ^
2005 mac_array
[23] ^ mac_array
[18] ^ mac_array
[16] ^ mac_array
[14] ^
2006 mac_array
[13] ^ mac_array
[11] ^ mac_array
[9] ^ mac_array
[7] ^
2007 mac_array
[3] ^ mac_array
[2] ^ mac_array
[1];
2009 crc
[4] = mac_array
[46] ^ mac_array
[45] ^ mac_array
[44] ^ mac_array
[41] ^
2010 mac_array
[39] ^ mac_array
[36] ^ mac_array
[35] ^ mac_array
[31] ^
2011 mac_array
[30] ^ mac_array
[27] ^ mac_array
[26] ^ mac_array
[24] ^
2012 mac_array
[19] ^ mac_array
[17] ^ mac_array
[15] ^ mac_array
[14] ^
2013 mac_array
[12] ^ mac_array
[10] ^ mac_array
[8] ^ mac_array
[4] ^
2014 mac_array
[3] ^ mac_array
[2];
2016 crc
[5] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[45] ^ mac_array
[42] ^
2017 mac_array
[40] ^ mac_array
[37] ^ mac_array
[36] ^ mac_array
[32] ^
2018 mac_array
[31] ^ mac_array
[28] ^ mac_array
[27] ^ mac_array
[25] ^
2019 mac_array
[20] ^ mac_array
[18] ^ mac_array
[16] ^ mac_array
[15] ^
2020 mac_array
[13] ^ mac_array
[11] ^ mac_array
[9] ^ mac_array
[5] ^
2021 mac_array
[4] ^ mac_array
[3];
2023 crc
[6] = mac_array
[47] ^ mac_array
[46] ^ mac_array
[43] ^ mac_array
[41] ^
2024 mac_array
[38] ^ mac_array
[37] ^ mac_array
[33] ^ mac_array
[32] ^
2025 mac_array
[29] ^ mac_array
[28] ^ mac_array
[26] ^ mac_array
[21] ^
2026 mac_array
[19] ^ mac_array
[17] ^ mac_array
[16] ^ mac_array
[14] ^
2027 mac_array
[12] ^ mac_array
[10] ^ mac_array
[6] ^ mac_array
[5] ^
2030 crc
[7] = mac_array
[47] ^ mac_array
[44] ^ mac_array
[42] ^ mac_array
[39] ^
2031 mac_array
[38] ^ mac_array
[34] ^ mac_array
[33] ^ mac_array
[30] ^
2032 mac_array
[29] ^ mac_array
[27] ^ mac_array
[22] ^ mac_array
[20] ^
2033 mac_array
[18] ^ mac_array
[17] ^ mac_array
[15] ^ mac_array
[13] ^
2034 mac_array
[11] ^ mac_array
[7] ^ mac_array
[6] ^ mac_array
[5];
2036 for (i
= 0; i
< 8; i
++)
2037 crc_result
= crc_result
| (crc
[i
] << i
);
2039 table
= MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num
);
2040 eth_port_set_filter_table_entry(table
, crc_result
);
2044 * Set the entire multicast list based on dev->mc_list.
2046 static void eth_port_set_multicast_list(struct net_device
*dev
)
2049 struct dev_mc_list
*mc_list
;
2052 struct mv643xx_private
*mp
= netdev_priv(dev
);
2053 unsigned int eth_port_num
= mp
->port_num
;
2055 /* If the device is in promiscuous mode or in all multicast mode,
2056 * we will fully populate both multicast tables with accept.
2057 * This is guaranteed to yield a match on all multicast addresses...
2059 if ((dev
->flags
& IFF_PROMISC
) || (dev
->flags
& IFF_ALLMULTI
)) {
2060 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2061 /* Set all entries in DA filter special multicast
2063 * Set for ETH_Q0 for now
2065 * 0 Accept=1, Drop=0
2066 * 3-1 Queue ETH_Q0=0
2069 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE(eth_port_num
) + table_index
, 0x01010101);
2071 /* Set all entries in DA filter other multicast
2073 * Set for ETH_Q0 for now
2075 * 0 Accept=1, Drop=0
2076 * 3-1 Queue ETH_Q0=0
2079 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE(eth_port_num
) + table_index
, 0x01010101);
2084 /* We will clear out multicast tables every time we get the list.
2085 * Then add the entire new list...
2087 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2088 /* Clear DA filter special multicast table (Ex_dFSMT) */
2089 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2090 (eth_port_num
) + table_index
, 0);
2092 /* Clear DA filter other multicast table (Ex_dFOMT) */
2093 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2094 (eth_port_num
) + table_index
, 0);
2097 /* Get pointer to net_device multicast list and add each one... */
2098 for (i
= 0, mc_list
= dev
->mc_list
;
2099 (i
< 256) && (mc_list
!= NULL
) && (i
< dev
->mc_count
);
2100 i
++, mc_list
= mc_list
->next
)
2101 if (mc_list
->dmi_addrlen
== 6)
2102 eth_port_mc_addr(eth_port_num
, mc_list
->dmi_addr
);
2106 * eth_port_init_mac_tables - Clear all entrance in the UC, SMC and OMC tables
2109 * Go through all the DA filter tables (Unicast, Special Multicast &
2110 * Other Multicast) and set each entry to 0.
2113 * unsigned int eth_port_num Ethernet Port number.
2116 * Multicast and Unicast packets are rejected.
2121 static void eth_port_init_mac_tables(unsigned int eth_port_num
)
2125 /* Clear DA filter unicast table (Ex_dFUT) */
2126 for (table_index
= 0; table_index
<= 0xC; table_index
+= 4)
2127 mv_write(MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
2128 (eth_port_num
) + table_index
, 0);
2130 for (table_index
= 0; table_index
<= 0xFC; table_index
+= 4) {
2131 /* Clear DA filter special multicast table (Ex_dFSMT) */
2132 mv_write(MV643XX_ETH_DA_FILTER_SPECIAL_MULTICAST_TABLE_BASE
2133 (eth_port_num
) + table_index
, 0);
2134 /* Clear DA filter other multicast table (Ex_dFOMT) */
2135 mv_write(MV643XX_ETH_DA_FILTER_OTHER_MULTICAST_TABLE_BASE
2136 (eth_port_num
) + table_index
, 0);
2141 * eth_clear_mib_counters - Clear all MIB counters
2144 * This function clears all MIB counters of a specific ethernet port.
2145 * A read from the MIB counter will reset the counter.
2148 * unsigned int eth_port_num Ethernet Port number.
2151 * After reading all MIB counters, the counters resets.
2154 * MIB counter value.
2157 static void eth_clear_mib_counters(unsigned int eth_port_num
)
2161 /* Perform dummy reads from MIB counters */
2162 for (i
= ETH_MIB_GOOD_OCTETS_RECEIVED_LOW
; i
< ETH_MIB_LATE_COLLISION
;
2164 mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(eth_port_num
) + i
);
2167 static inline u32
read_mib(struct mv643xx_private
*mp
, int offset
)
2169 return mv_read(MV643XX_ETH_MIB_COUNTERS_BASE(mp
->port_num
) + offset
);
2172 static void eth_update_mib_counters(struct mv643xx_private
*mp
)
2174 struct mv643xx_mib_counters
*p
= &mp
->mib_counters
;
2177 p
->good_octets_received
+=
2178 read_mib(mp
, ETH_MIB_GOOD_OCTETS_RECEIVED_LOW
);
2179 p
->good_octets_received
+=
2180 (u64
)read_mib(mp
, ETH_MIB_GOOD_OCTETS_RECEIVED_HIGH
) << 32;
2182 for (offset
= ETH_MIB_BAD_OCTETS_RECEIVED
;
2183 offset
<= ETH_MIB_FRAMES_1024_TO_MAX_OCTETS
;
2185 *(u32
*)((char *)p
+ offset
) += read_mib(mp
, offset
);
2187 p
->good_octets_sent
+= read_mib(mp
, ETH_MIB_GOOD_OCTETS_SENT_LOW
);
2188 p
->good_octets_sent
+=
2189 (u64
)read_mib(mp
, ETH_MIB_GOOD_OCTETS_SENT_HIGH
) << 32;
2191 for (offset
= ETH_MIB_GOOD_FRAMES_SENT
;
2192 offset
<= ETH_MIB_LATE_COLLISION
;
2194 *(u32
*)((char *)p
+ offset
) += read_mib(mp
, offset
);
2198 * ethernet_phy_detect - Detect whether a phy is present
2201 * This function tests whether there is a PHY present on
2202 * the specified port.
2205 * unsigned int eth_port_num Ethernet Port number.
2212 * -ENODEV on failure
2215 static int ethernet_phy_detect(unsigned int port_num
)
2217 unsigned int phy_reg_data0
;
2220 eth_port_read_smi_reg(port_num
, 0, &phy_reg_data0
);
2221 auto_neg
= phy_reg_data0
& 0x1000;
2222 phy_reg_data0
^= 0x1000; /* invert auto_neg */
2223 eth_port_write_smi_reg(port_num
, 0, phy_reg_data0
);
2225 eth_port_read_smi_reg(port_num
, 0, &phy_reg_data0
);
2226 if ((phy_reg_data0
& 0x1000) == auto_neg
)
2227 return -ENODEV
; /* change didn't take */
2229 phy_reg_data0
^= 0x1000;
2230 eth_port_write_smi_reg(port_num
, 0, phy_reg_data0
);
2235 * ethernet_phy_get - Get the ethernet port PHY address.
2238 * This routine returns the given ethernet port PHY address.
2241 * unsigned int eth_port_num Ethernet Port number.
2250 static int ethernet_phy_get(unsigned int eth_port_num
)
2252 unsigned int reg_data
;
2254 reg_data
= mv_read(MV643XX_ETH_PHY_ADDR_REG
);
2256 return ((reg_data
>> (5 * eth_port_num
)) & 0x1f);
2260 * ethernet_phy_set - Set the ethernet port PHY address.
2263 * This routine sets the given ethernet port PHY address.
2266 * unsigned int eth_port_num Ethernet Port number.
2267 * int phy_addr PHY address.
2276 static void ethernet_phy_set(unsigned int eth_port_num
, int phy_addr
)
2279 int addr_shift
= 5 * eth_port_num
;
2281 reg_data
= mv_read(MV643XX_ETH_PHY_ADDR_REG
);
2282 reg_data
&= ~(0x1f << addr_shift
);
2283 reg_data
|= (phy_addr
& 0x1f) << addr_shift
;
2284 mv_write(MV643XX_ETH_PHY_ADDR_REG
, reg_data
);
2288 * ethernet_phy_reset - Reset Ethernet port PHY.
2291 * This routine utilizes the SMI interface to reset the ethernet port PHY.
2294 * unsigned int eth_port_num Ethernet Port number.
2303 static void ethernet_phy_reset(unsigned int eth_port_num
)
2305 unsigned int phy_reg_data
;
2308 eth_port_read_smi_reg(eth_port_num
, 0, &phy_reg_data
);
2309 phy_reg_data
|= 0x8000; /* Set bit 15 to reset the PHY */
2310 eth_port_write_smi_reg(eth_port_num
, 0, phy_reg_data
);
2312 /* wait for PHY to come out of reset */
2315 eth_port_read_smi_reg(eth_port_num
, 0, &phy_reg_data
);
2316 } while (phy_reg_data
& 0x8000);
2319 static void mv643xx_eth_port_enable_tx(unsigned int port_num
,
2320 unsigned int queues
)
2322 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
), queues
);
2325 static void mv643xx_eth_port_enable_rx(unsigned int port_num
,
2326 unsigned int queues
)
2328 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
), queues
);
2331 static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num
)
2335 /* Stop Tx port activity. Check port Tx activity. */
2336 queues
= mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
))
2339 /* Issue stop command for active queues only */
2340 mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
),
2343 /* Wait for all Tx activity to terminate. */
2344 /* Check port cause register that all Tx queues are stopped */
2345 while (mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num
))
2347 udelay(PHY_WAIT_MICRO_SECONDS
);
2349 /* Wait for Tx FIFO to empty */
2350 while (mv_read(MV643XX_ETH_PORT_STATUS_REG(port_num
)) &
2351 ETH_PORT_TX_FIFO_EMPTY
)
2352 udelay(PHY_WAIT_MICRO_SECONDS
);
2358 static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num
)
2362 /* Stop Rx port activity. Check port Rx activity. */
2363 queues
= mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
))
2366 /* Issue stop command for active queues only */
2367 mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
),
2370 /* Wait for all Rx activity to terminate. */
2371 /* Check port cause register that all Rx queues are stopped */
2372 while (mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num
))
2374 udelay(PHY_WAIT_MICRO_SECONDS
);
2381 * eth_port_reset - Reset Ethernet port
2384 * This routine resets the chip by aborting any SDMA engine activity and
2385 * clearing the MIB counters. The Receiver and the Transmit unit are in
2386 * idle state after this command is performed and the port is disabled.
2389 * unsigned int eth_port_num Ethernet Port number.
2392 * Channel activity is halted.
2398 static void eth_port_reset(unsigned int port_num
)
2400 unsigned int reg_data
;
2402 mv643xx_eth_port_disable_tx(port_num
);
2403 mv643xx_eth_port_disable_rx(port_num
);
2405 /* Clear all MIB counters */
2406 eth_clear_mib_counters(port_num
);
2408 /* Reset the Enable bit in the Configuration Register */
2409 reg_data
= mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
));
2410 reg_data
&= ~(MV643XX_ETH_SERIAL_PORT_ENABLE
|
2411 MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL
|
2412 MV643XX_ETH_FORCE_LINK_PASS
);
2413 mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num
), reg_data
);
2418 * eth_port_read_smi_reg - Read PHY registers
2421 * This routine utilize the SMI interface to interact with the PHY in
2422 * order to perform PHY register read.
2425 * unsigned int port_num Ethernet Port number.
2426 * unsigned int phy_reg PHY register address offset.
2427 * unsigned int *value Register value buffer.
2430 * Write the value of a specified PHY register into given buffer.
2433 * false if the PHY is busy or read data is not in valid state.
2437 static void eth_port_read_smi_reg(unsigned int port_num
,
2438 unsigned int phy_reg
, unsigned int *value
)
2440 int phy_addr
= ethernet_phy_get(port_num
);
2441 unsigned long flags
;
2444 /* the SMI register is a shared resource */
2445 spin_lock_irqsave(&mv643xx_eth_phy_lock
, flags
);
2447 /* wait for the SMI register to become available */
2448 for (i
= 0; mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_BUSY
; i
++) {
2449 if (i
== PHY_WAIT_ITERATIONS
) {
2450 printk("mv643xx PHY busy timeout, port %d\n", port_num
);
2453 udelay(PHY_WAIT_MICRO_SECONDS
);
2456 mv_write(MV643XX_ETH_SMI_REG
,
2457 (phy_addr
<< 16) | (phy_reg
<< 21) | ETH_SMI_OPCODE_READ
);
2459 /* now wait for the data to be valid */
2460 for (i
= 0; !(mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_READ_VALID
); i
++) {
2461 if (i
== PHY_WAIT_ITERATIONS
) {
2462 printk("mv643xx PHY read timeout, port %d\n", port_num
);
2465 udelay(PHY_WAIT_MICRO_SECONDS
);
2468 *value
= mv_read(MV643XX_ETH_SMI_REG
) & 0xffff;
2470 spin_unlock_irqrestore(&mv643xx_eth_phy_lock
, flags
);
2474 * eth_port_write_smi_reg - Write to PHY registers
2477 * This routine utilize the SMI interface to interact with the PHY in
2478 * order to perform writes to PHY registers.
2481 * unsigned int eth_port_num Ethernet Port number.
2482 * unsigned int phy_reg PHY register address offset.
2483 * unsigned int value Register value.
2486 * Write the given value to the specified PHY register.
2489 * false if the PHY is busy.
2493 static void eth_port_write_smi_reg(unsigned int eth_port_num
,
2494 unsigned int phy_reg
, unsigned int value
)
2498 unsigned long flags
;
2500 phy_addr
= ethernet_phy_get(eth_port_num
);
2502 /* the SMI register is a shared resource */
2503 spin_lock_irqsave(&mv643xx_eth_phy_lock
, flags
);
2505 /* wait for the SMI register to become available */
2506 for (i
= 0; mv_read(MV643XX_ETH_SMI_REG
) & ETH_SMI_BUSY
; i
++) {
2507 if (i
== PHY_WAIT_ITERATIONS
) {
2508 printk("mv643xx PHY busy timeout, port %d\n",
2512 udelay(PHY_WAIT_MICRO_SECONDS
);
2515 mv_write(MV643XX_ETH_SMI_REG
, (phy_addr
<< 16) | (phy_reg
<< 21) |
2516 ETH_SMI_OPCODE_WRITE
| (value
& 0xffff));
2518 spin_unlock_irqrestore(&mv643xx_eth_phy_lock
, flags
);
2522 * Wrappers for MII support library.
2524 static int mv643xx_mdio_read(struct net_device
*dev
, int phy_id
, int location
)
2527 struct mv643xx_private
*mp
= netdev_priv(dev
);
2529 eth_port_read_smi_reg(mp
->port_num
, location
, &val
);
2533 static void mv643xx_mdio_write(struct net_device
*dev
, int phy_id
, int location
, int val
)
2535 struct mv643xx_private
*mp
= netdev_priv(dev
);
2536 eth_port_write_smi_reg(mp
->port_num
, location
, val
);
2540 * eth_port_receive - Get received information from Rx ring.
2543 * This routine returns the received data to the caller. There is no
2544 * data copying during routine operation. All information is returned
2545 * using pointer to packet information struct passed from the caller.
2546 * If the routine exhausts Rx ring resources then the resource error flag
2550 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2551 * struct pkt_info *p_pkt_info User packet buffer.
2554 * Rx ring current and used indexes are updated.
2557 * ETH_ERROR in case the routine can not access Rx desc ring.
2558 * ETH_QUEUE_FULL if Rx ring resources are exhausted.
2559 * ETH_END_OF_JOB if there is no received data.
2562 static ETH_FUNC_RET_STATUS
eth_port_receive(struct mv643xx_private
*mp
,
2563 struct pkt_info
*p_pkt_info
)
2565 int rx_next_curr_desc
, rx_curr_desc
, rx_used_desc
;
2566 volatile struct eth_rx_desc
*p_rx_desc
;
2567 unsigned int command_status
;
2568 unsigned long flags
;
2570 /* Do not process Rx ring in case of Rx ring resource error */
2571 if (mp
->rx_resource_err
)
2572 return ETH_QUEUE_FULL
;
2574 spin_lock_irqsave(&mp
->lock
, flags
);
2576 /* Get the Rx Desc ring 'curr and 'used' indexes */
2577 rx_curr_desc
= mp
->rx_curr_desc_q
;
2578 rx_used_desc
= mp
->rx_used_desc_q
;
2580 p_rx_desc
= &mp
->p_rx_desc_area
[rx_curr_desc
];
2582 /* The following parameters are used to save readings from memory */
2583 command_status
= p_rx_desc
->cmd_sts
;
2586 /* Nothing to receive... */
2587 if (command_status
& (ETH_BUFFER_OWNED_BY_DMA
)) {
2588 spin_unlock_irqrestore(&mp
->lock
, flags
);
2589 return ETH_END_OF_JOB
;
2592 p_pkt_info
->byte_cnt
= (p_rx_desc
->byte_cnt
) - RX_BUF_OFFSET
;
2593 p_pkt_info
->cmd_sts
= command_status
;
2594 p_pkt_info
->buf_ptr
= (p_rx_desc
->buf_ptr
) + RX_BUF_OFFSET
;
2595 p_pkt_info
->return_info
= mp
->rx_skb
[rx_curr_desc
];
2596 p_pkt_info
->l4i_chk
= p_rx_desc
->buf_size
;
2599 * Clean the return info field to indicate that the
2600 * packet has been moved to the upper layers
2602 mp
->rx_skb
[rx_curr_desc
] = NULL
;
2604 /* Update current index in data structure */
2605 rx_next_curr_desc
= (rx_curr_desc
+ 1) % mp
->rx_ring_size
;
2606 mp
->rx_curr_desc_q
= rx_next_curr_desc
;
2608 /* Rx descriptors exhausted. Set the Rx ring resource error flag */
2609 if (rx_next_curr_desc
== rx_used_desc
)
2610 mp
->rx_resource_err
= 1;
2612 spin_unlock_irqrestore(&mp
->lock
, flags
);
2618 * eth_rx_return_buff - Returns a Rx buffer back to the Rx ring.
2621 * This routine returns a Rx buffer back to the Rx ring. It retrieves the
2622 * next 'used' descriptor and attached the returned buffer to it.
2623 * In case the Rx ring was in "resource error" condition, where there are
2624 * no available Rx resources, the function resets the resource error flag.
2627 * struct mv643xx_private *mp Ethernet Port Control srtuct.
2628 * struct pkt_info *p_pkt_info Information on returned buffer.
2631 * New available Rx resource in Rx descriptor ring.
2634 * ETH_ERROR in case the routine can not access Rx desc ring.
2637 static ETH_FUNC_RET_STATUS
eth_rx_return_buff(struct mv643xx_private
*mp
,
2638 struct pkt_info
*p_pkt_info
)
2640 int used_rx_desc
; /* Where to return Rx resource */
2641 volatile struct eth_rx_desc
*p_used_rx_desc
;
2642 unsigned long flags
;
2644 spin_lock_irqsave(&mp
->lock
, flags
);
2646 /* Get 'used' Rx descriptor */
2647 used_rx_desc
= mp
->rx_used_desc_q
;
2648 p_used_rx_desc
= &mp
->p_rx_desc_area
[used_rx_desc
];
2650 p_used_rx_desc
->buf_ptr
= p_pkt_info
->buf_ptr
;
2651 p_used_rx_desc
->buf_size
= p_pkt_info
->byte_cnt
;
2652 mp
->rx_skb
[used_rx_desc
] = p_pkt_info
->return_info
;
2654 /* Flush the write pipe */
2656 /* Return the descriptor to DMA ownership */
2658 p_used_rx_desc
->cmd_sts
=
2659 ETH_BUFFER_OWNED_BY_DMA
| ETH_RX_ENABLE_INTERRUPT
;
2662 /* Move the used descriptor pointer to the next descriptor */
2663 mp
->rx_used_desc_q
= (used_rx_desc
+ 1) % mp
->rx_ring_size
;
2665 /* Any Rx return cancels the Rx resource error status */
2666 mp
->rx_resource_err
= 0;
2668 spin_unlock_irqrestore(&mp
->lock
, flags
);
2673 /************* Begin ethtool support *************************/
2675 struct mv643xx_stats
{
2676 char stat_string
[ETH_GSTRING_LEN
];
2681 #define MV643XX_STAT(m) sizeof(((struct mv643xx_private *)0)->m), \
2682 offsetof(struct mv643xx_private, m)
2684 static const struct mv643xx_stats mv643xx_gstrings_stats
[] = {
2685 { "rx_packets", MV643XX_STAT(stats
.rx_packets
) },
2686 { "tx_packets", MV643XX_STAT(stats
.tx_packets
) },
2687 { "rx_bytes", MV643XX_STAT(stats
.rx_bytes
) },
2688 { "tx_bytes", MV643XX_STAT(stats
.tx_bytes
) },
2689 { "rx_errors", MV643XX_STAT(stats
.rx_errors
) },
2690 { "tx_errors", MV643XX_STAT(stats
.tx_errors
) },
2691 { "rx_dropped", MV643XX_STAT(stats
.rx_dropped
) },
2692 { "tx_dropped", MV643XX_STAT(stats
.tx_dropped
) },
2693 { "good_octets_received", MV643XX_STAT(mib_counters
.good_octets_received
) },
2694 { "bad_octets_received", MV643XX_STAT(mib_counters
.bad_octets_received
) },
2695 { "internal_mac_transmit_err", MV643XX_STAT(mib_counters
.internal_mac_transmit_err
) },
2696 { "good_frames_received", MV643XX_STAT(mib_counters
.good_frames_received
) },
2697 { "bad_frames_received", MV643XX_STAT(mib_counters
.bad_frames_received
) },
2698 { "broadcast_frames_received", MV643XX_STAT(mib_counters
.broadcast_frames_received
) },
2699 { "multicast_frames_received", MV643XX_STAT(mib_counters
.multicast_frames_received
) },
2700 { "frames_64_octets", MV643XX_STAT(mib_counters
.frames_64_octets
) },
2701 { "frames_65_to_127_octets", MV643XX_STAT(mib_counters
.frames_65_to_127_octets
) },
2702 { "frames_128_to_255_octets", MV643XX_STAT(mib_counters
.frames_128_to_255_octets
) },
2703 { "frames_256_to_511_octets", MV643XX_STAT(mib_counters
.frames_256_to_511_octets
) },
2704 { "frames_512_to_1023_octets", MV643XX_STAT(mib_counters
.frames_512_to_1023_octets
) },
2705 { "frames_1024_to_max_octets", MV643XX_STAT(mib_counters
.frames_1024_to_max_octets
) },
2706 { "good_octets_sent", MV643XX_STAT(mib_counters
.good_octets_sent
) },
2707 { "good_frames_sent", MV643XX_STAT(mib_counters
.good_frames_sent
) },
2708 { "excessive_collision", MV643XX_STAT(mib_counters
.excessive_collision
) },
2709 { "multicast_frames_sent", MV643XX_STAT(mib_counters
.multicast_frames_sent
) },
2710 { "broadcast_frames_sent", MV643XX_STAT(mib_counters
.broadcast_frames_sent
) },
2711 { "unrec_mac_control_received", MV643XX_STAT(mib_counters
.unrec_mac_control_received
) },
2712 { "fc_sent", MV643XX_STAT(mib_counters
.fc_sent
) },
2713 { "good_fc_received", MV643XX_STAT(mib_counters
.good_fc_received
) },
2714 { "bad_fc_received", MV643XX_STAT(mib_counters
.bad_fc_received
) },
2715 { "undersize_received", MV643XX_STAT(mib_counters
.undersize_received
) },
2716 { "fragments_received", MV643XX_STAT(mib_counters
.fragments_received
) },
2717 { "oversize_received", MV643XX_STAT(mib_counters
.oversize_received
) },
2718 { "jabber_received", MV643XX_STAT(mib_counters
.jabber_received
) },
2719 { "mac_receive_error", MV643XX_STAT(mib_counters
.mac_receive_error
) },
2720 { "bad_crc_event", MV643XX_STAT(mib_counters
.bad_crc_event
) },
2721 { "collision", MV643XX_STAT(mib_counters
.collision
) },
2722 { "late_collision", MV643XX_STAT(mib_counters
.late_collision
) },
2725 #define MV643XX_STATS_LEN \
2726 sizeof(mv643xx_gstrings_stats) / sizeof(struct mv643xx_stats)
2728 static void mv643xx_get_drvinfo(struct net_device
*netdev
,
2729 struct ethtool_drvinfo
*drvinfo
)
2731 strncpy(drvinfo
->driver
, mv643xx_driver_name
, 32);
2732 strncpy(drvinfo
->version
, mv643xx_driver_version
, 32);
2733 strncpy(drvinfo
->fw_version
, "N/A", 32);
2734 strncpy(drvinfo
->bus_info
, "mv643xx", 32);
2735 drvinfo
->n_stats
= MV643XX_STATS_LEN
;
2738 static int mv643xx_get_stats_count(struct net_device
*netdev
)
2740 return MV643XX_STATS_LEN
;
2743 static void mv643xx_get_ethtool_stats(struct net_device
*netdev
,
2744 struct ethtool_stats
*stats
, uint64_t *data
)
2746 struct mv643xx_private
*mp
= netdev
->priv
;
2749 eth_update_mib_counters(mp
);
2751 for (i
= 0; i
< MV643XX_STATS_LEN
; i
++) {
2752 char *p
= (char *)mp
+mv643xx_gstrings_stats
[i
].stat_offset
;
2753 data
[i
] = (mv643xx_gstrings_stats
[i
].sizeof_stat
==
2754 sizeof(uint64_t)) ? *(uint64_t *)p
: *(uint32_t *)p
;
2758 static void mv643xx_get_strings(struct net_device
*netdev
, uint32_t stringset
,
2765 for (i
=0; i
< MV643XX_STATS_LEN
; i
++) {
2766 memcpy(data
+ i
* ETH_GSTRING_LEN
,
2767 mv643xx_gstrings_stats
[i
].stat_string
,
2774 static u32
mv643xx_eth_get_link(struct net_device
*dev
)
2776 struct mv643xx_private
*mp
= netdev_priv(dev
);
2778 return mii_link_ok(&mp
->mii
);
2781 static int mv643xx_eth_nway_restart(struct net_device
*dev
)
2783 struct mv643xx_private
*mp
= netdev_priv(dev
);
2785 return mii_nway_restart(&mp
->mii
);
2788 static int mv643xx_eth_do_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
2790 struct mv643xx_private
*mp
= netdev_priv(dev
);
2792 return generic_mii_ioctl(&mp
->mii
, if_mii(ifr
), cmd
, NULL
);
2795 static const struct ethtool_ops mv643xx_ethtool_ops
= {
2796 .get_settings
= mv643xx_get_settings
,
2797 .set_settings
= mv643xx_set_settings
,
2798 .get_drvinfo
= mv643xx_get_drvinfo
,
2799 .get_link
= mv643xx_eth_get_link
,
2800 .get_sg
= ethtool_op_get_sg
,
2801 .set_sg
= ethtool_op_set_sg
,
2802 .get_stats_count
= mv643xx_get_stats_count
,
2803 .get_ethtool_stats
= mv643xx_get_ethtool_stats
,
2804 .get_strings
= mv643xx_get_strings
,
2805 .get_stats_count
= mv643xx_get_stats_count
,
2806 .get_ethtool_stats
= mv643xx_get_ethtool_stats
,
2807 .nway_reset
= mv643xx_eth_nway_restart
,
2810 /************* End ethtool support *************************/