arch/blackfin/mach-bf548/include/mach/portmux.h

   1 /*
   2  * Copyright 2007-2009 Analog Devices Inc.
   3  *
   4  * Licensed under the GPL-2 or later.
   5  */
   6
   7 #ifndef _MACH_PORTMUX_H_
   8 #define _MACH_PORTMUX_H_
   9
  10 #define P_SPORT2_TFS    (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
  11 #define P_SPORT2_DTSEC  (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
  12 #define P_SPORT2_DTPRI  (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
  13 #define P_SPORT2_TSCLK  (P_DEFINED | P_IDENT(GPIO_PA3) | P_FUNCT(0))
  14 #define P_SPORT2_RFS    (P_DEFINED | P_IDENT(GPIO_PA4) | P_FUNCT(0))
  15 #define P_SPORT2_DRSEC  (P_DEFINED | P_IDENT(GPIO_PA5) | P_FUNCT(0))
  16 #define P_SPORT2_DRPRI  (P_DEFINED | P_IDENT(GPIO_PA6) | P_FUNCT(0))
  17 #define P_SPORT2_RSCLK  (P_DEFINED | P_IDENT(GPIO_PA7) | P_FUNCT(0))
  18 #define P_SPORT3_TFS    (P_DEFINED | P_IDENT(GPIO_PA8) | P_FUNCT(0))
  19 #define P_SPORT3_DTSEC  (P_DEFINED | P_IDENT(GPIO_PA9) | P_FUNCT(0))
  20 #define P_SPORT3_DTPRI  (P_DEFINED | P_IDENT(GPIO_PA10) | P_FUNCT(0))
  21 #define P_SPORT3_TSCLK  (P_DEFINED | P_IDENT(GPIO_PA11) | P_FUNCT(0))
  22 #define P_SPORT3_RFS    (P_DEFINED | P_IDENT(GPIO_PA12) | P_FUNCT(0))
  23 #define P_SPORT3_DRSEC  (P_DEFINED | P_IDENT(GPIO_PA13) | P_FUNCT(0))
  24 #define P_SPORT3_DRPRI  (P_DEFINED | P_IDENT(GPIO_PA14) | P_FUNCT(0))
  25 #define P_SPORT3_RSCLK  (P_DEFINED | P_IDENT(GPIO_PA15) | P_FUNCT(0))
  26 #define P_TMR4  (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(1))
  27 #define P_TMR5  (P_DEFINED | P_IDENT(GPIO_PA5) | P_FUNCT(1))
  28 #define P_TMR6  (P_DEFINED | P_IDENT(GPIO_PA9) | P_FUNCT(1))
  29 #define P_TMR7  (P_DEFINED | P_IDENT(GPIO_PA13) | P_FUNCT(1))
  30
  31 #define P_TWI1_SCL      (P_DEFINED | P_IDENT(GPIO_PB0) | P_FUNCT(0))
  32 #define P_TWI1_SDA      (P_DEFINED | P_IDENT(GPIO_PB1) | P_FUNCT(0))
  33 #define P_UART3_RTS     (P_DEFINED | P_IDENT(GPIO_PB2) | P_FUNCT(0))
  34 #define P_UART3_CTS     (P_DEFINED | P_IDENT(GPIO_PB3) | P_FUNCT(0))
  35 #define P_UART2_TX      (P_DEFINED | P_IDENT(GPIO_PB4) | P_FUNCT(0))
  36 #define P_UART2_RX      (P_DEFINED | P_IDENT(GPIO_PB5) | P_FUNCT(0))
  37 #define P_UART3_TX      (P_DEFINED | P_IDENT(GPIO_PB6) | P_FUNCT(0))
  38 #define P_UART3_RX      (P_DEFINED | P_IDENT(GPIO_PB7) | P_FUNCT(0))
  39 #define P_SPI2_SS       (P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(0))
  40 #define P_SPI2_SSEL1    (P_DEFINED | P_IDENT(GPIO_PB9) | P_FUNCT(0))
  41 #define P_SPI2_SSEL2    (P_DEFINED | P_IDENT(GPIO_PB10) | P_FUNCT(0))
  42 #define P_SPI2_SSEL3    (P_DEFINED | P_IDENT(GPIO_PB11) | P_FUNCT(0))
  43 #define P_SPI2_SCK      (P_DEFINED | P_IDENT(GPIO_PB12) | P_FUNCT(0))
  44 #define P_SPI2_MOSI     (P_DEFINED | P_IDENT(GPIO_PB13) | P_FUNCT(0))
  45 #define P_SPI2_MISO     (P_DEFINED | P_IDENT(GPIO_PB14) | P_FUNCT(0))
  46 #define P_TMR0  (P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(1))
  47 #define P_TMR1  (P_DEFINED | P_IDENT(GPIO_PB9) | P_FUNCT(1))
  48 #define P_TMR2  (P_DEFINED | P_IDENT(GPIO_PB10) | P_FUNCT(1))
  49 #define P_TMR3  (P_DEFINED | P_IDENT(GPIO_PB11) | P_FUNCT(1))
  50
  51 #define P_SPORT0_TFS    (P_DEFINED | P_IDENT(GPIO_PC0) | P_FUNCT(0))
  52 #define P_SPORT0_DTSEC  (P_DEFINED | P_IDENT(GPIO_PC1) | P_FUNCT(0))
  53 #define P_SPORT0_DTPRI  (P_DEFINED | P_IDENT(GPIO_PC2) | P_FUNCT(0))
  54 #define P_SPORT0_TSCLK  (P_DEFINED | P_IDENT(GPIO_PC3) | P_FUNCT(0))
  55 #define P_SPORT0_RFS    (P_DEFINED | P_IDENT(GPIO_PC4) | P_FUNCT(0))
  56 #define P_SPORT0_DRSEC  (P_DEFINED | P_IDENT(GPIO_PC5) | P_FUNCT(0))
  57 #define P_SPORT0_DRPRI  (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0))
  58 #define P_SPORT0_RSCLK  (P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0))
  59 #define P_SD_D0 (P_DEFINED | P_IDENT(GPIO_PC8) | P_FUNCT(0))
  60 #define P_SD_D1 (P_DEFINED | P_IDENT(GPIO_PC9) | P_FUNCT(0))
  61 #define P_SD_D2 (P_DEFINED | P_IDENT(GPIO_PC10) | P_FUNCT(0))
  62 #define P_SD_D3 (P_DEFINED | P_IDENT(GPIO_PC11) | P_FUNCT(0))
  63 #define P_SD_CLK        (P_DEFINED | P_IDENT(GPIO_PC12) | P_FUNCT(0))
  64 #define P_SD_CMD        (P_DEFINED | P_IDENT(GPIO_PC13) | P_FUNCT(0))
  65 #define P_MMCLK (P_DEFINED | P_IDENT(GPIO_PC1) | P_FUNCT(1))
  66 #define P_MBCLK (P_DEFINED | P_IDENT(GPIO_PC5) | P_FUNCT(1))
  67
  68 #define P_PPI1_D0       (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(0))
  69 #define P_PPI1_D1       (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(0))
  70 #define P_PPI1_D2       (P_DEFINED | P_IDENT(GPIO_PD2) | P_FUNCT(0))
  71 #define P_PPI1_D3       (P_DEFINED | P_IDENT(GPIO_PD3) | P_FUNCT(0))
  72 #define P_PPI1_D4       (P_DEFINED | P_IDENT(GPIO_PD4) | P_FUNCT(0))
  73 #define P_PPI1_D5       (P_DEFINED | P_IDENT(GPIO_PD5) | P_FUNCT(0))
  74 #define P_PPI1_D6       (P_DEFINED | P_IDENT(GPIO_PD6) | P_FUNCT(0))
  75 #define P_PPI1_D7       (P_DEFINED | P_IDENT(GPIO_PD7) | P_FUNCT(0))
  76 #define P_PPI1_D8       (P_DEFINED | P_IDENT(GPIO_PD8) | P_FUNCT(0))
  77 #define P_PPI1_D9       (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(0))
  78 #define P_PPI1_D10      (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(0))
  79 #define P_PPI1_D11      (P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(0))
  80 #define P_PPI1_D12      (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(0))
  81 #define P_PPI1_D13      (P_DEFINED | P_IDENT(GPIO_PD13) | P_FUNCT(0))
  82 #define P_PPI1_D14      (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(0))
  83 #define P_PPI1_D15      (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(0))
  84
  85 #define P_HOST_D8       (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(1))
  86 #define P_HOST_D9       (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(1))
  87 #define P_HOST_D10      (P_DEFINED | P_IDENT(GPIO_PD2) | P_FUNCT(1))
  88 #define P_HOST_D11      (P_DEFINED | P_IDENT(GPIO_PD3) | P_FUNCT(1))
  89 #define P_HOST_D12      (P_DEFINED | P_IDENT(GPIO_PD4) | P_FUNCT(1))
  90 #define P_HOST_D13      (P_DEFINED | P_IDENT(GPIO_PD5) | P_FUNCT(1))
  91 #define P_HOST_D14      (P_DEFINED | P_IDENT(GPIO_PD6) | P_FUNCT(1))
  92 #define P_HOST_D15      (P_DEFINED | P_IDENT(GPIO_PD7) | P_FUNCT(1))
  93 #define P_HOST_D0       (P_DEFINED | P_IDENT(GPIO_PD8) | P_FUNCT(1))
  94 #define P_HOST_D1       (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(1))
  95 #define P_HOST_D2       (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(1))
  96 #define P_HOST_D3       (P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(1))
  97 #define P_HOST_D4       (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(1))
  98 #define P_HOST_D5       (P_DEFINED | P_IDENT(GPIO_PD13) | P_FUNCT(1))
  99 #define P_HOST_D6       (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(1))
 100 #define P_HOST_D7       (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(1))
 101 #define P_SPORT1_TFS    (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(2))
 102 #define P_SPORT1_DTSEC  (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(2))
 103 #define P_SPORT1_DTPRI  (P_DEFINED | P_IDENT(GPIO_PD2) | P_FUNCT(2))
 104 #define P_SPORT1_TSCLK  (P_DEFINED | P_IDENT(GPIO_PD3) | P_FUNCT(2))
 105 #define P_SPORT1_RFS    (P_DEFINED | P_IDENT(GPIO_PD4) | P_FUNCT(2))
 106 #define P_SPORT1_DRSEC  (P_DEFINED | P_IDENT(GPIO_PD5) | P_FUNCT(2))
 107 #define P_SPORT1_DRPRI  (P_DEFINED | P_IDENT(GPIO_PD6) | P_FUNCT(2))
 108 #define P_SPORT1_RSCLK  (P_DEFINED | P_IDENT(GPIO_PD7) | P_FUNCT(2))
 109 #define P_PPI2_D0       (P_DEFINED | P_IDENT(GPIO_PD8) | P_FUNCT(2))
 110 #define P_PPI2_D1       (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(2))
 111 #define P_PPI2_D2       (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(2))
 112 #define P_PPI2_D3       (P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(2))
 113 #define P_PPI2_D4       (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(2))
 114 #define P_PPI2_D5       (P_DEFINED | P_IDENT(GPIO_PD13) | P_FUNCT(2))
 115 #define P_PPI2_D6       (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(2))
 116 #define P_PPI2_D7       (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(2))
 117 #define P_PPI0_D18      (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(3))
 118 #define P_PPI0_D19      (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(3))
 119 #define P_PPI0_D20      (P_DEFINED | P_IDENT(GPIO_PD2) | P_FUNCT(3))
 120 #define P_PPI0_D21      (P_DEFINED | P_IDENT(GPIO_PD3) | P_FUNCT(3))
 121 #define P_PPI0_D22      (P_DEFINED | P_IDENT(GPIO_PD4) | P_FUNCT(3))
 122 #define P_PPI0_D23      (P_DEFINED | P_IDENT(GPIO_PD5) | P_FUNCT(3))
 123 #define P_KEY_ROW0      (P_DEFINED | P_IDENT(GPIO_PD8) | P_FUNCT(3))
 124 #define P_KEY_ROW1      (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(3))
 125 #define P_KEY_ROW2      (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(3))
 126 #define P_KEY_ROW3      (P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(3))
 127 #define P_KEY_COL0      (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(3))
 128 #define P_KEY_COL1      (P_DEFINED | P_IDENT(GPIO_PD13) | P_FUNCT(3))
 129 #define P_KEY_COL2      (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3))
 130 #define P_KEY_COL3      (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3))
 131
 132 #define GPIO_DEFAULT_BOOT_SPI_CS GPIO_PE4
 133 #define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL1
 134 #define P_SPI0_SCK      (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0))
 135 #define P_SPI0_MISO     (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0))
 136 #define P_SPI0_MOSI     (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0))
 137 #define P_SPI0_SS       (P_DEFINED | P_IDENT(GPIO_PE3) | P_FUNCT(0))
 138 #define P_SPI0_SSEL1    (P_DEFINED | P_IDENT(GPIO_PE4) | P_FUNCT(0))
 139 #define P_SPI0_SSEL2    (P_DEFINED | P_IDENT(GPIO_PE5) | P_FUNCT(0))
 140 #define P_SPI0_SSEL3    (P_DEFINED | P_IDENT(GPIO_PE6) | P_FUNCT(0))
 141 #define P_UART0_TX      (P_DEFINED | P_IDENT(GPIO_PE7) | P_FUNCT(0))
 142 #define P_UART0_RX      (P_DEFINED | P_IDENT(GPIO_PE8) | P_FUNCT(0))
 143 #define P_UART1_RTS     (P_DEFINED | P_IDENT(GPIO_PE9) | P_FUNCT(0))
 144 #define P_UART1_CTS     (P_DEFINED | P_IDENT(GPIO_PE10) | P_FUNCT(0))
 145 #define P_PPI1_CLK      (P_DEFINED | P_IDENT(GPIO_PE11) | P_FUNCT(0))
 146 #define P_PPI1_FS1      (P_DEFINED | P_IDENT(GPIO_PE12) | P_FUNCT(0))
 147 #define P_PPI1_FS2      (P_DEFINED | P_IDENT(GPIO_PE13) | P_FUNCT(0))
 148 #define P_TWI0_SCL      (P_DEFINED | P_IDENT(GPIO_PE14) | P_FUNCT(0))
 149 #define P_TWI0_SDA      (P_DEFINED | P_IDENT(GPIO_PE15) | P_FUNCT(0))
 150 #define P_KEY_COL7      (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(1))
 151 #define P_KEY_ROW6      (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(1))
 152 #define P_KEY_COL6      (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(1))
 153 #define P_KEY_ROW5      (P_DEFINED | P_IDENT(GPIO_PE3) | P_FUNCT(1))
 154 #define P_KEY_COL5      (P_DEFINED | P_IDENT(GPIO_PE4) | P_FUNCT(1))
 155 #define P_KEY_ROW4      (P_DEFINED | P_IDENT(GPIO_PE5) | P_FUNCT(1))
 156 #define P_KEY_COL4      (P_DEFINED | P_IDENT(GPIO_PE6) | P_FUNCT(1))
 157 #define P_KEY_ROW7      (P_DEFINED | P_IDENT(GPIO_PE7) | P_FUNCT(1))
 158
 159 #define P_PPI0_D0       (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(0))
 160 #define P_PPI0_D1       (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(0))
 161 #define P_PPI0_D2       (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(0))
 162 #define P_PPI0_D3       (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(0))
 163 #define P_PPI0_D4       (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(0))
 164 #define P_PPI0_D5       (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(0))
 165 #define P_PPI0_D6       (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(0))
 166 #define P_PPI0_D7       (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(0))
 167 #define P_PPI0_D8       (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(0))
 168 #define P_PPI0_D9       (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(0))
 169 #define P_PPI0_D10      (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(0))
 170 #define P_PPI0_D11      (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(0))
 171 #define P_PPI0_D12      (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(0))
 172 #define P_PPI0_D13      (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0))
 173 #define P_PPI0_D14      (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0))
 174 #define P_PPI0_D15      (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0))
 175
 176 #ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT
 177 # define P_ATAPI_D0A    (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1))
 178 # define P_ATAPI_D1A    (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1))
 179 # define P_ATAPI_D2A    (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1))
 180 # define P_ATAPI_D3A    (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1))
 181 # define P_ATAPI_D4A    (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1))
 182 # define P_ATAPI_D5A    (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1))
 183 # define P_ATAPI_D6A    (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1))
 184 # define P_ATAPI_D7A    (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1))
 185 # define P_ATAPI_D8A    (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1))
 186 # define P_ATAPI_D9A    (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1))
 187 # define P_ATAPI_D10A   (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(1))
 188 # define P_ATAPI_D11A   (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(1))
 189 # define P_ATAPI_D12A   (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(1))
 190 # define P_ATAPI_D13A   (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(1))
 191 # define P_ATAPI_D14A   (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1))
 192 # define P_ATAPI_D15A   (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1))
 193 #else
 194 # define P_ATAPI_D0A    (P_DONTCARE)
 195 # define P_ATAPI_D1A    (P_DONTCARE)
 196 # define P_ATAPI_D2A    (P_DONTCARE)
 197 # define P_ATAPI_D3A    (P_DONTCARE)
 198 # define P_ATAPI_D4A    (P_DONTCARE)
 199 # define P_ATAPI_D5A    (P_DONTCARE)
 200 # define P_ATAPI_D6A    (P_DONTCARE)
 201 # define P_ATAPI_D7A    (P_DONTCARE)
 202 # define P_ATAPI_D8A    (P_DONTCARE)
 203 # define P_ATAPI_D9A    (P_DONTCARE)
 204 # define P_ATAPI_D10A   (P_DONTCARE)
 205 # define P_ATAPI_D11A   (P_DONTCARE)
 206 # define P_ATAPI_D12A   (P_DONTCARE)
 207 # define P_ATAPI_D13A   (P_DONTCARE)
 208 # define P_ATAPI_D14A   (P_DONTCARE)
 209 # define P_ATAPI_D15A   (P_DONTCARE)
 210 #endif
 211
 212 #define P_PPI0_CLK      (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0))
 213 #define P_PPI0_FS1      (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0))
 214 #define P_PPI0_FS2      (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(0))
 215 #define P_PPI0_D16      (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0))
 216 #define P_PPI0_D17      (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))
 217 #define P_SPI1_SSEL1    (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(0))
 218 #define P_SPI1_SSEL2    (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(0))
 219 #define P_SPI1_SSEL3    (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(0))
 220 #define P_SPI1_SCK      (P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(0))
 221 #define P_SPI1_MISO     (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(0))
 222 #define P_SPI1_MOSI     (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(0))
 223 #define P_SPI1_SS       (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(0))
 224 #define P_CAN0_TX       (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(0))
 225 #define P_CAN0_RX       (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0))
 226 #define P_CAN1_TX       (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0))
 227 #define P_CAN1_RX       (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0))
 228 #ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT
 229 # define P_ATAPI_A0A    (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(1))
 230 # define P_ATAPI_A1A    (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1))
 231 # define P_ATAPI_A2A    (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(1))
 232 #else
 233 # define P_ATAPI_A0A    (P_DONTCARE)
 234 # define P_ATAPI_A1A    (P_DONTCARE)
 235 # define P_ATAPI_A2A    (P_DONTCARE)
 236 #endif
 237 #define P_HOST_CE       (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(1))
 238 #define P_HOST_RD       (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1))
 239 #define P_HOST_WR       (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1))
 240 #define P_MTXONB        (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(1))
 241 #define P_PPI2_FS2      (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(2))
 242 #define P_PPI2_FS1      (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(2))
 243 #define P_PPI2_CLK      (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(2))
 244 #define P_CNT_CZM       (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(3))
 245
 246 #define P_UART1_TX      (P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(0))
 247 #define P_UART1_RX      (P_DEFINED | P_IDENT(GPIO_PH1) | P_FUNCT(0))
 248 #define P_ATAPI_RESET   (P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(0))
 249 #define P_HOST_ADDR     (P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(0))
 250 #define P_HOST_ACK      (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(0))
 251 #define P_MTX   (P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(0))
 252 #define P_MRX   (P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(0))
 253 #define P_MRXONB        (P_DEFINED | P_IDENT(GPIO_PH7) | P_FUNCT(0))
 254 #define P_A4    (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH8) | P_FUNCT(0))
 255 #define P_A5    (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH9) | P_FUNCT(0))
 256 #define P_A6    (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH10) | P_FUNCT(0))
 257 #define P_A7    (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH11) | P_FUNCT(0))
 258 #define P_A8    (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH12) | P_FUNCT(0))
 259 #define P_A9    (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH13) | P_FUNCT(0))
 260 #define P_PPI1_FS3      (P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(1))
 261 #define P_PPI2_FS3      (P_DEFINED | P_IDENT(GPIO_PH1) | P_FUNCT(1))
 262 #define P_TMR8  (P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(1))
 263 #define P_TMR9  (P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(1))
 264 #define P_TMR10 (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(1))
 265 #define P_DMAR0 (P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(1))
 266 #define P_DMAR1 (P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(1))
 267 #define P_PPI0_FS3      (P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(2))
 268 #define P_CNT_CDG       (P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(2))
 269 #define P_CNT_CUD       (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(2))
 270
 271 #define P_A10   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI0) | P_FUNCT(0))
 272 #define P_A11   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI1) | P_FUNCT(0))
 273 #define P_A12   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI2) | P_FUNCT(0))
 274 #define P_A13   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI3) | P_FUNCT(0))
 275 #define P_A14   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI4) | P_FUNCT(0))
 276 #define P_A15   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI5) | P_FUNCT(0))
 277 #define P_A16   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI6) | P_FUNCT(0))
 278 #define P_A17   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI7) | P_FUNCT(0))
 279 #define P_A18   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI8) | P_FUNCT(0))
 280 #define P_A19   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI9) | P_FUNCT(0))
 281 #define P_A20   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI10) | P_FUNCT(0))
 282 #define P_A21   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI11) | P_FUNCT(0))
 283 #define P_A22   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI12) | P_FUNCT(0))
 284 #define P_A23   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI13) | P_FUNCT(0))
 285 #define P_A24   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI14) | P_FUNCT(0))
 286 #define P_A25   (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI15) | P_FUNCT(0))
 287 #define P_NOR_CLK       (P_DEFINED | P_IDENT(GPIO_PI15) | P_FUNCT(1))
 288
 289 #define P_AMC_ARDY_NOR_WAIT     (P_DEFINED | P_IDENT(GPIO_PJ0) | P_FUNCT(0))
 290 #define P_NAND_CE       (P_DEFINED | P_IDENT(GPIO_PJ1) | P_FUNCT(0))
 291 #define P_NAND_RB       (P_DEFINED | P_IDENT(GPIO_PJ2) | P_FUNCT(0))
 292 #define P_ATAPI_DIOR    (P_DEFINED | P_IDENT(GPIO_PJ3) | P_FUNCT(0))
 293 #define P_ATAPI_DIOW    (P_DEFINED | P_IDENT(GPIO_PJ4) | P_FUNCT(0))
 294 #define P_ATAPI_CS0     (P_DEFINED | P_IDENT(GPIO_PJ5) | P_FUNCT(0))
 295 #define P_ATAPI_CS1     (P_DEFINED | P_IDENT(GPIO_PJ6) | P_FUNCT(0))
 296 #define P_ATAPI_DMACK   (P_DEFINED | P_IDENT(GPIO_PJ7) | P_FUNCT(0))
 297 #define P_ATAPI_DMARQ   (P_DEFINED | P_IDENT(GPIO_PJ8) | P_FUNCT(0))
 298 #define P_ATAPI_INTRQ   (P_DEFINED | P_IDENT(GPIO_PJ9) | P_FUNCT(0))
 299 #define P_ATAPI_IORDY   (P_DEFINED | P_IDENT(GPIO_PJ10) | P_FUNCT(0))
 300 #define P_AMC_BR        (P_DEFINED | P_IDENT(GPIO_PJ11) | P_FUNCT(0))
 301 #define P_AMC_BG        (P_DEFINED | P_IDENT(GPIO_PJ12) | P_FUNCT(0))
 302 #define P_AMC_BGH       (P_DEFINED | P_IDENT(GPIO_PJ13) | P_FUNCT(0))
 303
 304
 305 #define P_NAND_D0       (P_DONTCARE)
 306 #define P_NAND_D1       (P_DONTCARE)
 307 #define P_NAND_D2       (P_DONTCARE)
 308 #define P_NAND_D3       (P_DONTCARE)
 309 #define P_NAND_D4       (P_DONTCARE)
 310 #define P_NAND_D5       (P_DONTCARE)
 311 #define P_NAND_D6       (P_DONTCARE)
 312 #define P_NAND_D7       (P_DONTCARE)
 313 #define P_NAND_WE       (P_DONTCARE)
 314 #define P_NAND_RE       (P_DONTCARE)
 315 #define P_NAND_CLE      (P_DONTCARE)
 316 #define P_NAND_ALE      (P_DONTCARE)
 317
 318 #endif /* _MACH_PORTMUX_H_ */