drivers/clk/bcm/clk-bcm281xx.c

   1 /*
   2  * Copyright (C) 2013 Broadcom Corporation
   3  * Copyright 2013 Linaro Limited
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation version 2.
   8  *
   9  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  10  * kind, whether express or implied; without even the implied warranty
  11  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include "clk-kona.h"
  16 #include "dt-bindings/clock/bcm281xx.h"
  17
  18 #define BCM281XX_CCU_COMMON(_name, _ucase_name) \
  19         KONA_CCU_COMMON(BCM281XX, _name, _ucase_name)
  20
  21 /* Root CCU */
  22
  23 static struct peri_clk_data frac_1m_data = {
  24         .gate           = HW_SW_GATE(0x214, 16, 0, 1),
  25         .trig           = TRIGGER(0x0e04, 0),
  26         .div            = FRAC_DIVIDER(0x0e00, 0, 22, 16),
  27         .clocks         = CLOCKS("ref_crystal"),
  28 };
  29
  30 static struct ccu_data root_ccu_data = {
  31         BCM281XX_CCU_COMMON(root, ROOT),
  32         .kona_clks      = {
  33                 [BCM281XX_ROOT_CCU_FRAC_1M] =
  34                         KONA_CLK(root, frac_1m, peri),
  35                 [BCM281XX_ROOT_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
  36         },
  37 };
  38
  39 /* AON CCU */
  40
  41 static struct peri_clk_data hub_timer_data = {
  42         .gate           = HW_SW_GATE(0x0414, 16, 0, 1),
  43         .clocks         = CLOCKS("bbl_32k",
  44                                  "frac_1m",
  45                                  "dft_19_5m"),
  46         .sel            = SELECTOR(0x0a10, 0, 2),
  47         .trig           = TRIGGER(0x0a40, 4),
  48 };
  49
  50 static struct peri_clk_data pmu_bsc_data = {
  51         .gate           = HW_SW_GATE(0x0418, 16, 0, 1),
  52         .clocks         = CLOCKS("ref_crystal",
  53                                  "pmu_bsc_var",
  54                                  "bbl_32k"),
  55         .sel            = SELECTOR(0x0a04, 0, 2),
  56         .div            = DIVIDER(0x0a04, 3, 4),
  57         .trig           = TRIGGER(0x0a40, 0),
  58 };
  59
  60 static struct peri_clk_data pmu_bsc_var_data = {
  61         .clocks         = CLOCKS("var_312m",
  62                                  "ref_312m"),
  63         .sel            = SELECTOR(0x0a00, 0, 2),
  64         .div            = DIVIDER(0x0a00, 4, 5),
  65         .trig           = TRIGGER(0x0a40, 2),
  66 };
  67
  68 static struct ccu_data aon_ccu_data = {
  69         BCM281XX_CCU_COMMON(aon, AON),
  70         .kona_clks      = {
  71                 [BCM281XX_AON_CCU_HUB_TIMER] =
  72                         KONA_CLK(aon, hub_timer, peri),
  73                 [BCM281XX_AON_CCU_PMU_BSC] =
  74                         KONA_CLK(aon, pmu_bsc, peri),
  75                 [BCM281XX_AON_CCU_PMU_BSC_VAR] =
  76                         KONA_CLK(aon, pmu_bsc_var, peri),
  77                 [BCM281XX_AON_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
  78         },
  79 };
  80
  81 /* Hub CCU */
  82
  83 static struct peri_clk_data tmon_1m_data = {
  84         .gate           = HW_SW_GATE(0x04a4, 18, 2, 3),
  85         .clocks         = CLOCKS("ref_crystal",
  86                                  "frac_1m"),
  87         .sel            = SELECTOR(0x0e74, 0, 2),
  88         .trig           = TRIGGER(0x0e84, 1),
  89 };
  90
  91 static struct ccu_data hub_ccu_data = {
  92         BCM281XX_CCU_COMMON(hub, HUB),
  93         .kona_clks      = {
  94                 [BCM281XX_HUB_CCU_TMON_1M] =
  95                         KONA_CLK(hub, tmon_1m, peri),
  96                 [BCM281XX_HUB_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
  97         },
  98 };
  99
 100 /* Master CCU */
 101
 102 static struct peri_clk_data sdio1_data = {
 103         .gate           = HW_SW_GATE(0x0358, 18, 2, 3),
 104         .clocks         = CLOCKS("ref_crystal",
 105                                  "var_52m",
 106                                  "ref_52m",
 107                                  "var_96m",
 108                                  "ref_96m"),
 109         .sel            = SELECTOR(0x0a28, 0, 3),
 110         .div            = DIVIDER(0x0a28, 4, 14),
 111         .trig           = TRIGGER(0x0afc, 9),
 112 };
 113
 114 static struct peri_clk_data sdio2_data = {
 115         .gate           = HW_SW_GATE(0x035c, 18, 2, 3),
 116         .clocks         = CLOCKS("ref_crystal",
 117                                  "var_52m",
 118                                  "ref_52m",
 119                                  "var_96m",
 120                                  "ref_96m"),
 121         .sel            = SELECTOR(0x0a2c, 0, 3),
 122         .div            = DIVIDER(0x0a2c, 4, 14),
 123         .trig           = TRIGGER(0x0afc, 10),
 124 };
 125
 126 static struct peri_clk_data sdio3_data = {
 127         .gate           = HW_SW_GATE(0x0364, 18, 2, 3),
 128         .clocks         = CLOCKS("ref_crystal",
 129                                  "var_52m",
 130                                  "ref_52m",
 131                                  "var_96m",
 132                                  "ref_96m"),
 133         .sel            = SELECTOR(0x0a34, 0, 3),
 134         .div            = DIVIDER(0x0a34, 4, 14),
 135         .trig           = TRIGGER(0x0afc, 12),
 136 };
 137
 138 static struct peri_clk_data sdio4_data = {
 139         .gate           = HW_SW_GATE(0x0360, 18, 2, 3),
 140         .clocks         = CLOCKS("ref_crystal",
 141                                  "var_52m",
 142                                  "ref_52m",
 143                                  "var_96m",
 144                                  "ref_96m"),
 145         .sel            = SELECTOR(0x0a30, 0, 3),
 146         .div            = DIVIDER(0x0a30, 4, 14),
 147         .trig           = TRIGGER(0x0afc, 11),
 148 };
 149
 150 static struct peri_clk_data usb_ic_data = {
 151         .gate           = HW_SW_GATE(0x0354, 18, 2, 3),
 152         .clocks         = CLOCKS("ref_crystal",
 153                                  "var_96m",
 154                                  "ref_96m"),
 155         .div            = FIXED_DIVIDER(2),
 156         .sel            = SELECTOR(0x0a24, 0, 2),
 157         .trig           = TRIGGER(0x0afc, 7),
 158 };
 159
 160 /* also called usbh_48m */
 161 static struct peri_clk_data hsic2_48m_data = {
 162         .gate           = HW_SW_GATE(0x0370, 18, 2, 3),
 163         .clocks         = CLOCKS("ref_crystal",
 164                                  "var_96m",
 165                                  "ref_96m"),
 166         .sel            = SELECTOR(0x0a38, 0, 2),
 167         .div            = FIXED_DIVIDER(2),
 168         .trig           = TRIGGER(0x0afc, 5),
 169 };
 170
 171 /* also called usbh_12m */
 172 static struct peri_clk_data hsic2_12m_data = {
 173         .gate           = HW_SW_GATE(0x0370, 20, 4, 5),
 174         .div            = DIVIDER(0x0a38, 12, 2),
 175         .clocks         = CLOCKS("ref_crystal",
 176                                  "var_96m",
 177                                  "ref_96m"),
 178         .pre_div        = FIXED_DIVIDER(2),
 179         .sel            = SELECTOR(0x0a38, 0, 2),
 180         .trig           = TRIGGER(0x0afc, 5),
 181 };
 182
 183 static struct ccu_data master_ccu_data = {
 184         BCM281XX_CCU_COMMON(master, MASTER),
 185         .kona_clks      = {
 186                 [BCM281XX_MASTER_CCU_SDIO1] =
 187                         KONA_CLK(master, sdio1, peri),
 188                 [BCM281XX_MASTER_CCU_SDIO2] =
 189                         KONA_CLK(master, sdio2, peri),
 190                 [BCM281XX_MASTER_CCU_SDIO3] =
 191                         KONA_CLK(master, sdio3, peri),
 192                 [BCM281XX_MASTER_CCU_SDIO4] =
 193                         KONA_CLK(master, sdio4, peri),
 194                 [BCM281XX_MASTER_CCU_USB_IC] =
 195                         KONA_CLK(master, usb_ic, peri),
 196                 [BCM281XX_MASTER_CCU_HSIC2_48M] =
 197                         KONA_CLK(master, hsic2_48m, peri),
 198                 [BCM281XX_MASTER_CCU_HSIC2_12M] =
 199                         KONA_CLK(master, hsic2_12m, peri),
 200                 [BCM281XX_MASTER_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
 201         },
 202 };
 203
 204 /* Slave CCU */
 205
 206 static struct peri_clk_data uartb_data = {
 207         .gate           = HW_SW_GATE(0x0400, 18, 2, 3),
 208         .clocks         = CLOCKS("ref_crystal",
 209                                  "var_156m",
 210                                  "ref_156m"),
 211         .sel            = SELECTOR(0x0a10, 0, 2),
 212         .div            = FRAC_DIVIDER(0x0a10, 4, 12, 8),
 213         .trig           = TRIGGER(0x0afc, 2),
 214 };
 215
 216 static struct peri_clk_data uartb2_data = {
 217         .gate           = HW_SW_GATE(0x0404, 18, 2, 3),
 218         .clocks         = CLOCKS("ref_crystal",
 219                                  "var_156m",
 220                                  "ref_156m"),
 221         .sel            = SELECTOR(0x0a14, 0, 2),
 222         .div            = FRAC_DIVIDER(0x0a14, 4, 12, 8),
 223         .trig           = TRIGGER(0x0afc, 3),
 224 };
 225
 226 static struct peri_clk_data uartb3_data = {
 227         .gate           = HW_SW_GATE(0x0408, 18, 2, 3),
 228         .clocks         = CLOCKS("ref_crystal",
 229                                  "var_156m",
 230                                  "ref_156m"),
 231         .sel            = SELECTOR(0x0a18, 0, 2),
 232         .div            = FRAC_DIVIDER(0x0a18, 4, 12, 8),
 233         .trig           = TRIGGER(0x0afc, 4),
 234 };
 235
 236 static struct peri_clk_data uartb4_data = {
 237         .gate           = HW_SW_GATE(0x0408, 18, 2, 3),
 238         .clocks         = CLOCKS("ref_crystal",
 239                                  "var_156m",
 240                                  "ref_156m"),
 241         .sel            = SELECTOR(0x0a1c, 0, 2),
 242         .div            = FRAC_DIVIDER(0x0a1c, 4, 12, 8),
 243         .trig           = TRIGGER(0x0afc, 5),
 244 };
 245
 246 static struct peri_clk_data ssp0_data = {
 247         .gate           = HW_SW_GATE(0x0410, 18, 2, 3),
 248         .clocks         = CLOCKS("ref_crystal",
 249                                  "var_104m",
 250                                  "ref_104m",
 251                                  "var_96m",
 252                                  "ref_96m"),
 253         .sel            = SELECTOR(0x0a20, 0, 3),
 254         .div            = DIVIDER(0x0a20, 4, 14),
 255         .trig           = TRIGGER(0x0afc, 6),
 256 };
 257
 258 static struct peri_clk_data ssp2_data = {
 259         .gate           = HW_SW_GATE(0x0418, 18, 2, 3),
 260         .clocks         = CLOCKS("ref_crystal",
 261                                  "var_104m",
 262                                  "ref_104m",
 263                                  "var_96m",
 264                                  "ref_96m"),
 265         .sel            = SELECTOR(0x0a28, 0, 3),
 266         .div            = DIVIDER(0x0a28, 4, 14),
 267         .trig           = TRIGGER(0x0afc, 8),
 268 };
 269
 270 static struct peri_clk_data bsc1_data = {
 271         .gate           = HW_SW_GATE(0x0458, 18, 2, 3),
 272         .clocks         = CLOCKS("ref_crystal",
 273                                  "var_104m",
 274                                  "ref_104m",
 275                                  "var_13m",
 276                                  "ref_13m"),
 277         .sel            = SELECTOR(0x0a64, 0, 3),
 278         .trig           = TRIGGER(0x0afc, 23),
 279 };
 280
 281 static struct peri_clk_data bsc2_data = {
 282         .gate           = HW_SW_GATE(0x045c, 18, 2, 3),
 283         .clocks = CLOCKS("ref_crystal",
 284                                  "var_104m",
 285                                  "ref_104m",
 286                                  "var_13m",
 287                                  "ref_13m"),
 288         .sel            = SELECTOR(0x0a68, 0, 3),
 289         .trig           = TRIGGER(0x0afc, 24),
 290 };
 291
 292 static struct peri_clk_data bsc3_data = {
 293         .gate           = HW_SW_GATE(0x0484, 18, 2, 3),
 294         .clocks         = CLOCKS("ref_crystal",
 295                                  "var_104m",
 296                                  "ref_104m",
 297                                  "var_13m",
 298                                  "ref_13m"),
 299         .sel            = SELECTOR(0x0a84, 0, 3),
 300         .trig           = TRIGGER(0x0b00, 2),
 301 };
 302
 303 static struct peri_clk_data pwm_data = {
 304         .gate           = HW_SW_GATE(0x0468, 18, 2, 3),
 305         .clocks         = CLOCKS("ref_crystal",
 306                                  "var_104m"),
 307         .sel            = SELECTOR(0x0a70, 0, 2),
 308         .div            = DIVIDER(0x0a70, 4, 3),
 309         .trig           = TRIGGER(0x0afc, 15),
 310 };
 311
 312 static struct ccu_data slave_ccu_data = {
 313         BCM281XX_CCU_COMMON(slave, SLAVE),
 314         .kona_clks      = {
 315                 [BCM281XX_SLAVE_CCU_UARTB] =
 316                         KONA_CLK(slave, uartb, peri),
 317                 [BCM281XX_SLAVE_CCU_UARTB2] =
 318                         KONA_CLK(slave, uartb2, peri),
 319                 [BCM281XX_SLAVE_CCU_UARTB3] =
 320                         KONA_CLK(slave, uartb3, peri),
 321                 [BCM281XX_SLAVE_CCU_UARTB4] =
 322                         KONA_CLK(slave, uartb4, peri),
 323                 [BCM281XX_SLAVE_CCU_SSP0] =
 324                         KONA_CLK(slave, ssp0, peri),
 325                 [BCM281XX_SLAVE_CCU_SSP2] =
 326                         KONA_CLK(slave, ssp2, peri),
 327                 [BCM281XX_SLAVE_CCU_BSC1] =
 328                         KONA_CLK(slave, bsc1, peri),
 329                 [BCM281XX_SLAVE_CCU_BSC2] =
 330                         KONA_CLK(slave, bsc2, peri),
 331                 [BCM281XX_SLAVE_CCU_BSC3] =
 332                         KONA_CLK(slave, bsc3, peri),
 333                 [BCM281XX_SLAVE_CCU_PWM] =
 334                         KONA_CLK(slave, pwm, peri),
 335                 [BCM281XX_SLAVE_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
 336         },
 337 };
 338
 339 /* Device tree match table callback functions */
 340
 341 static void __init kona_dt_root_ccu_setup(struct device_node *node)
 342 {
 343         kona_dt_ccu_setup(&root_ccu_data, node);
 344 }
 345
 346 static void __init kona_dt_aon_ccu_setup(struct device_node *node)
 347 {
 348         kona_dt_ccu_setup(&aon_ccu_data, node);
 349 }
 350
 351 static void __init kona_dt_hub_ccu_setup(struct device_node *node)
 352 {
 353         kona_dt_ccu_setup(&hub_ccu_data, node);
 354 }
 355
 356 static void __init kona_dt_master_ccu_setup(struct device_node *node)
 357 {
 358         kona_dt_ccu_setup(&master_ccu_data, node);
 359 }
 360
 361 static void __init kona_dt_slave_ccu_setup(struct device_node *node)
 362 {
 363         kona_dt_ccu_setup(&slave_ccu_data, node);
 364 }
 365
 366 CLK_OF_DECLARE(bcm281xx_root_ccu, BCM281XX_DT_ROOT_CCU_COMPAT,
 367                         kona_dt_root_ccu_setup);
 368 CLK_OF_DECLARE(bcm281xx_aon_ccu, BCM281XX_DT_AON_CCU_COMPAT,
 369                         kona_dt_aon_ccu_setup);
 370 CLK_OF_DECLARE(bcm281xx_hub_ccu, BCM281XX_DT_HUB_CCU_COMPAT,
 371                         kona_dt_hub_ccu_setup);
 372 CLK_OF_DECLARE(bcm281xx_master_ccu, BCM281XX_DT_MASTER_CCU_COMPAT,
 373                         kona_dt_master_ccu_setup);
 374 CLK_OF_DECLARE(bcm281xx_slave_ccu, BCM281XX_DT_SLAVE_CCU_COMPAT,
 375                         kona_dt_slave_ccu_setup);