8 select IRQ_DOMAIN_HIERARCHY
9 select MULTI_IRQ_HANDLER
13 default 2 if ARCH_REALVIEW
19 depends on PCI && PCI_MSI
20 select PCI_MSI_IRQ_DOMAIN
28 select MULTI_IRQ_HANDLER
29 select IRQ_DOMAIN_HIERARCHY
30 select PARTITION_PERCPU
34 select PCI_MSI_IRQ_DOMAIN
39 select IRQ_DOMAIN_HIERARCHY
40 select GENERIC_IRQ_CHIP
45 select MULTI_IRQ_HANDLER
49 default 4 if ARCH_S5PV210
53 The maximum number of VICs available in the system, for
56 config ARMADA_370_XP_IRQ
58 select GENERIC_IRQ_CHIP
59 select PCI_MSI_IRQ_DOMAIN if PCI_MSI
63 depends on PCI && PCI_MSI
64 select GENERIC_IRQ_CHIP
65 select PCI_MSI_IRQ_DOMAIN
69 select GENERIC_IRQ_CHIP
71 select MULTI_IRQ_HANDLER
76 select GENERIC_IRQ_CHIP
78 select MULTI_IRQ_HANDLER
87 select GENERIC_IRQ_CHIP
92 select GENERIC_IRQ_CHIP
97 select GENERIC_IRQ_CHIP
100 config BRCMSTB_L2_IRQ
102 select GENERIC_IRQ_CHIP
107 select GENERIC_IRQ_CHIP
110 config HISILICON_IRQ_MBIGEN
113 select ARM_GIC_V3_ITS
114 select GENERIC_MSI_IRQ_DOMAIN
118 select GENERIC_IRQ_CHIP
123 select GENERIC_IRQ_CHIP
126 config CLPS711X_IRQCHIP
128 depends on ARCH_CLPS711X
130 select MULTI_IRQ_HANDLER
140 select GENERIC_IRQ_CHIP
146 select MULTI_IRQ_HANDLER
150 select GENERIC_IRQ_CHIP
153 config RENESAS_INTC_IRQPIN
159 select GENERIC_IRQ_CHIP
167 Enables SysCfg Controlled IRQs on STi based platforms.
172 select GENERIC_IRQ_CHIP
177 select GENERIC_IRQ_CHIP
180 tristate "TS-4800 IRQ controller"
183 depends on SOC_IMX51 || COMPILE_TEST
185 Support for the TS-4800 FPGA IRQ controller
187 config VERSATILE_FPGA_IRQ
191 config VERSATILE_FPGA_IRQ_NR
194 depends on VERSATILE_FPGA_IRQ
203 Support for a CROSSBAR ip that precedes the main interrupt controller.
204 The primary irqchip invokes the crossbar's callback which inturn allocates
205 a free irq and configures the IP. Thus the peripheral interrupts are
206 routed to one of the free irqchip interrupt lines.
209 tristate "Keystone 2 IRQ controller IP"
210 depends on ARCH_KEYSTONE
212 Support for Texas Instruments Keystone 2 IRQ controller IP which
213 is part of the Keystone 2 IPC mechanism
217 select GENERIC_IRQ_IPI
218 select IRQ_DOMAIN_HIERARCHY
223 depends on MACH_INGENIC
226 config RENESAS_H8300H_INTC
230 config RENESAS_H8S_INTC
238 Enables the wakeup IRQs for IMX platforms with GPCv2 block
241 def_bool y if MACH_ASM9260 || ARCH_MXS
247 select GENERIC_MSI_IRQ_DOMAIN
250 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
251 depends on PCI && PCI_MSI
252 select PCI_MSI_IRQ_DOMAIN
254 config PARTITION_PERCPU
258 bool "NPS400 Global Interrupt Manager (GIM)"
259 depends on ARC || (COMPILE_TEST && !64BIT)
262 Support the EZchip NPS400 global interrupt controller