drivers/pci/pci.h

   1 #ifndef DRIVERS_PCI_H
   2 #define DRIVERS_PCI_H
   3
   4 #define PCI_CFG_SPACE_SIZE      256
   5 #define PCI_CFG_SPACE_EXP_SIZE  4096
   6
   7 #define PCI_FIND_CAP_TTL        48
   8
   9 extern const unsigned char pcie_link_speed[];
  10
  11 bool pcie_cap_has_lnkctl(const struct pci_dev *dev);
  12
  13 /* Functions internal to the PCI core code */
  14
  15 int pci_create_sysfs_dev_files(struct pci_dev *pdev);
  16 void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
  17 #if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
  18 static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
  19 { return; }
  20 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
  21 { return; }
  22 #else
  23 void pci_create_firmware_label_files(struct pci_dev *pdev);
  24 void pci_remove_firmware_label_files(struct pci_dev *pdev);
  25 #endif
  26 void pci_cleanup_rom(struct pci_dev *dev);
  27 #ifdef HAVE_PCI_MMAP
  28 enum pci_mmap_api {
  29         PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
  30         PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */
  31 };
  32 int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai,
  33                   enum pci_mmap_api mmap_api);
  34 #endif
  35 int pci_probe_reset_function(struct pci_dev *dev);
  36
  37 /**
  38  * struct pci_platform_pm_ops - Firmware PM callbacks
  39  *
  40  * @is_manageable: returns 'true' if given device is power manageable by the
  41  *                 platform firmware
  42  *
  43  * @set_state: invokes the platform firmware to set the device's power state
  44  *
  45  * @choose_state: returns PCI power state of given device preferred by the
  46  *                platform; to be used during system-wide transitions from a
  47  *                sleeping state to the working state and vice versa
  48  *
  49  * @sleep_wake: enables/disables the system wake up capability of given device
  50  *
  51  * @run_wake: enables/disables the platform to generate run-time wake-up events
  52  *              for given device (the device's wake-up capability has to be
  53  *              enabled by @sleep_wake for this feature to work)
  54  *
  55  * @need_resume: returns 'true' if the given device (which is currently
  56  *              suspended) needs to be resumed to be configured for system
  57  *              wakeup.
  58  *
  59  * If given platform is generally capable of power managing PCI devices, all of
  60  * these callbacks are mandatory.
  61  */
  62 struct pci_platform_pm_ops {
  63         bool (*is_manageable)(struct pci_dev *dev);
  64         int (*set_state)(struct pci_dev *dev, pci_power_t state);
  65         pci_power_t (*choose_state)(struct pci_dev *dev);
  66         int (*sleep_wake)(struct pci_dev *dev, bool enable);
  67         int (*run_wake)(struct pci_dev *dev, bool enable);
  68         bool (*need_resume)(struct pci_dev *dev);
  69 };
  70
  71 int pci_set_platform_pm(const struct pci_platform_pm_ops *ops);
  72 void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
  73 void pci_power_up(struct pci_dev *dev);
  74 void pci_disable_enabled_device(struct pci_dev *dev);
  75 int pci_finish_runtime_suspend(struct pci_dev *dev);
  76 int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
  77 bool pci_dev_keep_suspended(struct pci_dev *dev);
  78 void pci_dev_complete_resume(struct pci_dev *pci_dev);
  79 void pci_config_pm_runtime_get(struct pci_dev *dev);
  80 void pci_config_pm_runtime_put(struct pci_dev *dev);
  81 void pci_pm_init(struct pci_dev *dev);
  82 void pci_ea_init(struct pci_dev *dev);
  83 void pci_allocate_cap_save_buffers(struct pci_dev *dev);
  84 void pci_free_cap_save_buffers(struct pci_dev *dev);
  85
  86 static inline void pci_wakeup_event(struct pci_dev *dev)
  87 {
  88         /* Wait 100 ms before the system can be put into a sleep state. */
  89         pm_wakeup_event(&dev->dev, 100);
  90 }
  91
  92 static inline bool pci_has_subordinate(struct pci_dev *pci_dev)
  93 {
  94         return !!(pci_dev->subordinate);
  95 }
  96
  97 struct pci_vpd_ops {
  98         ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
  99         ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
 100         int (*set_size)(struct pci_dev *dev, size_t len);
 101 };
 102
 103 struct pci_vpd {
 104         const struct pci_vpd_ops *ops;
 105         struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
 106         struct mutex    lock;
 107         unsigned int    len;
 108         u16             flag;
 109         u8              cap;
 110         u8              busy:1;
 111         u8              valid:1;
 112 };
 113
 114 int pci_vpd_init(struct pci_dev *dev);
 115 void pci_vpd_release(struct pci_dev *dev);
 116
 117 /* PCI /proc functions */
 118 #ifdef CONFIG_PROC_FS
 119 int pci_proc_attach_device(struct pci_dev *dev);
 120 int pci_proc_detach_device(struct pci_dev *dev);
 121 int pci_proc_detach_bus(struct pci_bus *bus);
 122 #else
 123 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
 124 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
 125 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
 126 #endif
 127
 128 /* Functions for PCI Hotplug drivers to use */
 129 int pci_hp_add_bridge(struct pci_dev *dev);
 130
 131 #ifdef HAVE_PCI_LEGACY
 132 void pci_create_legacy_files(struct pci_bus *bus);
 133 void pci_remove_legacy_files(struct pci_bus *bus);
 134 #else
 135 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
 136 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
 137 #endif
 138
 139 /* Lock for read/write access to pci device and bus lists */
 140 extern struct rw_semaphore pci_bus_sem;
 141
 142 extern raw_spinlock_t pci_lock;
 143
 144 extern unsigned int pci_pm_d3_delay;
 145
 146 #ifdef CONFIG_PCI_MSI
 147 void pci_no_msi(void);
 148 #else
 149 static inline void pci_no_msi(void) { }
 150 #endif
 151
 152 static inline void pci_msi_set_enable(struct pci_dev *dev, int enable)
 153 {
 154         u16 control;
 155
 156         pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
 157         control &= ~PCI_MSI_FLAGS_ENABLE;
 158         if (enable)
 159                 control |= PCI_MSI_FLAGS_ENABLE;
 160         pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
 161 }
 162
 163 static inline void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set)
 164 {
 165         u16 ctrl;
 166
 167         pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
 168         ctrl &= ~clear;
 169         ctrl |= set;
 170         pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl);
 171 }
 172
 173 void pci_realloc_get_opt(char *);
 174
 175 static inline int pci_no_d1d2(struct pci_dev *dev)
 176 {
 177         unsigned int parent_dstates = 0;
 178
 179         if (dev->bus->self)
 180                 parent_dstates = dev->bus->self->no_d1d2;
 181         return (dev->no_d1d2 || parent_dstates);
 182
 183 }
 184 extern const struct attribute_group *pci_dev_groups[];
 185 extern const struct attribute_group *pcibus_groups[];
 186 extern struct device_type pci_dev_type;
 187 extern const struct attribute_group *pci_bus_groups[];
 188
 189
 190 /**
 191  * pci_match_one_device - Tell if a PCI device structure has a matching
 192  *                        PCI device id structure
 193  * @id: single PCI device id structure to match
 194  * @dev: the PCI device structure to match against
 195  *
 196  * Returns the matching pci_device_id structure or %NULL if there is no match.
 197  */
 198 static inline const struct pci_device_id *
 199 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
 200 {
 201         if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
 202             (id->device == PCI_ANY_ID || id->device == dev->device) &&
 203             (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
 204             (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
 205             !((id->class ^ dev->class) & id->class_mask))
 206                 return id;
 207         return NULL;
 208 }
 209
 210 /* PCI slot sysfs helper code */
 211 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
 212
 213 extern struct kset *pci_slots_kset;
 214
 215 struct pci_slot_attribute {
 216         struct attribute attr;
 217         ssize_t (*show)(struct pci_slot *, char *);
 218         ssize_t (*store)(struct pci_slot *, const char *, size_t);
 219 };
 220 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
 221
 222 enum pci_bar_type {
 223         pci_bar_unknown,        /* Standard PCI BAR probe */
 224         pci_bar_io,             /* An io port BAR */
 225         pci_bar_mem32,          /* A 32-bit memory BAR */
 226         pci_bar_mem64,          /* A 64-bit memory BAR */
 227 };
 228
 229 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
 230                                 int crs_timeout);
 231 int pci_setup_device(struct pci_dev *dev);
 232 int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 233                     struct resource *res, unsigned int reg);
 234 int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type);
 235 void pci_configure_ari(struct pci_dev *dev);
 236 void __pci_bus_size_bridges(struct pci_bus *bus,
 237                         struct list_head *realloc_head);
 238 void __pci_bus_assign_resources(const struct pci_bus *bus,
 239                                 struct list_head *realloc_head,
 240                                 struct list_head *fail_head);
 241 bool pci_bus_clip_resource(struct pci_dev *dev, int idx);
 242
 243 void pci_reassigndev_resource_alignment(struct pci_dev *dev);
 244 void pci_disable_bridge_window(struct pci_dev *dev);
 245
 246 /* Single Root I/O Virtualization */
 247 struct pci_sriov {
 248         int pos;                /* capability position */
 249         int nres;               /* number of resources */
 250         u32 cap;                /* SR-IOV Capabilities */
 251         u16 ctrl;               /* SR-IOV Control */
 252         u16 total_VFs;          /* total VFs associated with the PF */
 253         u16 initial_VFs;        /* initial VFs associated with the PF */
 254         u16 num_VFs;            /* number of VFs available */
 255         u16 offset;             /* first VF Routing ID offset */
 256         u16 stride;             /* following VF stride */
 257         u32 pgsz;               /* page size for BAR alignment */
 258         u8 link;                /* Function Dependency Link */
 259         u8 max_VF_buses;        /* max buses consumed by VFs */
 260         u16 driver_max_VFs;     /* max num VFs driver supports */
 261         struct pci_dev *dev;    /* lowest numbered PF */
 262         struct pci_dev *self;   /* this PF */
 263         struct mutex lock;      /* lock for VF bus */
 264         resource_size_t barsz[PCI_SRIOV_NUM_BARS];      /* VF BAR size */
 265 };
 266
 267 #ifdef CONFIG_PCI_ATS
 268 void pci_restore_ats_state(struct pci_dev *dev);
 269 #else
 270 static inline void pci_restore_ats_state(struct pci_dev *dev)
 271 {
 272 }
 273 #endif /* CONFIG_PCI_ATS */
 274
 275 #ifdef CONFIG_PCI_IOV
 276 int pci_iov_init(struct pci_dev *dev);
 277 void pci_iov_release(struct pci_dev *dev);
 278 int pci_iov_resource_bar(struct pci_dev *dev, int resno);
 279 resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
 280 void pci_restore_iov_state(struct pci_dev *dev);
 281 int pci_iov_bus_range(struct pci_bus *bus);
 282
 283 #else
 284 static inline int pci_iov_init(struct pci_dev *dev)
 285 {
 286         return -ENODEV;
 287 }
 288 static inline void pci_iov_release(struct pci_dev *dev)
 289
 290 {
 291 }
 292 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno)
 293 {
 294         return 0;
 295 }
 296 static inline void pci_restore_iov_state(struct pci_dev *dev)
 297 {
 298 }
 299 static inline int pci_iov_bus_range(struct pci_bus *bus)
 300 {
 301         return 0;
 302 }
 303
 304 #endif /* CONFIG_PCI_IOV */
 305
 306 unsigned long pci_cardbus_resource_alignment(struct resource *);
 307
 308 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
 309                                                      struct resource *res)
 310 {
 311 #ifdef CONFIG_PCI_IOV
 312         int resno = res - dev->resource;
 313
 314         if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
 315                 return pci_sriov_resource_alignment(dev, resno);
 316 #endif
 317         if (dev->class >> 8  == PCI_CLASS_BRIDGE_CARDBUS)
 318                 return pci_cardbus_resource_alignment(res);
 319         return resource_alignment(res);
 320 }
 321
 322 void pci_enable_acs(struct pci_dev *dev);
 323
 324 struct pci_dev_reset_methods {
 325         u16 vendor;
 326         u16 device;
 327         int (*reset)(struct pci_dev *dev, int probe);
 328 };
 329
 330 #ifdef CONFIG_PCI_QUIRKS
 331 int pci_dev_specific_reset(struct pci_dev *dev, int probe);
 332 #else
 333 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
 334 {
 335         return -ENOTTY;
 336 }
 337 #endif
 338
 339 #endif /* DRIVERS_PCI_H */