APIC routing fix
[linux/fpc-iii.git] / include / asm-x86 / mpspec.h
blob4c7558731a3c73e0c6f04ad5f5c29ae15ae0b8b6
1 #ifndef _AM_X86_MPSPEC_H
2 #define _AM_X86_MPSPEC_H
4 #include <linux/init.h>
6 #include <asm/mpspec_def.h>
8 #ifdef CONFIG_X86_32
9 #include <mach_mpspec.h>
11 extern unsigned int def_to_bigsmp;
12 extern int apic_version[MAX_APICS];
13 extern u8 apicid_2_node[];
14 extern int pic_mode;
16 #define MAX_APICID 256
18 #else
20 #define MAX_MP_BUSSES 256
21 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
22 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
24 extern void early_find_smp_config(void);
25 extern void early_get_smp_config(void);
27 #endif
29 #if defined(CONFIG_MCA) || defined(CONFIG_EISA)
30 extern int mp_bus_id_to_type[MAX_MP_BUSSES];
31 #endif
33 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
35 extern int mp_bus_id_to_pci_bus[MAX_MP_BUSSES];
37 extern unsigned int boot_cpu_physical_apicid;
38 extern unsigned int max_physical_apicid;
39 extern int smp_found_config;
40 extern int mpc_default_type;
41 extern unsigned long mp_lapic_addr;
43 extern void find_smp_config(void);
44 extern void get_smp_config(void);
46 void __cpuinit generic_processor_info(int apicid, int version);
47 #ifdef CONFIG_ACPI
48 extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
49 extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
50 u32 gsi);
51 extern void mp_config_acpi_legacy_irqs(void);
52 extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low);
53 #endif /* CONFIG_ACPI */
55 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
57 struct physid_mask {
58 unsigned long mask[PHYSID_ARRAY_SIZE];
61 typedef struct physid_mask physid_mask_t;
63 #define physid_set(physid, map) set_bit(physid, (map).mask)
64 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
65 #define physid_isset(physid, map) test_bit(physid, (map).mask)
66 #define physid_test_and_set(physid, map) \
67 test_and_set_bit(physid, (map).mask)
69 #define physids_and(dst, src1, src2) \
70 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
72 #define physids_or(dst, src1, src2) \
73 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
75 #define physids_clear(map) \
76 bitmap_zero((map).mask, MAX_APICS)
78 #define physids_complement(dst, src) \
79 bitmap_complement((dst).mask, (src).mask, MAX_APICS)
81 #define physids_empty(map) \
82 bitmap_empty((map).mask, MAX_APICS)
84 #define physids_equal(map1, map2) \
85 bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
87 #define physids_weight(map) \
88 bitmap_weight((map).mask, MAX_APICS)
90 #define physids_shift_right(d, s, n) \
91 bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
93 #define physids_shift_left(d, s, n) \
94 bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
96 #define physids_coerce(map) ((map).mask[0])
98 #define physids_promote(physids) \
99 ({ \
100 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
101 __physid_mask.mask[0] = physids; \
102 __physid_mask; \
105 #define physid_mask_of_physid(physid) \
106 ({ \
107 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
108 physid_set(physid, __physid_mask); \
109 __physid_mask; \
112 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
113 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
115 extern physid_mask_t phys_cpu_present_map;
117 #endif