drivers/rtc/rtc-msm6242.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  Oki MSM6242 RTC Driver
   4  *
   5  *  Copyright 2009 Geert Uytterhoeven
   6  *
   7  *  Based on the A2000 TOD code in arch/m68k/amiga/config.c
   8  *  Copyright (C) 1993 Hamish Macdonald
   9  */
  10
  11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/delay.h>
  14 #include <linux/io.h>
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/rtc.h>
  19 #include <linux/slab.h>
  20
  21
  22 enum {
  23         MSM6242_SECOND1         = 0x0,  /* 1-second digit register */
  24         MSM6242_SECOND10        = 0x1,  /* 10-second digit register */
  25         MSM6242_MINUTE1         = 0x2,  /* 1-minute digit register */
  26         MSM6242_MINUTE10        = 0x3,  /* 10-minute digit register */
  27         MSM6242_HOUR1           = 0x4,  /* 1-hour digit register */
  28         MSM6242_HOUR10          = 0x5,  /* PM/AM, 10-hour digit register */
  29         MSM6242_DAY1            = 0x6,  /* 1-day digit register */
  30         MSM6242_DAY10           = 0x7,  /* 10-day digit register */
  31         MSM6242_MONTH1          = 0x8,  /* 1-month digit register */
  32         MSM6242_MONTH10         = 0x9,  /* 10-month digit register */
  33         MSM6242_YEAR1           = 0xa,  /* 1-year digit register */
  34         MSM6242_YEAR10          = 0xb,  /* 10-year digit register */
  35         MSM6242_WEEK            = 0xc,  /* Week register */
  36         MSM6242_CD              = 0xd,  /* Control Register D */
  37         MSM6242_CE              = 0xe,  /* Control Register E */
  38         MSM6242_CF              = 0xf,  /* Control Register F */
  39 };
  40
  41 #define MSM6242_HOUR10_AM       (0 << 2)
  42 #define MSM6242_HOUR10_PM       (1 << 2)
  43 #define MSM6242_HOUR10_HR_MASK  (3 << 0)
  44
  45 #define MSM6242_WEEK_SUNDAY     0
  46 #define MSM6242_WEEK_MONDAY     1
  47 #define MSM6242_WEEK_TUESDAY    2
  48 #define MSM6242_WEEK_WEDNESDAY  3
  49 #define MSM6242_WEEK_THURSDAY   4
  50 #define MSM6242_WEEK_FRIDAY     5
  51 #define MSM6242_WEEK_SATURDAY   6
  52
  53 #define MSM6242_CD_30_S_ADJ     (1 << 3)        /* 30-second adjustment */
  54 #define MSM6242_CD_IRQ_FLAG     (1 << 2)
  55 #define MSM6242_CD_BUSY         (1 << 1)
  56 #define MSM6242_CD_HOLD         (1 << 0)
  57
  58 #define MSM6242_CE_T_MASK       (3 << 2)
  59 #define MSM6242_CE_T_64HZ       (0 << 2)        /* period 1/64 second */
  60 #define MSM6242_CE_T_1HZ        (1 << 2)        /* period 1 second */
  61 #define MSM6242_CE_T_1MINUTE    (2 << 2)        /* period 1 minute */
  62 #define MSM6242_CE_T_1HOUR      (3 << 2)        /* period 1 hour */
  63
  64 #define MSM6242_CE_ITRPT_STND   (1 << 1)
  65 #define MSM6242_CE_MASK         (1 << 0)        /* STD.P output control */
  66
  67 #define MSM6242_CF_TEST         (1 << 3)
  68 #define MSM6242_CF_12H          (0 << 2)
  69 #define MSM6242_CF_24H          (1 << 2)
  70 #define MSM6242_CF_STOP         (1 << 1)
  71 #define MSM6242_CF_REST         (1 << 0)        /* reset */
  72
  73
  74 struct msm6242_priv {
  75         u32 __iomem *regs;
  76         struct rtc_device *rtc;
  77 };
  78
  79 static inline unsigned int msm6242_read(struct msm6242_priv *priv,
  80                                        unsigned int reg)
  81 {
  82         return __raw_readl(&priv->regs[reg]) & 0xf;
  83 }
  84
  85 static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val,
  86                                 unsigned int reg)
  87 {
  88         __raw_writel(val, &priv->regs[reg]);
  89 }
  90
  91 static inline void msm6242_set(struct msm6242_priv *priv, unsigned int val,
  92                                unsigned int reg)
  93 {
  94         msm6242_write(priv, msm6242_read(priv, reg) | val, reg);
  95 }
  96
  97 static inline void msm6242_clear(struct msm6242_priv *priv, unsigned int val,
  98                                  unsigned int reg)
  99 {
 100         msm6242_write(priv, msm6242_read(priv, reg) & ~val, reg);
 101 }
 102
 103 static void msm6242_lock(struct msm6242_priv *priv)
 104 {
 105         int cnt = 5;
 106
 107         msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD);
 108
 109         while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) {
 110                 msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD);
 111                 udelay(70);
 112                 msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD);
 113                 cnt--;
 114         }
 115
 116         if (!cnt)
 117                 pr_warn("timed out waiting for RTC (0x%x)\n",
 118                         msm6242_read(priv, MSM6242_CD));
 119 }
 120
 121 static void msm6242_unlock(struct msm6242_priv *priv)
 122 {
 123         msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD);
 124 }
 125
 126 static int msm6242_read_time(struct device *dev, struct rtc_time *tm)
 127 {
 128         struct msm6242_priv *priv = dev_get_drvdata(dev);
 129
 130         msm6242_lock(priv);
 131
 132         tm->tm_sec  = msm6242_read(priv, MSM6242_SECOND10) * 10 +
 133                       msm6242_read(priv, MSM6242_SECOND1);
 134         tm->tm_min  = msm6242_read(priv, MSM6242_MINUTE10) * 10 +
 135                       msm6242_read(priv, MSM6242_MINUTE1);
 136         tm->tm_hour = (msm6242_read(priv, MSM6242_HOUR10) &
 137                        MSM6242_HOUR10_HR_MASK) * 10 +
 138                       msm6242_read(priv, MSM6242_HOUR1);
 139         tm->tm_mday = msm6242_read(priv, MSM6242_DAY10) * 10 +
 140                       msm6242_read(priv, MSM6242_DAY1);
 141         tm->tm_wday = msm6242_read(priv, MSM6242_WEEK);
 142         tm->tm_mon  = msm6242_read(priv, MSM6242_MONTH10) * 10 +
 143                       msm6242_read(priv, MSM6242_MONTH1) - 1;
 144         tm->tm_year = msm6242_read(priv, MSM6242_YEAR10) * 10 +
 145                       msm6242_read(priv, MSM6242_YEAR1);
 146         if (tm->tm_year <= 69)
 147                 tm->tm_year += 100;
 148
 149         if (!(msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)) {
 150                 unsigned int pm = msm6242_read(priv, MSM6242_HOUR10) &
 151                                   MSM6242_HOUR10_PM;
 152                 if (!pm && tm->tm_hour == 12)
 153                         tm->tm_hour = 0;
 154                 else if (pm && tm->tm_hour != 12)
 155                         tm->tm_hour += 12;
 156         }
 157
 158         msm6242_unlock(priv);
 159
 160         return 0;
 161 }
 162
 163 static int msm6242_set_time(struct device *dev, struct rtc_time *tm)
 164 {
 165         struct msm6242_priv *priv = dev_get_drvdata(dev);
 166
 167         msm6242_lock(priv);
 168
 169         msm6242_write(priv, tm->tm_sec / 10, MSM6242_SECOND10);
 170         msm6242_write(priv, tm->tm_sec % 10, MSM6242_SECOND1);
 171         msm6242_write(priv, tm->tm_min / 10, MSM6242_MINUTE10);
 172         msm6242_write(priv, tm->tm_min % 10, MSM6242_MINUTE1);
 173         if (msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)
 174                 msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
 175         else if (tm->tm_hour >= 12)
 176                 msm6242_write(priv, MSM6242_HOUR10_PM + (tm->tm_hour - 12) / 10,
 177                               MSM6242_HOUR10);
 178         else
 179                 msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
 180         msm6242_write(priv, tm->tm_hour % 10, MSM6242_HOUR1);
 181         msm6242_write(priv, tm->tm_mday / 10, MSM6242_DAY10);
 182         msm6242_write(priv, tm->tm_mday % 10, MSM6242_DAY1);
 183         if (tm->tm_wday != -1)
 184                 msm6242_write(priv, tm->tm_wday, MSM6242_WEEK);
 185         msm6242_write(priv, (tm->tm_mon + 1) / 10, MSM6242_MONTH10);
 186         msm6242_write(priv, (tm->tm_mon + 1) % 10, MSM6242_MONTH1);
 187         if (tm->tm_year >= 100)
 188                 tm->tm_year -= 100;
 189         msm6242_write(priv, tm->tm_year / 10, MSM6242_YEAR10);
 190         msm6242_write(priv, tm->tm_year % 10, MSM6242_YEAR1);
 191
 192         msm6242_unlock(priv);
 193         return 0;
 194 }
 195
 196 static const struct rtc_class_ops msm6242_rtc_ops = {
 197         .read_time      = msm6242_read_time,
 198         .set_time       = msm6242_set_time,
 199 };
 200
 201 static int __init msm6242_rtc_probe(struct platform_device *pdev)
 202 {
 203         struct resource *res;
 204         struct msm6242_priv *priv;
 205         struct rtc_device *rtc;
 206
 207         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 208         if (!res)
 209                 return -ENODEV;
 210
 211         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 212         if (!priv)
 213                 return -ENOMEM;
 214
 215         priv->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
 216         if (!priv->regs)
 217                 return -ENOMEM;
 218         platform_set_drvdata(pdev, priv);
 219
 220         rtc = devm_rtc_device_register(&pdev->dev, "rtc-msm6242",
 221                                 &msm6242_rtc_ops, THIS_MODULE);
 222         if (IS_ERR(rtc))
 223                 return PTR_ERR(rtc);
 224
 225         priv->rtc = rtc;
 226         return 0;
 227 }
 228
 229 static struct platform_driver msm6242_rtc_driver = {
 230         .driver = {
 231                 .name   = "rtc-msm6242",
 232         },
 233 };
 234
 235 module_platform_driver_probe(msm6242_rtc_driver, msm6242_rtc_probe);
 236
 237 MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>");
 238 MODULE_LICENSE("GPL");
 239 MODULE_DESCRIPTION("Oki MSM6242 RTC driver");
 240 MODULE_ALIAS("platform:rtc-msm6242");