net: DCB: Validate DCB_ATTR_DCB_BUFFER argument
[linux/fpc-iii.git] / drivers / spi / spi-cavium-thunderx.c
blobfd6b9caffaf0c41ca36434a7ae90538b319560bd
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Cavium ThunderX SPI driver.
5 * Copyright (C) 2016 Cavium Inc.
6 * Authors: Jan Glauber <jglauber@cavium.com>
7 */
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/spi/spi.h>
13 #include "spi-cavium.h"
15 #define DRV_NAME "spi-thunderx"
17 #define SYS_FREQ_DEFAULT 700000000 /* 700 Mhz */
19 static int thunderx_spi_probe(struct pci_dev *pdev,
20 const struct pci_device_id *ent)
22 struct device *dev = &pdev->dev;
23 struct spi_master *master;
24 struct octeon_spi *p;
25 int ret;
27 master = spi_alloc_master(dev, sizeof(struct octeon_spi));
28 if (!master)
29 return -ENOMEM;
31 p = spi_master_get_devdata(master);
33 ret = pcim_enable_device(pdev);
34 if (ret)
35 goto error;
37 ret = pci_request_regions(pdev, DRV_NAME);
38 if (ret)
39 goto error;
41 p->register_base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
42 if (!p->register_base) {
43 ret = -EINVAL;
44 goto error;
47 p->regs.config = 0x1000;
48 p->regs.status = 0x1008;
49 p->regs.tx = 0x1010;
50 p->regs.data = 0x1080;
52 p->clk = devm_clk_get(dev, NULL);
53 if (IS_ERR(p->clk)) {
54 ret = PTR_ERR(p->clk);
55 goto error;
58 ret = clk_prepare_enable(p->clk);
59 if (ret)
60 goto error;
62 p->sys_freq = clk_get_rate(p->clk);
63 if (!p->sys_freq)
64 p->sys_freq = SYS_FREQ_DEFAULT;
65 dev_info(dev, "Set system clock to %u\n", p->sys_freq);
67 master->num_chipselect = 4;
68 master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH |
69 SPI_LSB_FIRST | SPI_3WIRE;
70 master->transfer_one_message = octeon_spi_transfer_one_message;
71 master->bits_per_word_mask = SPI_BPW_MASK(8);
72 master->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
73 master->dev.of_node = pdev->dev.of_node;
75 pci_set_drvdata(pdev, master);
77 ret = devm_spi_register_master(dev, master);
78 if (ret)
79 goto error;
81 return 0;
83 error:
84 clk_disable_unprepare(p->clk);
85 pci_release_regions(pdev);
86 spi_master_put(master);
87 return ret;
90 static void thunderx_spi_remove(struct pci_dev *pdev)
92 struct spi_master *master = pci_get_drvdata(pdev);
93 struct octeon_spi *p;
95 p = spi_master_get_devdata(master);
96 if (!p)
97 return;
99 clk_disable_unprepare(p->clk);
100 pci_release_regions(pdev);
101 /* Put everything in a known state. */
102 writeq(0, p->register_base + OCTEON_SPI_CFG(p));
105 static const struct pci_device_id thunderx_spi_pci_id_table[] = {
106 { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa00b) },
107 { 0, }
110 MODULE_DEVICE_TABLE(pci, thunderx_spi_pci_id_table);
112 static struct pci_driver thunderx_spi_driver = {
113 .name = DRV_NAME,
114 .id_table = thunderx_spi_pci_id_table,
115 .probe = thunderx_spi_probe,
116 .remove = thunderx_spi_remove,
119 module_pci_driver(thunderx_spi_driver);
121 MODULE_DESCRIPTION("Cavium, Inc. ThunderX SPI bus driver");
122 MODULE_AUTHOR("Jan Glauber");
123 MODULE_LICENSE("GPL");