1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * platform.c - DesignWare HS OTG Controller platform driver
5 * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The names of the above-listed copyright holders may not be used
17 * to endorse or promote products derived from this software without
18 * specific prior written permission.
20 * ALTERNATIVELY, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") as published by the Free Software
22 * Foundation; either version 2 of the License, or (at your option) any
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
26 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
29 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
30 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
32 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
33 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
34 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 #include <linux/kernel.h>
39 #include <linux/module.h>
40 #include <linux/slab.h>
41 #include <linux/clk.h>
42 #include <linux/device.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/of_device.h>
45 #include <linux/mutex.h>
46 #include <linux/platform_device.h>
47 #include <linux/phy/phy.h>
48 #include <linux/platform_data/s3c-hsotg.h>
49 #include <linux/reset.h>
51 #include <linux/usb/of.h>
57 static const char dwc2_driver_name
[] = "dwc2";
60 * Check the dr_mode against the module configuration and hardware
63 * The hardware, module, and dr_mode, can each be set to host, device,
64 * or otg. Check that all these values are compatible and adjust the
65 * value of dr_mode if possible.
68 * HW MOD dr_mode dr_mode
69 * ------------------------------
80 * OTG OTG any : dr_mode
82 static int dwc2_get_dr_mode(struct dwc2_hsotg
*hsotg
)
84 enum usb_dr_mode mode
;
86 hsotg
->dr_mode
= usb_get_dr_mode(hsotg
->dev
);
87 if (hsotg
->dr_mode
== USB_DR_MODE_UNKNOWN
)
88 hsotg
->dr_mode
= USB_DR_MODE_OTG
;
90 mode
= hsotg
->dr_mode
;
92 if (dwc2_hw_is_device(hsotg
)) {
93 if (IS_ENABLED(CONFIG_USB_DWC2_HOST
)) {
95 "Controller does not support host mode.\n");
98 mode
= USB_DR_MODE_PERIPHERAL
;
99 } else if (dwc2_hw_is_host(hsotg
)) {
100 if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL
)) {
102 "Controller does not support device mode.\n");
105 mode
= USB_DR_MODE_HOST
;
107 if (IS_ENABLED(CONFIG_USB_DWC2_HOST
))
108 mode
= USB_DR_MODE_HOST
;
109 else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL
))
110 mode
= USB_DR_MODE_PERIPHERAL
;
113 if (mode
!= hsotg
->dr_mode
) {
115 "Configuration mismatch. dr_mode forced to %s\n",
116 mode
== USB_DR_MODE_HOST
? "host" : "device");
118 hsotg
->dr_mode
= mode
;
124 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg
*hsotg
)
126 struct platform_device
*pdev
= to_platform_device(hsotg
->dev
);
129 ret
= regulator_bulk_enable(ARRAY_SIZE(hsotg
->supplies
),
135 ret
= clk_prepare_enable(hsotg
->clk
);
141 ret
= usb_phy_init(hsotg
->uphy
);
142 } else if (hsotg
->plat
&& hsotg
->plat
->phy_init
) {
143 ret
= hsotg
->plat
->phy_init(pdev
, hsotg
->plat
->phy_type
);
145 ret
= phy_power_on(hsotg
->phy
);
147 ret
= phy_init(hsotg
->phy
);
154 * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
155 * @hsotg: The driver state
157 * A wrapper for platform code responsible for controlling
158 * low-level USB platform resources (phy, clock, regulators)
160 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg
*hsotg
)
162 int ret
= __dwc2_lowlevel_hw_enable(hsotg
);
165 hsotg
->ll_hw_enabled
= true;
169 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg
*hsotg
)
171 struct platform_device
*pdev
= to_platform_device(hsotg
->dev
);
175 usb_phy_shutdown(hsotg
->uphy
);
176 } else if (hsotg
->plat
&& hsotg
->plat
->phy_exit
) {
177 ret
= hsotg
->plat
->phy_exit(pdev
, hsotg
->plat
->phy_type
);
179 ret
= phy_exit(hsotg
->phy
);
181 ret
= phy_power_off(hsotg
->phy
);
187 clk_disable_unprepare(hsotg
->clk
);
189 ret
= regulator_bulk_disable(ARRAY_SIZE(hsotg
->supplies
),
196 * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
197 * @hsotg: The driver state
199 * A wrapper for platform code responsible for controlling
200 * low-level USB platform resources (phy, clock, regulators)
202 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg
*hsotg
)
204 int ret
= __dwc2_lowlevel_hw_disable(hsotg
);
207 hsotg
->ll_hw_enabled
= false;
211 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg
*hsotg
)
215 hsotg
->reset
= devm_reset_control_get_optional(hsotg
->dev
, "dwc2");
216 if (IS_ERR(hsotg
->reset
)) {
217 ret
= PTR_ERR(hsotg
->reset
);
218 dev_err(hsotg
->dev
, "error getting reset control %d\n", ret
);
222 reset_control_deassert(hsotg
->reset
);
224 hsotg
->reset_ecc
= devm_reset_control_get_optional(hsotg
->dev
, "dwc2-ecc");
225 if (IS_ERR(hsotg
->reset_ecc
)) {
226 ret
= PTR_ERR(hsotg
->reset_ecc
);
227 dev_err(hsotg
->dev
, "error getting reset control for ecc %d\n", ret
);
231 reset_control_deassert(hsotg
->reset_ecc
);
234 * Attempt to find a generic PHY, then look for an old style
235 * USB PHY and then fall back to pdata
237 hsotg
->phy
= devm_phy_get(hsotg
->dev
, "usb2-phy");
238 if (IS_ERR(hsotg
->phy
)) {
239 ret
= PTR_ERR(hsotg
->phy
);
248 dev_err(hsotg
->dev
, "error getting phy %d\n", ret
);
254 hsotg
->uphy
= devm_usb_get_phy(hsotg
->dev
, USB_PHY_TYPE_USB2
);
255 if (IS_ERR(hsotg
->uphy
)) {
256 ret
= PTR_ERR(hsotg
->uphy
);
265 dev_err(hsotg
->dev
, "error getting usb phy %d\n",
272 hsotg
->plat
= dev_get_platdata(hsotg
->dev
);
275 hsotg
->clk
= devm_clk_get_optional(hsotg
->dev
, "otg");
276 if (IS_ERR(hsotg
->clk
)) {
277 dev_err(hsotg
->dev
, "cannot get otg clock\n");
278 return PTR_ERR(hsotg
->clk
);
282 for (i
= 0; i
< ARRAY_SIZE(hsotg
->supplies
); i
++)
283 hsotg
->supplies
[i
].supply
= dwc2_hsotg_supply_names
[i
];
285 ret
= devm_regulator_bulk_get(hsotg
->dev
, ARRAY_SIZE(hsotg
->supplies
),
288 dev_err(hsotg
->dev
, "failed to request supplies: %d\n", ret
);
295 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
298 * @dev: Platform device
300 * This routine is called, for example, when the rmmod command is executed. The
301 * device may or may not be electrically present. If it is present, the driver
302 * stops device processing. Any resources used on behalf of this device are
305 static int dwc2_driver_remove(struct platform_device
*dev
)
307 struct dwc2_hsotg
*hsotg
= platform_get_drvdata(dev
);
309 dwc2_debugfs_exit(hsotg
);
310 if (hsotg
->hcd_enabled
)
311 dwc2_hcd_remove(hsotg
);
312 if (hsotg
->gadget_enabled
)
313 dwc2_hsotg_remove(hsotg
);
315 if (hsotg
->ll_hw_enabled
)
316 dwc2_lowlevel_hw_disable(hsotg
);
318 reset_control_assert(hsotg
->reset
);
319 reset_control_assert(hsotg
->reset_ecc
);
325 * dwc2_driver_shutdown() - Called on device shutdown
327 * @dev: Platform device
329 * In specific conditions (involving usb hubs) dwc2 devices can create a
330 * lot of interrupts, even to the point of overwhelming devices running
331 * at low frequencies. Some devices need to do special clock handling
332 * at shutdown-time which may bring the system clock below the threshold
333 * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
334 * prevents reboots/poweroffs from getting stuck in such cases.
336 static void dwc2_driver_shutdown(struct platform_device
*dev
)
338 struct dwc2_hsotg
*hsotg
= platform_get_drvdata(dev
);
340 dwc2_disable_global_interrupts(hsotg
);
341 synchronize_irq(hsotg
->irq
);
345 * dwc2_check_core_endianness() - Returns true if core and AHB have
346 * opposite endianness.
347 * @hsotg: Programming view of the DWC_otg controller.
349 static bool dwc2_check_core_endianness(struct dwc2_hsotg
*hsotg
)
353 snpsid
= ioread32(hsotg
->regs
+ GSNPSID
);
354 if ((snpsid
& GSNPSID_ID_MASK
) == DWC2_OTG_ID
||
355 (snpsid
& GSNPSID_ID_MASK
) == DWC2_FS_IOT_ID
||
356 (snpsid
& GSNPSID_ID_MASK
) == DWC2_HS_IOT_ID
)
362 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
365 * @dev: Platform device
367 * This routine creates the driver components required to control the device
368 * (core, HCD, and PCD) and initializes the device. The driver components are
369 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
370 * in the device private data. This allows the driver to access the dwc2_hsotg
371 * structure on subsequent calls to driver methods for this device.
373 static int dwc2_driver_probe(struct platform_device
*dev
)
375 struct dwc2_hsotg
*hsotg
;
376 struct resource
*res
;
379 hsotg
= devm_kzalloc(&dev
->dev
, sizeof(*hsotg
), GFP_KERNEL
);
383 hsotg
->dev
= &dev
->dev
;
386 * Use reasonable defaults so platforms don't have to provide these.
388 if (!dev
->dev
.dma_mask
)
389 dev
->dev
.dma_mask
= &dev
->dev
.coherent_dma_mask
;
390 retval
= dma_set_coherent_mask(&dev
->dev
, DMA_BIT_MASK(32));
392 dev_err(&dev
->dev
, "can't set coherent DMA mask: %d\n", retval
);
396 res
= platform_get_resource(dev
, IORESOURCE_MEM
, 0);
397 hsotg
->regs
= devm_ioremap_resource(&dev
->dev
, res
);
398 if (IS_ERR(hsotg
->regs
))
399 return PTR_ERR(hsotg
->regs
);
401 dev_dbg(&dev
->dev
, "mapped PA %08lx to VA %p\n",
402 (unsigned long)res
->start
, hsotg
->regs
);
404 retval
= dwc2_lowlevel_hw_init(hsotg
);
408 spin_lock_init(&hsotg
->lock
);
410 hsotg
->irq
= platform_get_irq(dev
, 0);
414 dev_dbg(hsotg
->dev
, "registering common handler for irq%d\n",
416 retval
= devm_request_irq(hsotg
->dev
, hsotg
->irq
,
417 dwc2_handle_common_intr
, IRQF_SHARED
,
418 dev_name(hsotg
->dev
), hsotg
);
422 hsotg
->vbus_supply
= devm_regulator_get_optional(hsotg
->dev
, "vbus");
423 if (IS_ERR(hsotg
->vbus_supply
)) {
424 retval
= PTR_ERR(hsotg
->vbus_supply
);
425 hsotg
->vbus_supply
= NULL
;
426 if (retval
!= -ENODEV
)
430 retval
= dwc2_lowlevel_hw_enable(hsotg
);
434 hsotg
->needs_byte_swap
= dwc2_check_core_endianness(hsotg
);
436 retval
= dwc2_get_dr_mode(hsotg
);
440 hsotg
->need_phy_for_wake
=
441 of_property_read_bool(dev
->dev
.of_node
,
442 "snps,need-phy-for-wake");
445 * Reset before dwc2_get_hwparams() then it could get power-on real
446 * reset value form registers.
448 retval
= dwc2_core_reset(hsotg
, false);
452 /* Detect config values from hardware */
453 retval
= dwc2_get_hwparams(hsotg
);
458 * For OTG cores, set the force mode bits to reflect the value
459 * of dr_mode. Force mode bits should not be touched at any
460 * other time after this.
462 dwc2_force_dr_mode(hsotg
);
464 retval
= dwc2_init_params(hsotg
);
468 if (hsotg
->dr_mode
!= USB_DR_MODE_HOST
) {
469 retval
= dwc2_gadget_init(hsotg
);
472 hsotg
->gadget_enabled
= 1;
476 * If we need PHY for wakeup we must be wakeup capable.
477 * When we have a device that can wake without the PHY we
478 * can adjust this condition.
480 if (hsotg
->need_phy_for_wake
)
481 device_set_wakeup_capable(&dev
->dev
, true);
483 hsotg
->reset_phy_on_wake
=
484 of_property_read_bool(dev
->dev
.of_node
,
485 "snps,reset-phy-on-wake");
486 if (hsotg
->reset_phy_on_wake
&& !hsotg
->phy
) {
488 "Quirk reset-phy-on-wake only supports generic PHYs\n");
489 hsotg
->reset_phy_on_wake
= false;
492 if (hsotg
->dr_mode
!= USB_DR_MODE_PERIPHERAL
) {
493 retval
= dwc2_hcd_init(hsotg
);
495 if (hsotg
->gadget_enabled
)
496 dwc2_hsotg_remove(hsotg
);
499 hsotg
->hcd_enabled
= 1;
502 platform_set_drvdata(dev
, hsotg
);
503 hsotg
->hibernated
= 0;
505 dwc2_debugfs_init(hsotg
);
507 /* Gadget code manages lowlevel hw on its own */
508 if (hsotg
->dr_mode
== USB_DR_MODE_PERIPHERAL
)
509 dwc2_lowlevel_hw_disable(hsotg
);
511 #if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
512 IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
513 /* Postponed adding a new gadget to the udc class driver list */
514 if (hsotg
->gadget_enabled
) {
515 retval
= usb_add_gadget_udc(hsotg
->dev
, &hsotg
->gadget
);
517 hsotg
->gadget
.udc
= NULL
;
518 dwc2_hsotg_remove(hsotg
);
522 #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
526 if (hsotg
->dr_mode
!= USB_DR_MODE_PERIPHERAL
)
527 dwc2_lowlevel_hw_disable(hsotg
);
531 static int __maybe_unused
dwc2_suspend(struct device
*dev
)
533 struct dwc2_hsotg
*dwc2
= dev_get_drvdata(dev
);
534 bool is_device_mode
= dwc2_is_device_mode(dwc2
);
538 dwc2_hsotg_suspend(dwc2
);
540 if (dwc2
->ll_hw_enabled
&&
541 (is_device_mode
|| dwc2_host_can_poweroff_phy(dwc2
))) {
542 ret
= __dwc2_lowlevel_hw_disable(dwc2
);
543 dwc2
->phy_off_for_suspend
= true;
549 static int __maybe_unused
dwc2_resume(struct device
*dev
)
551 struct dwc2_hsotg
*dwc2
= dev_get_drvdata(dev
);
554 if (dwc2
->phy_off_for_suspend
&& dwc2
->ll_hw_enabled
) {
555 ret
= __dwc2_lowlevel_hw_enable(dwc2
);
559 dwc2
->phy_off_for_suspend
= false;
561 if (dwc2_is_device_mode(dwc2
))
562 ret
= dwc2_hsotg_resume(dwc2
);
567 static const struct dev_pm_ops dwc2_dev_pm_ops
= {
568 SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend
, dwc2_resume
)
571 static struct platform_driver dwc2_platform_driver
= {
573 .name
= dwc2_driver_name
,
574 .of_match_table
= dwc2_of_match_table
,
575 .pm
= &dwc2_dev_pm_ops
,
577 .probe
= dwc2_driver_probe
,
578 .remove
= dwc2_driver_remove
,
579 .shutdown
= dwc2_driver_shutdown
,
582 module_platform_driver(dwc2_platform_driver
);
584 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
585 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
586 MODULE_LICENSE("Dual BSD/GPL");