| blob | 9e0c98d6bdb09fc56a470b30b4416a6cc8a89834 |
1 // SPDX-License-Identifier: GPL-2.0+
2 /* Faraday FOTG210 EHCI-like driver
3 *
4 * Copyright (c) 2013 Faraday Technology Corporation
5 *
6 * Author: Yuan-Hsin Chen <yhchen@faraday-tech.com>
7 * Feng-Hsin Chiang <john453@faraday-tech.com>
8 * Po-Yu Chuang <ratbert.chuang@gmail.com>
9 *
10 * Most of code borrowed from the Linux-3.7 EHCI driver
11 */
12 #include <linux/module.h>
13 #include <linux/of.h>
14 #include <linux/device.h>
15 #include <linux/dmapool.h>
16 #include <linux/kernel.h>
17 #include <linux/delay.h>
18 #include <linux/ioport.h>
19 #include <linux/sched.h>
20 #include <linux/vmalloc.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/hrtimer.h>
24 #include <linux/list.h>
25 #include <linux/interrupt.h>
26 #include <linux/usb.h>
27 #include <linux/usb/hcd.h>
28 #include <linux/moduleparam.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include <linux/uaccess.h>
33 #include <linux/platform_device.h>
34 #include <linux/io.h>
35 #include <linux/clk.h>
37 #include <asm/byteorder.h>
38 #include <asm/irq.h>
39 #include <asm/unaligned.h>
45 #undef FOTG210_URB_TRACE
46 #define FOTG210_STATS
48 /* magic numbers that can affect system performance */
51 #define FOTG210_TUNE_RL_TT 0
53 #define FOTG210_TUNE_MULT_TT 1
55 /* Some drivers think it's safe to schedule isochronous transfers more than 256
56 * ms into the future (partly as a result of an old bug in the scheduling
57 * code). In an attempt to avoid trouble, we will use a minimum scheduling
58 * length of 512 frames instead of 256.
59 */
62 /* Initial IRQ latency: faster than hw default */
67 /* initial park setting: slower than hw default */
72 /* for link power management(LPM) feature */
77 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
81 #define fotg210_dbg(fotg210, fmt, args...) \
82 dev_dbg(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
83 #define fotg210_err(fotg210, fmt, args...) \
84 dev_err(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
85 #define fotg210_info(fotg210, fmt, args...) \
86 dev_info(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
87 #define fotg210_warn(fotg210, fmt, args...) \
88 dev_warn(fotg210_to_hcd(fotg210)->self.controller, fmt, ## args)
90 /* check the values in the HCSPARAMS register (host controller _Structural_
91 * parameters) see EHCI spec, Table 2-4 for each value
92 */
94 {
99 }
101 /* check the values in the HCCPARAMS register (host controller _Capability_
102 * parameters) see EHCI Spec, Table 2-5 for each value
103 */
105 {
109 params,
112 }
114 static void __maybe_unused
116 {
128 }
130 static void __maybe_unused
132 {
140 }
142 static void __maybe_unused
144 {
174 }
176 static int __maybe_unused
178 {
191 }
193 static int __maybe_unused
195 {
204 }
209 u32 command)
210 {
223 }
226 u32 status)
227 {
230 /* signaling state */
244 }
249 sig,
259 }
261 /* functions have the "wrong" filename when they're output... */
262 #define dbg_status(fotg210, label, status) { \
263 char _buf[80]; \
264 dbg_status_buf(_buf, sizeof(_buf), label, status); \
266 }
268 #define dbg_cmd(fotg210, label, command) { \
269 char _buf[80]; \
270 dbg_command_buf(_buf, sizeof(_buf), label, command); \
272 }
274 #define dbg_port(fotg210, label, port, status) { \
275 char _buf[80]; \
277 dbg_port_buf(_buf, sizeof(_buf), label, port, status));\
278 }
280 /* troubleshooting help: expose state in debugfs */
295 };
302 };
309 };
320 };
323 {
336 }
337 }
340 {
349 /* tries to advance through hw_alt_next */
351 }
355 {
356 u32 scratch;
357 u32 hw_curr;
368 else
376 /* else alt_next points to some other qtd */
377 }
393 /* hc may be modifying the list as we read it ... */
406 }
425 scratch,
433 }
442 done:
445 }
448 {
463 /* dumps a snapshot of the async schedule.
464 * usually empty except for long-term bulk reads, or head.
465 * one QH per line, and TDs we know about
466 */
479 }
483 }
485 /* count tds, get ep direction */
488 {
494 /* count tds, get ep direction */
496 temp++;
504 }
505 }
511 }
513 #define DBG_SCHED_LIMIT 64
515 {
523 __hc32 tag;
540 /* dump a snapshot of the periodic schedule.
541 * iso changes, interrupt usually doesn't.
542 */
565 /* uframe masks */
570 /* don't repeat what follows this qh */
579 }
581 }
582 /* show more info the first time around */
608 }
616 }
621 }
622 #undef DBG_SCHED_LIMIT
625 {
635 }
637 }
640 {
665 }
667 /* Capability Registers */
681 /* FIXME interpret both types of params */
692 /* Operational Registers */
721 }
723 #ifdef FOTG210_STATS
735 #endif
737 done:
741 }
743 static struct debug_buffer
745 {
755 }
758 }
761 {
770 }
777 }
779 out:
781 }
785 {
795 }
796 }
802 out:
805 }
808 {
814 }
817 }
819 {
823 }
826 {
836 }
839 {
841 fill_registers_buffer);
844 }
847 {
859 }
862 {
864 }
866 /* handshake - spin reading hc until handshake completes or fails
867 * @ptr: address of hc register to be read
868 * @mask: bits to look at in result of read
869 * @done: value of those bits when handshake succeeds
870 * @usec: timeout in microseconds
871 *
872 * Returns negative errno, or zero on success
873 *
874 * Success happens when the "mask" bits have the specified value (hardware
875 * handshake done). There are two failure modes: "usec" have passed (major
876 * hardware flakeout), or the register reads as all-ones (hardware removed).
877 *
878 * That last failure should_only happen in cases like physical cardbus eject
879 * before driver shutdown. But it also seems to be caused by bugs in cardbus
880 * bridge shutdown: shutting down the bridge before the devices using it.
881 */
884 {
885 u32 result;
895 usec--;
898 }
900 /* Force HC to halt state from unknown (EHCI spec section 2.3).
901 * Must be called with interrupts enabled and the lock not held.
902 */
904 {
905 u32 temp;
909 /* disable any irqs left enabled by previous code */
912 /*
913 * This routine gets called during probe before fotg210->command
914 * has been initialized, so we can't rely on its value.
915 */
926 }
928 /* Reset a non-running (STS_HALT == 1) controller.
929 * Must be called with interrupts enabled and the lock not held.
930 */
932 {
936 /* If the EHCI debug controller is active, special care must be
937 * taken before and after a host controller reset
938 */
959 }
961 /* Idle the controller (turn off the schedules).
962 * Must be called with interrupts enabled and the lock not held.
963 */
965 {
966 u32 temp;
971 /* wait for any schedule enables/disables to take effect */
976 /* then disable anything that's still active */
982 /* hardware can take 16 microframes to turn off ... */
985 }
994 /* Set a bit in the USBCMD register */
996 {
1000 /* unblock posted write */
1002 }
1004 /* Clear a bit in the USBCMD register */
1006 {
1010 /* unblock posted write */
1012 }
1014 /* EHCI timer support... Now using hrtimers.
1015 *
1016 * Lots of different events are triggered from fotg210->hrtimer. Whenever
1017 * the timer routine runs, it checks each possible event; events that are
1018 * currently enabled and whose expiration time has passed get handled.
1019 * The set of enabled events is stored as a collection of bitflags in
1020 * fotg210->enabled_hrtimer_events, and they are numbered in order of
1021 * increasing delay values (ranging between 1 ms and 100 ms).
1022 *
1023 * Rather than implementing a sorted list or tree of all pending events,
1024 * we keep track only of the lowest-numbered pending event, in
1025 * fotg210->next_hrtimer_event. Whenever fotg210->hrtimer gets restarted, its
1026 * expiration time is set to the timeout value for this event.
1027 *
1028 * As a result, events might not get handled right away; the actual delay
1029 * could be anywhere up to twice the requested delay. This doesn't
1030 * matter, because none of the events are especially time-critical. The
1031 * ones that matter most all have a delay of 1 ms, so they will be
1032 * handled after 2 ms at most, which is okay. In addition to this, we
1033 * allow for an expiration range of 1 ms.
1034 */
1036 /* Delay lengths for the hrtimer event types.
1037 * Keep this list sorted by delay length, in the same order as
1038 * the event types indexed by enum fotg210_hrtimer_event in fotg210.h.
1039 */
1051 };
1053 /* Enable a pending hrtimer event */
1056 {
1063 /* Track only the lowest-numbered pending event */
1068 }
1069 }
1072 /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
1074 {
1077 /* Don't enable anything if the controller isn't running (e.g., died) */
1086 /* Poll again later, but give up after about 20 ms */
1091 }
1094 }
1097 /* The status is up-to-date; restart or stop the schedule as needed */
1105 /* Turn off the schedule after a while */
1107 FOTG210_HRTIMER_DISABLE_ASYNC,
1109 }
1110 }
1111 }
1113 /* Turn off the async schedule after a brief delay */
1115 {
1117 }
1120 /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
1122 {
1125 /* Don't do anything if the controller isn't running (e.g., died) */
1134 /* Poll again later, but give up after about 20 ms */
1139 }
1142 }
1145 /* The status is up-to-date; restart or stop the schedule as needed */
1153 /* Turn off the schedule after a while */
1155 FOTG210_HRTIMER_DISABLE_PERIODIC,
1157 }
1158 }
1159 }
1161 /* Turn off the periodic schedule after a brief delay */
1163 {
1165 }
1168 /* Poll the STS_HALT status bit; see when a dead controller stops */
1170 {
1173 /* Give up after a few milliseconds */
1175 /* Try again later */
1179 }
1181 }
1183 /* Clean up the mess */
1189 /* Not in process context, so don't try to reset the controller */
1190 }
1193 /* Handle unlinked interrupt QHs once they are gone from the hardware */
1195 {
1198 /*
1199 * Process all the QHs on the intr_unlink list that were added
1200 * before the current unlink cycle began. The list is in
1201 * temporal order, so stop when we reach the first entry in the
1202 * current cycle. But if the root hub isn't running then
1203 * process all the QHs on the list.
1204 */
1214 }
1216 /* Handle remaining entries later */
1221 }
1223 }
1226 /* Start another free-iTDs/siTDs cycle */
1228 {
1235 }
1236 }
1238 /* Wait for controller to stop using old iTDs and siTDs */
1240 {
1251 }
1255 }
1258 /* Handle lost (or very late) IAA interrupts */
1260 {
1264 /*
1265 * Lost IAA irqs wedge things badly; seen first with a vt8235.
1266 * So we need this watchdog, but must protect it against both
1267 * (a) SMP races against real IAA firing and retriggering, and
1268 * (b) clean HC shutdown, when IAA watchdog was pending.
1269 */
1273 /* If we get here, IAA is *REALLY* late. It's barely
1274 * conceivable that the system is so busy that CMD_IAAD
1275 * is still legitimately set, so let's be sure it's
1276 * clear before we read STS_IAA. (The HC should clear
1277 * CMD_IAAD when it sets STS_IAA.)
1278 */
1281 /*
1282 * If IAA is set here it either legitimately triggered
1283 * after the watchdog timer expired (_way_ late, so we'll
1284 * still count it as lost) ... or a silicon erratum:
1285 * - VIA seems to set IAA without triggering the IRQ;
1286 * - IAAD potentially cleared without setting IAA.
1287 */
1293 }
1298 }
1299 }
1302 /* Enable the I/O watchdog, if appropriate */
1304 {
1305 /* Not needed if the controller isn't running or it's already enabled */
1311 /*
1312 * Isochronous transfers always need the watchdog.
1313 * For other sorts we use it only if the flag is set.
1314 */
1319 }
1322 /* Handler functions for the hrtimer event types.
1323 * Keep this array in the same order as the event types indexed by
1324 * enum fotg210_hrtimer_event in fotg210.h.
1325 */
1337 };
1340 {
1343 ktime_t now;
1354 /*
1355 * Check each pending event. If its time has expired, handle
1356 * the event; otherwise re-enable it.
1357 */
1362 else
1364 }
1368 }
1370 #define fotg210_bus_suspend NULL
1371 #define fotg210_bus_resume NULL
1375 {
1379 /* if reset finished and it's still not enabled -- handoff */
1381 /* with integrated TT, there's nobody to hand it to! */
1384 else
1389 }
1392 /* build "status change" packet (one or two bytes) from HC registers */
1395 {
1398 u32 mask;
1402 /* init status to no-changes */
1405 /* Inform the core about resumes-in-progress by returning
1406 * a non-zero value even if there are no status changes.
1407 */
1411 /* PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND */
1413 /* no hub change reports (bit 0) for now (power, ...) */
1415 /* port N changes (bit N)? */
1420 /*
1421 * Return status information even for ports with OWNER set.
1422 * Otherwise hub_wq wouldn't see the disconnect event when a
1423 * high-speed device is switched over to the companion
1424 * controller by the user.
1425 */
1432 }
1433 /* FIXME autosuspend idle root hubs */
1436 }
1440 {
1442 u16 temp;
1452 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1459 }
1463 {
1472 /*
1473 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1474 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1475 * (track current state ourselves) ... blink for diagnostics,
1476 * power, "this is the one", etc. EHCI spec supports this.
1477 */
1485 /* no hub-wide feature/status flags */
1489 }
1494 wIndex--;
1498 /*
1499 * Even if OWNER is set, so the port is owned by the
1500 * companion controller, hub_wq needs to be able to clear
1501 * the port-change status bits (especially
1502 * USB_PORT_STAT_C_CONNECTION).
1503 */
1520 /* resume signaling for 20 msec */
1536 /* GetPortStatus clears reset */
1540 }
1545 buf);
1548 /* no hub-wide feature/status flags */
1550 /*cpu_to_le32s ((u32 *) buf); */
1555 wIndex--;
1559 /* wPortChange bits */
1569 /* whoever resumes must GetPortStatus to complete it!! */
1572 /* Remote Wakeup received? */
1574 /* resume signaling for 20 msec */
1577 /* check the port again */
1580 }
1582 /* resume completed? */
1589 /* stop resume signaling */
1593 status_reg);
1602 }
1604 }
1605 }
1607 /* whoever resets must GetPortStatus to complete it!! */
1614 /* force reset to complete */
1617 status_reg);
1618 /* REVISIT: some hardware needs 550+ usec to clear
1619 * this bit; seems too long to spin routinely...
1620 */
1627 }
1629 /* see what we found out */
1633 /* restart schedule */
1636 }
1641 }
1643 /* transfer dedicated ports to the companion hc */
1651 }
1653 /*
1654 * Even if OWNER is set, there's no harm letting hub_wq
1655 * see the wPortStatus values (they should all be 0 except
1656 * for PORT_POWER anyway).
1657 */
1662 }
1666 /* maybe the port was unsuspended without our knowledge */
1675 }
1693 /* no hub-wide feature/status flags */
1697 }
1705 wIndex--;
1714 /* After above check the port must be connected.
1715 * Set appropriate bit thus could put phy into low power
1716 * mode if we have hostpc feature
1717 */
1719 status_reg);
1725 /* line status bits may report this as low speed,
1726 * which can be fine if this root hub has a
1727 * transaction translator built in.
1728 */
1733 /*
1734 * caller must wait, then call GetPortStatus
1735 * usb 2.0 spec says 50 ms resets on root
1736 */
1742 /* For downstream facing ports (these): one hub port is put
1743 * into test mode according to USB2 11.24.2.13, then the hub
1744 * must be reset (which for root hub now means rmmod+modprobe,
1745 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
1746 * about the EHCI-specific stuff.
1747 */
1755 /* Put all enabled ports into suspend */
1760 status_reg);
1773 }
1778 error:
1779 /* "stall" on error */
1781 }
1784 }
1788 {
1790 }
1794 {
1796 }
1798 /* There's basically three types of memory:
1799 * - data used only by the HCD ... kmalloc is fine
1800 * - async and periodic schedules, shared by HC and HCD ... these
1801 * need to use dma_pool or dma_alloc_coherent
1802 * - driver buffers, read/written by HC ... single shot DMA mapped
1803 *
1804 * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
1805 * No memory seen by this driver is pageable.
1806 */
1808 /* Allocate the key transfer structures from the previously allocated pool */
1811 {
1818 }
1821 gfp_t flags)
1822 {
1824 dma_addr_t dma;
1831 }
1835 {
1837 }
1841 {
1842 /* clean qtds first, and know this is not linked */
1846 }
1851 }
1854 gfp_t flags)
1855 {
1857 dma_addr_t dma;
1868 /* dummy td enables safe urb queuing */
1873 }
1874 done:
1876 fail1:
1878 fail:
1881 }
1883 /* The queue heads and transfer descriptors are managed from pools tied
1884 * to each of the "per device" structures.
1885 * This is the initialisation and cleanup code.
1886 */
1889 {
1898 /* DMA consistent memory and pools */
1914 /* shadow periodic table */
1917 }
1919 /* remember to add cleanup code (above) if you add anything here */
1921 {
1924 /* QTDs for control/bulk/intr transfers */
1933 /* QHs for control/bulk/intr transfers */
1946 /* ITD for high speed ISO transfers */
1955 /* Hardware periodic table */
1966 /* software shadow of hardware table */
1968 flags);
1972 fail:
1976 }
1977 /* EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
1978 *
1979 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
1980 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
1981 * buffers needed for the larger number). We use one QH per endpoint, queue
1982 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
1983 *
1984 * ISO traffic uses "ISO TD" (itd) records, and (along with
1985 * interrupts) needs careful scheduling. Performance improvements can be
1986 * an ongoing challenge. That's in "ehci-sched.c".
1987 *
1988 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
1989 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
1990 * (b) special fields in qh entries or (c) split iso entries. TTs will
1991 * buffer low/full speed data so the host collects it at high speed.
1992 */
1994 /* fill a qtd, returning how much of the buffer we were able to queue up */
1997 {
2001 /* one buffer entry per 4K ... first might be short or unaligned */
2011 /* per-qtd limit: from 16K to 20K (best alignment) */
2020 else
2022 }
2024 /* short packets may only terminate transfers */
2027 }
2032 }
2036 {
2039 /* writes to an active overlay are unsafe */
2045 /* Except for control endpoints, we make hardware maintain data
2046 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
2047 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
2048 * ever clear it.
2049 */
2058 }
2059 }
2062 }
2064 /* if it weren't for a common silicon quirk (writing the dummy into the qh
2065 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
2066 * recovery (including urb dequeue) would need software changes to a QH...
2067 */
2069 {
2077 /*
2078 * first qtd may already be partially processed.
2079 * If we come here during unlink, the QH overlay region
2080 * might have reference to the just unlinked qtd. The
2081 * qtd is updated in qh_completions(). Update the QH
2082 * overlay here.
2083 */
2087 }
2088 }
2092 }
2098 {
2109 }
2113 {
2115 /* If an async split transaction gets an error or is unlinked,
2116 * the TT buffer may be left in an indeterminate state. We
2117 * have to clear the TT buffer.
2118 *
2119 * Note: this routine is never called for Isochronous transfers.
2120 */
2133 }
2134 }
2135 }
2139 {
2142 /* count IN/OUT bytes, not SETUP (even short packets) */
2146 /* don't modify error codes */
2150 /* force cleanup after short read; not always an error */
2154 /* serious "can't proceed" faults reported by the hardware */
2157 /* FIXME "must" disable babbling device's port too */
2159 /* CERR nonzero + halt --> stall */
2163 /* In theory, more than one of the following bits can be set
2164 * since they are sticky and the transaction is retried.
2165 * Which to test first is rather arbitrary.
2166 */
2168 /* fs/ls interrupt xfer missed the complete-split */
2175 /* timeout, bad CRC, wrong PID, etc */
2183 }
2191 }
2194 }
2200 {
2204 /* S-mask in a QH means it's an interrupt urb */
2207 /* ... update hc-wide periodic stats (for usbfs) */
2209 }
2210 }
2215 /* report non-error and short read status as zero */
2219 }
2221 #ifdef FOTG210_URB_TRACE
2227 status,
2229 #endif
2231 /* complete() can reenter this HCD */
2236 }
2240 /* Process and free completed qtds for a qh, returning URBs to drivers.
2241 * Chases up to qh->hw_current. Returns number of completions called,
2242 * indicating how much "real" work we did.
2243 */
2246 {
2252 u8 state;
2258 /* completions (or tasks on other cpus) must never clobber HALT
2259 * till we've gone through and cleaned everything up, even when
2260 * they add urbs to this qh's queue or mark them for unlinking.
2261 *
2262 * NOTE: unlinking expects to be done in queue order.
2263 *
2264 * It's a bug for qh->qh_state to be anything other than
2265 * QH_STATE_IDLE, unless our caller is scan_async() or
2266 * scan_intr().
2267 */
2272 rescan:
2277 /* remove de-activated QTDs from front of queue.
2278 * after faults (including short reads), cleanup this urb
2279 * then let the queue advance.
2280 * if queue is stopped, handles unlinks.
2281 */
2288 /* clean up any state from previous QTD ...*/
2292 last_status);
2293 count++;
2295 }
2298 }
2300 /* ignore urbs submitted during completions we reported */
2304 /* hardware copies qtd out of qh overlay */
2308 /* always clean up qtds the hc de-activated */
2309 retry_xacterr:
2312 /* Report Data Buffer Error: non-fatal but useful */
2321 /* on STALL, error, and short reads this urb must
2322 * complete and all its qtds must be recycled.
2323 */
2326 /* retry transaction errors until we
2327 * reach the software xacterr limit
2328 */
2339 /* reset the token in the qtd and the
2340 * qh overlay (which still contains
2341 * the qtd) so that we pick up from
2342 * where we left off
2343 */
2348 token);
2351 token);
2353 }
2356 /* magic dummy for some short reads; qh won't advance.
2357 * that silicon quirk can kick in with this dummy too.
2358 *
2359 * other short reads won't stop the queue, including
2360 * control transfers (status stage handles that) or
2361 * most other single-qtd reads ... the queue stops if
2362 * URB_SHORT_NOT_OK was set so the driver submitting
2363 * the urbs could clean it up.
2364 */
2369 }
2371 /* stop scanning when we reach qtds the hc is using */
2376 /* scan the whole queue for unlinks whenever it stops */
2380 /* cancel everything if we halt, suspend, etc */
2384 /* this qtd is active; skip it unless a previous qtd
2385 * for its urb faulted, or its urb was canceled.
2386 */
2390 /* qh unlinked; token in overlay may be most current */
2396 /* An unlink may leave an incomplete
2397 * async transaction in the TT buffer.
2398 * We have to clear it.
2399 */
2401 token);
2402 }
2403 }
2405 /* unless we already know the urb's status, collect qtd status
2406 * and update count of bytes transferred. in common short read
2407 * cases with only one data qtd (including control transfers),
2408 * queue processing won't halt. but with two or more qtds (for
2409 * example, with a 32 KB transfer), when the first qtd gets a
2410 * short read the second must be removed by hand.
2411 */
2420 /* As part of low/full-speed endpoint-halt processing
2421 * we must clear the TT buffer (11.17.5).
2422 */
2425 /* The TT's in some hubs malfunction when they
2426 * receive this request following a STALL (they
2427 * stop sending isochronous packets). Since a
2428 * STALL can't leave the TT buffer in a busy
2429 * state (if you believe Figures 11-48 - 11-51
2430 * in the USB 2.0 spec), we won't clear the TT
2431 * buffer in this case. Strictly speaking this
2432 * is a violation of the spec.
2433 */
2437 }
2438 }
2440 /* if we're removing something not at the queue head,
2441 * patch the hardware queue pointer.
2442 */
2447 }
2449 /* remove qtd; it's recycled after possible urb completion */
2453 /* reinit the xacterr counter for the next qtd */
2455 }
2457 /* last urb's completion might still need calling */
2460 count++;
2462 }
2464 /* Do we need to rescan for URBs dequeued during a giveback? */
2466 /* If the QH is already unlinked, do the rescan now. */
2470 /* Otherwise we have to wait until the QH is fully unlinked.
2471 * Our caller will start an unlink if qh->needs_rescan is
2472 * set. But if an unlink has already started, nothing needs
2473 * to be done.
2474 */
2477 }
2479 /* restore original state; caller must unlink or relink */
2482 /* be sure the hardware's done with the qh before refreshing
2483 * it after fault cleanup, or recovering from silicon wrongly
2484 * overlaying the dummy qtd (which reduces DMA chatter).
2485 */
2492 /* We won't refresh a QH that's linked (after the HC
2493 * stopped the queue). That avoids a race:
2494 * - HC reads first part of QH;
2495 * - CPU updates that first part and the token;
2496 * - HC reads rest of that QH, including token
2497 * Result: HC gets an inconsistent image, and then
2498 * DMAs to/from the wrong memory (corrupting it).
2499 *
2500 * That should be rare for interrupt transfers,
2501 * except maybe high bandwidth ...
2502 */
2504 /* Tell the caller to start an unlink */
2507 /* otherwise, unlink already started */
2508 }
2509 }
2512 }
2514 /* high bandwidth multiplier, as encoded in highspeed endpoint descriptors */
2515 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
2516 /* ... and packet size, for any kind of endpoint descriptor */
2517 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
2519 /* reverse of qh_urb_transaction: free a list of TDs.
2520 * used for cleanup after errors, before HC sees an URB's TDs.
2521 */
2524 {
2530 }
2531 }
2533 /* create a list of filled qtds for this URB; won't link into qh.
2534 */
2537 {
2539 dma_addr_t buf;
2542 u32 token;
2546 /*
2547 * URBs map to sequences of QTDs: one logical transaction
2548 */
2557 /* for split transactions, SplitXState initialized to zero */
2562 /* SETUP pid */
2567 /* ... and always at least one more pid */
2577 /* for zero length DATA stages, STATUS is always IN */
2580 }
2582 /*
2583 * data transfer stage: buffer setup
2584 */
2590 /* urb->transfer_buffer_length may be smaller than the
2591 * size of the scatterlist (or vice versa)
2592 */
2598 }
2602 /* else it's already initted to "out" pid (0 << 8) */
2606 /*
2607 * buffer gets wrapped in one or more qtds;
2608 * last one may be "short" (including zero len)
2609 * and may serve as a control status ack
2610 */
2615 maxpacket);
2620 /*
2621 * short reads advance to a "magic" dummy instead of the next
2622 * qtd ... that forces the queue to stop, for manual cleanup.
2623 * (this will usually be overridden later.)
2624 */
2628 /* qh makes control packets use qtd toggle; maybe switch it */
2638 }
2647 }
2649 /*
2650 * unless the caller requires manual cleanup after short reads,
2651 * have the alt_next mechanism keep the queue running after the
2652 * last data qtd (the only one, for control and most other cases).
2653 */
2658 /*
2659 * control requests may need a terminating data "status" ack;
2660 * other OUT ones may need a terminating short packet
2661 * (zero length).
2662 */
2674 }
2684 /* never any data in such packets */
2686 }
2687 }
2689 /* by default, enable interrupt on urb completion */
2694 cleanup:
2697 }
2699 /* Would be best to create all qh's from config descriptors,
2700 * when each interface/altsetting is established. Unlink
2701 * any previous qh and cancel its urbs first; endpoints are
2702 * implicitly reset then (data toggle too).
2703 * That'd mean updating how usbcore talks to HCDs. (2.7?)
2704 */
2707 /* Each QH holds a qtd list; a QH is used for everything except iso.
2708 *
2709 * For interrupt urbs, the scheduler must set the microframe scheduling
2710 * mask(s) each time the QH gets scheduled. For highspeed, that's
2711 * just one microframe in the s-mask. For split interrupt transactions
2712 * there are additional complications: c-mask, maybe FSTNs.
2713 */
2715 gfp_t flags)
2716 {
2727 /*
2728 * init endpoint/device data for this QH
2729 */
2737 /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
2738 * acts like up to 3KB, but is built from smaller packets.
2739 */
2744 }
2746 /* Compute interrupt scheduling parameters just once, and save.
2747 * - allowing for high bandwidth, how many nsec/uframe are used?
2748 * - split transactions need a second CSPLIT uframe; same question
2749 * - splits also need a schedule gap (for full/low speed I/O)
2750 * - qh has a polling interval
2751 *
2752 * For control/bulk requests, the HC or TT handles these.
2753 */
2766 /* NOTE interval 2 or 4 uframes could work.
2767 * But interval 1 scheduling is simpler, and
2768 * includes high bandwidth.
2769 */
2774 }
2778 /* gap is f(FS/LS transfer times) */
2782 /* FIXME this just approximates SPLIT/CSPLIT times */
2789 }
2799 }
2800 }
2801 }
2803 /* support for tt scheduling, and access to toggles */
2806 /* using TT? */
2810 /* FALL THROUGH */
2813 /* EPS 0 means "full" */
2819 }
2824 /* Some Freescale processors have an erratum in which the
2825 * port number in the queue head was 0..N-1 instead of 1..N.
2826 */
2829 else
2832 /* set the address of the TT; for TDI's integrated
2833 * root hub tt, leave it zeroed.
2834 */
2838 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
2851 /* The USB spec says that high speed bulk endpoints
2852 * always use 512 byte maxpacket. But some device
2853 * vendors decided to ignore that, and MSFT is happy
2854 * to help them do so. So now people expect to use
2855 * such nonconformant devices with Linux too; sigh.
2856 */
2862 }
2867 done:
2870 }
2872 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
2874 /* init as live, toggle clear, advance to dummy */
2883 }
2886 {
2890 /* Stop waiting to turn off the async schedule */
2893 /* Don't start the schedule until ASS is 0 */
2896 }
2899 {
2903 /* The async schedule and async_unlink list are supposed to be empty */
2906 /* Don't turn off the schedule until ASS is 1 */
2908 }
2910 /* move qh (and its qtds) onto async queue; maybe enable queue. */
2913 {
2917 /* Don't link a QH if there's a Clear-TT-Buffer pending */
2923 /* clear halt and/or toggle; and maybe recover from silicon quirk */
2926 /* splice right after start */
2937 /* qtd completions reported later by interrupt */
2940 }
2942 /* For control/bulk/interrupt, return QH with these TDs appended.
2943 * Allocates and initializes the QH if necessary.
2944 * Returns null if it can't allocate a QH it needs to.
2945 * If the QH has TDs (urbs) already, that's great.
2946 */
2950 {
2956 /* can't sleep here, we have fotg210->lock... */
2959 }
2965 else
2967 qtd_list);
2969 /* control qh may need patching ... */
2971 /* usb_reset_device() briefly reverts to address 0 */
2974 }
2976 /* just one way to queue requests: swap with the dummy qtd.
2977 * only hc or qh_refresh() ever modify the overlay.
2978 */
2981 dma_addr_t dma;
2982 __hc32 token;
2984 /* to avoid racing the HC, use the dummy td instead of
2985 * the first td of our list (becomes new dummy). both
2986 * tds stay deactivated until we're done, when the
2987 * HC is allowed to fetch the old dummy (4.10.2).
2988 */
3005 /* hc must see the new dummy at list end */
3011 /* let the hc process these next qtds */
3016 }
3017 }
3019 }
3023 {
3031 #ifdef FOTG210_URB_TRACE
3032 {
3043 }
3044 #endif
3050 }
3060 }
3062 /* Control/bulk operations through TTs don't need scheduling,
3063 * the HC and TT handle it when the TT has a buffer ready.
3064 */
3067 done:
3072 }
3076 {
3079 /* Add to the end of the list of QHs waiting for the next IAAD */
3083 else
3087 /* Unlink it from the schedule */
3096 }
3099 {
3100 /*
3101 * Do nothing if an IAA cycle is already running or
3102 * if one will be started shortly.
3103 */
3107 /* Do all the waiting QHs at once */
3111 /* If the controller isn't running, we don't have to wait for it */
3116 /* Otherwise start a new IAA cycle */
3118 /* Make sure the unlinks are all visible to the hardware */
3126 }
3127 }
3129 /* the async qh for the qtds being unlinked are now gone from the HC */
3132 {
3135 /* Process the idle QHs */
3136 restart:
3151 }
3154 /* Start a new IAA cycle if any QHs are waiting for it */
3159 }
3160 }
3163 {
3168 /* Unlink all the async QHs that have been empty for a timer cycle */
3179 else
3181 }
3182 }
3184 /* Start a new IAA cycle if any QHs are waiting for it */
3188 /* QHs that haven't been empty for long enough will be handled later */
3193 }
3194 }
3196 /* makes sure the async qh will become idle */
3197 /* caller must own fotg210->lock */
3201 {
3202 /*
3203 * If the QH isn't linked then there's nothing we can do
3204 * unless we were called during a giveback, in which case
3205 * qh_completions() has to deal with it.
3206 */
3211 }
3215 }
3218 {
3226 rescan:
3227 /* clean any finished work for this qh */
3231 /*
3232 * Unlinks could happen here; completion reporting
3233 * drops the lock. That's why fotg210->qh_scan_next
3234 * always holds the next qh to scan; if the next qh
3235 * gets unlinked then fotg210->qh_scan_next is adjusted
3236 * in single_unlink_async().
3237 */
3247 }
3248 }
3250 /*
3251 * Unlink empty entries, reducing DMA usage as well
3252 * as HCD schedule-scanning costs. Delay for any qh
3253 * we just scanned, there's a not-unusual case that it
3254 * doesn't stay idle for long.
3255 */
3262 }
3263 }
3264 /* EHCI scheduled transaction support: interrupt, iso, split iso
3265 * These are called "periodic" transactions in the EHCI spec.
3266 *
3267 * Note that for interrupt transfers, the QH/QTD manipulation is shared
3268 * with the "asynchronous" transaction support (control/bulk transfers).
3269 * The only real difference is in how interrupt transfers are scheduled.
3270 *
3271 * For ISO, we make an "iso_stream" head to serve the same role as a QH.
3272 * It keeps track of every ITD (or SITD) that's linked, and holds enough
3273 * pre-calculated schedule data to make appending to the queue be quick.
3274 */
3277 /* periodic_next_shadow - return "next" pointer on shadow list
3278 * @periodic: host pointer to qh/itd
3279 * @tag: hardware tag for type of this record
3280 */
3283 {
3291 }
3292 }
3296 {
3298 /* our fotg210_shadow.qh is actually software part */
3301 /* others are hw parts */
3304 }
3305 }
3307 /* caller must hold fotg210->lock */
3310 {
3315 /* find predecessor of "ptr"; hw and shadow lists are in sync */
3322 }
3323 /* an interrupt entry (at list end) could have been shared */
3327 /* update shadow and hardware lists ... the old "next" pointers
3328 * from ptr may still be in use, the caller updates them.
3329 */
3335 }
3337 /* how many of the uframe's 125 usecs are allocated? */
3340 {
3350 /* is it in the S-mask? */
3353 /* ... or C-mask? */
3360 /* case Q_TYPE_FSTN: */
3362 /* for "save place" FSTNs, count the relevant INTR
3363 * bandwidth from the previous frame
3364 */
3377 }
3378 }
3383 }
3386 {
3393 else
3395 }
3397 /* return true iff the device's transaction translator is available
3398 * for a periodic transfer starting at the specified frame, using
3399 * all the uframes in the mask.
3400 */
3403 {
3407 /* note bandwidth wastage: split never follows csplit
3408 * (different dev or endpoint) until the next uframe.
3409 * calling convention doesn't make that distinction.
3410 */
3413 __hc32 type;
3427 u32 mask;
3431 /* "knows" no gap is needed */
3435 }
3439 /* case Q_TYPE_FSTN: */
3444 }
3446 /* collision or error */
3448 }
3449 }
3451 /* no collision */
3453 }
3456 {
3460 /* Stop waiting to turn off the periodic schedule */
3464 /* Don't start the schedule until PSS is 0 */
3467 }
3470 {
3474 /* Don't turn off the schedule until PSS is 1 */
3476 }
3478 /* periodic schedule slots have iso tds (normal or split) first, then a
3479 * sparse tree for active interrupt transfers.
3480 *
3481 * this just links in a qh; caller guarantees uframe masks are set right.
3482 * no FSTN support (yet; fotg210 0.96+)
3483 */
3485 {
3495 /* high bandwidth, or otherwise every microframe */
3505 /* skip the iso nodes at list head */
3513 }
3515 /* sorting each branch by period (slow-->fast)
3516 * enables sharing interior tree nodes
3517 */
3524 }
3525 /* link in this qh, unless some earlier pass did that */
3533 }
3534 }
3538 /* update per-qh bandwidth for usbfs */
3545 /* maybe enable periodic schedule processing */
3548 }
3552 {
3556 /*
3557 * If qh is for a low/full-speed device, simply unlinking it
3558 * could interfere with an ongoing split transaction. To unlink
3559 * it safely would require setting the QH_INACTIVATE bit and
3560 * waiting at least one frame, as described in EHCI 4.12.2.5.
3561 *
3562 * We won't bother with any of this. Instead, we assume that the
3563 * only reason for unlinking an interrupt QH while the current URB
3564 * is still active is to dequeue all the URBs (flush the whole
3565 * endpoint queue).
3566 *
3567 * If rebalancing the periodic schedule is ever implemented, this
3568 * approach will no longer be valid.
3569 */
3571 /* high bandwidth, or otherwise part of every microframe */
3579 /* update per-qh bandwidth for usbfs */
3590 /* qh->qh_next still "live" to HC */
3598 }
3602 {
3603 /* If the QH isn't linked then there's nothing we can do
3604 * unless we were called during a giveback, in which case
3605 * qh_completions() has to deal with it.
3606 */
3611 }
3615 /* Make sure the unlinks are visible before starting the timer */
3618 /*
3619 * The EHCI spec doesn't say how long it takes the controller to
3620 * stop accessing an unlinked interrupt QH. The timer delay is
3621 * 9 uframes; presumably that will be long enough.
3622 */
3625 /* New entries go at the end of the intr_unlink list */
3628 else
3640 }
3641 }
3644 {
3653 /* reschedule QH iff another request is queued */
3658 /* An error here likely indicates handshake failure
3659 * or no space left in the schedule. Neither fault
3660 * should happen often ...
3661 *
3662 * FIXME kill the now-dysfunctional queued urbs
3663 */
3667 }
3669 /* maybe turn off periodic schedule */
3672 }
3676 {
3679 /* complete split running into next frame?
3680 * given FSTN support, we could sometimes check...
3681 */
3685 /* convert "usecs we need" to "max already claimed" */
3688 /* we "know" 2 and 4 uframe intervals were rejected; so
3689 * for period 0, check _every_ microframe in the schedule.
3690 */
3695 uframe);
3698 }
3701 /* just check the specified uframe, at that period */
3708 }
3710 /* success! */
3712 }
3716 {
3729 }
3731 /* Make sure this tt's buffer is also available for CSPLITs.
3732 * We pessimize a bit; probably the typical full speed case
3733 * doesn't need the second CSPLIT.
3734 *
3735 * NOTE: both SPLIT and CSPLIT could be checked in just
3736 * one smart pass...
3737 */
3750 }
3751 done:
3753 }
3755 /* "first fit" scheduling policy used the first time through,
3756 * or when the previous schedule slot can't be re-used.
3757 */
3759 {
3762 __hc32 c_mask;
3770 /* reuse the previous schedule slots, if we can */
3779 }
3781 /* else scan the schedule to find a group of slots such that all
3782 * uframes have enough periodic bandwidth available.
3783 */
3785 /* "normal" case, uframing flexible except with splits */
3797 }
3798 }
3800 /* qh->period == 0 means every uframe */
3805 }
3810 /* reset S-frame and (maybe) C-frame masks */
3819 /* stuff into the periodic schedule */
3821 done:
3823 }
3827 {
3834 /* get endpoint and transfer/schedule data */
3842 }
3847 /* get qh and force any scheduling errors */
3853 }
3858 }
3860 /* then queue the urb's tds to the qh */
3864 /* ... update usbfs periodic stats */
3867 done:
3870 done_not_linked:
3876 }
3879 {
3884 rescan:
3885 /* clean any finished work for this qh */
3889 /*
3890 * Unlinks could happen here; completion reporting
3891 * drops the lock. That's why fotg210->qh_scan_next
3892 * always holds the next qh to scan; if the next qh
3893 * gets unlinked then fotg210->qh_scan_next is adjusted
3894 * in qh_unlink_periodic().
3895 */
3903 }
3904 }
3905 }
3907 /* fotg210_iso_stream ops work with both ITD and SITD */
3910 {
3918 }
3920 }
3925 {
3926 u32 buf1;
3932 /*
3933 * this might be a "high bandwidth" highspeed endpoint,
3934 * as encoded in the ep descriptor's wMaxPacket field
3935 */
3941 else
3953 /* usbfs wants to report the average usecs per frame tied up
3954 * when transfers on this endpoint are scheduled ...
3955 */
3964 }
3973 }
3977 {
3986 else
3999 }
4001 /* if dev->ep[epnum] is a QH, hw is set */
4007 }
4011 }
4013 /* fotg210_iso_sched ops can be ITD-only or SITD-only */
4016 gfp_t mem_flags)
4017 {
4027 }
4032 {
4036 /* how many uframes are needed for these transfers */
4039 /* figure out per-uframe itd fields that we'll need later
4040 * when we fit new itds into the schedule.
4041 */
4045 dma_addr_t buf;
4046 u32 trans;
4059 /* might need to cross a buffer page within a uframe */
4064 }
4065 }
4069 {
4072 /* caller must hold fotg210->lock!*/
4075 }
4079 {
4081 dma_addr_t itd_dma;
4095 else
4098 /* allocate/init ITDs */
4102 /*
4103 * Use iTDs from the free list, but not iTDs that may
4104 * still be in use by the hardware.
4105 */
4114 alloc_itd:
4123 }
4124 }
4128 }
4131 /* temporarily store schedule info in hcpriv */
4135 }
4139 {
4142 /* can't commit more than uframe_periodic_max usec */
4147 /* we know urb->interval is 2^N uframes */
4151 }
4153 /* This scheduler plans almost as far into the future as it has actual
4154 * periodic schedule slots. (Affected by TUNE_FLS, which defaults to
4155 * "as small as possible" to be cache-friendlier.) That limits the size
4156 * transfers you can stream reliably; avoid more than 64 msec per urb.
4157 * Also avoid queue depths of less than fotg210's worst irq latency (affected
4158 * by the per-urb URB_NO_INTERRUPT hint, the log2_irq_thresh module parameter,
4159 * and other factors); or more than about 230 msec total (for portability,
4160 * given FOTG210_TUNE_FLS and the slop). Or, write a smarter scheduler!
4161 */
4167 {
4180 }
4184 /* Typical case: reuse current schedule, stream is still active.
4185 * Hopefully there are no gaps from the host falling behind
4186 * (irq delays etc), but if there are we'll take the next
4187 * slot in the schedule, implicitly assuming URB_ISO_ASAP.
4188 */
4190 u32 excess;
4192 /* For high speed devices, allow scheduling within the
4193 * isochronous scheduling threshold. For full speed devices
4194 * and Intel PCI-based controllers, don't (work around for
4195 * Intel ICH9 bug).
4196 */
4199 else
4202 /* Fell behind (by up to twice the slop amount)?
4203 * We decide based on the time of the last currently-scheduled
4204 * slot, not the time of the next available slot.
4205 */
4210 else
4215 mod);
4218 }
4219 }
4221 /* need to schedule; when's the next (u)frame we could start?
4222 * this is bigger than fotg210->i_thresh allows; scheduling itself
4223 * isn't free, the slop should handle reasonably slow cpus. it
4224 * can also help high bandwidth if the dma and irq loads don't
4225 * jump until after the queue is primed.
4226 */
4232 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
4234 /* find a uframe slot with enough bandwidth.
4235 * Early uframes are more precious because full-speed
4236 * iso IN transfers can't use late uframes,
4237 * and therefore they should be allocated last.
4238 */
4242 start--;
4243 /* check schedule: enough space? */
4249 /* no room in the schedule */
4255 }
4256 }
4258 /* Tried to schedule too far into the future? */
4266 }
4270 /* report high speed start in uframes; full speed, in frames */
4275 /* Make sure scan_isoc() sees these */
4280 fail:
4284 }
4288 {
4291 /* it's been recently zeroed */
4300 /* All other fields are filled when scheduling */
4301 }
4306 {
4318 /* iso_frame_desc[].offset must be strictly increasing */
4325 }
4326 }
4330 {
4336 /* skip any iso nodes which might belong to previous microframes */
4344 }
4352 }
4354 /* fit urb's itds into the selected schedule slot; activate as needed */
4357 {
4374 }
4376 /* fill iTDs uframe by uframe */
4379 /* ASSERT: we have all necessary itds */
4381 /* ASSERT: no itds for this endpoint in this uframe */
4389 }
4398 packet++;
4400 /* link completed itds into the schedule */
4404 itd);
4406 }
4407 }
4410 /* don't need that schedule data any more */
4416 }
4418 #define ISO_ERRS (FOTG210_ISOC_BUF_ERR | FOTG210_ISOC_BABBLE |\
4419 FOTG210_ISOC_XACTERR)
4421 /* Process and recycle a completed ITD. Return true iff its urb completed,
4422 * and hence its completion callback probably added things to the hardware
4423 * schedule.
4424 *
4425 * Note that we carefully avoid recycling this descriptor until after any
4426 * completion callback runs, so that it won't be reused quickly. That is,
4427 * assuming (a) no more than two urbs per frame on this endpoint, and also
4428 * (b) only this endpoint's completions submit URBs. It seems some silicon
4429 * corrupts things if you reuse completed descriptors very quickly...
4430 */
4432 {
4435 u32 t;
4442 /* for each uframe with a packet */
4452 /* report transfer status */
4464 /* HC need not update length with this error */
4469 }
4475 /* URB was too late */
4477 }
4478 }
4480 /* handle completion now? */
4484 /* ASSERT: it's really the last itd for this urb
4485 * list_for_each_entry (itd, &stream->td_list, itd_list)
4486 * BUG_ON (itd->urb == urb);
4487 */
4489 /* give urb back to the driver; completion often (re)submits */
4505 }
4507 done:
4510 /* Add to the end of the free list for later reuse */
4513 /* Recycle the iTDs when the pipeline is empty (ep no longer in use) */
4518 }
4521 }
4524 gfp_t mem_flags)
4525 {
4530 /* Get iso_stream head */
4535 }
4538 USB_PORT_STAT_HIGH_SPEED)) {
4542 }
4544 #ifdef FOTG210_URB_TRACE
4552 stream);
4553 #endif
4555 /* allocate ITDs w/o locking anything */
4560 }
4562 /* schedule ... need to lock */
4567 }
4574 else
4576 done_not_linked:
4578 done:
4580 }
4584 {
4590 /* scan each element in frame's queue for completions */
4600 /* If this ITD is still active, leave it for
4601 * later processing ... check the next entry.
4602 * No need to check for activity unless the
4603 * frame is current.
4604 */
4611 }
4619 }
4620 }
4622 /* Take finished ITDs out of the schedule
4623 * and process them: recycle, maybe report
4624 * URB completion. HC won't cache the
4625 * pointer for much longer, if at all.
4626 */
4637 /* FALL THROUGH */
4640 /* End of the iTDs and siTDs */
4643 }
4645 /* assume completion callbacks modify the queue */
4648 }
4650 }
4653 {
4658 /*
4659 * When running, scan from last scan point up to "now"
4660 * else clean up by scanning everything that's left.
4661 * Touches as few pages as possible: cache-friendly.
4662 */
4670 }
4680 /* Stop when we have reached the current frame */
4684 }
4686 }
4688 /* Display / Set uframe_periodic_max
4689 */
4692 {
4699 }
4704 {
4710 ssize_t ret;
4718 uframe_periodic_max);
4720 }
4724 /*
4725 * lock, so that our checking does not race with possible periodic
4726 * bandwidth allocation through submitting new urbs.
4727 */
4730 /*
4731 * for request to decrease max periodic bandwidth, we have to check
4732 * every microframe in the schedule to see whether the decrease is
4733 * possible.
4734 */
4742 uframe));
4746 "cannot decrease uframe_periodic_max because periodic bandwidth is already allocated (%u > %u)\n",
4749 }
4750 }
4752 /* increasing is always ok */
4764 out_unlock:
4767 }
4772 {
4776 }
4779 {
4783 }
4784 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
4785 * The firmware seems to think that powering off is a wakeup event!
4786 * This routine turns off remote wakeup and everything else, on all ports.
4787 */
4789 {
4793 }
4795 /* Halt HC, turn off all ports, and let the BIOS use the companion controllers.
4796 * Must be called with interrupts enabled and the lock not held.
4797 */
4799 {
4806 }
4808 /* fotg210_shutdown kick in for silicon on any bus (not just pci, etc).
4809 * This forcibly disables dma and IRQs, helping kexec and other cases
4810 * where the next system software may expect clean state.
4811 */
4813 {
4825 }
4827 /* fotg210_work is called from some interrupts, timers, and so on.
4828 * it calls driver completion functions, after dropping fotg210->lock.
4829 */
4831 {
4832 /* another CPU may drop fotg210->lock during a schedule scan while
4833 * it reports urb completions. this flag guards against bogus
4834 * attempts at re-entrant schedule scanning.
4835 */
4839 }
4842 rescan:
4854 /* the IO watchdog guards against hardware or driver bugs that
4855 * misplace IRQs, and should let us run completely without IRQs.
4856 * such lossage has been observed on both VT6202 and VT8235.
4857 */
4859 }
4861 /* Called when the fotg210_hcd module is removed.
4862 */
4864 {
4869 /* no more interrupts ... */
4883 /* root hub is shut down separately (first, when possible) */
4889 #ifdef FOTG210_STATS
4895 #endif
4899 }
4901 /* one-time init, only for memory state */
4903 {
4905 u32 temp;
4907 u32 hcc_params;
4912 /*
4913 * keep io watchdog by default, those good HCDs could turn off it later
4914 */
4923 /*
4924 * by default set standard 80% (== 100 usec/uframe) max periodic
4925 * bandwidth as required by USB 2.0
4926 */
4929 /*
4930 * hw default: 1K periodic list heads, one per frame.
4931 * periodic_size can shrink by USBCMD update if hcc_params allows.
4932 */
4938 /* periodic schedule size can be smaller than default */
4951 }
4952 }
4957 /* controllers may cache some of the periodic schedule ... */
4960 /*
4961 * dedicate a qh for the async ring head, since we couldn't unlink
4962 * a 'real' qh without stopping the async schedule [4.8]. use it
4963 * as the 'reclamation list head' too.
4964 * its dummy is used in hw_alt_next of many tds, to prevent the qh
4965 * from automatically advancing to the next td after short reads.
4966 */
4976 /* clear interrupt enables, set irq latency */
4981 /* HW default park == 3, on hardware that supports it (like
4982 * NVidia and ALI silicon), maximizes throughput on the async
4983 * schedule by avoiding QH fetches between transfers.
4984 *
4985 * With fast usb storage devices and NForce2, "park" seems to
4986 * make problems: throughput reduction (!), data errors...
4987 */
4992 }
4994 }
4996 /* periodic schedule size can be smaller than default */
4999 }
5002 /* Accept arbitrarily long scatter-gather lists */
5006 }
5008 /* start HC running; it's halted, hcd_fotg210_init() has been run (once) */
5010 {
5012 u32 temp;
5013 u32 hcc_params;
5017 /* EHCI spec section 4.1 */
5024 /*
5025 * hcc_params controls whether fotg210->regs->segment must (!!!)
5026 * be used; it constrains QH/ITD/SITD and QTD locations.
5027 * dma_pool consistent memory always uses segment zero.
5028 * streaming mappings for I/O buffers, like pci_map_single(),
5029 * can return segments above 4GB, if the device allows.
5030 *
5031 * NOTE: the dma mask is visible through dev->dma_mask, so
5032 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
5033 * Scsi_Host.highmem_io, and so forth. It's readonly to all
5034 * host side drivers though.
5035 */
5038 /*
5039 * Philips, Intel, and maybe others need CMD_RUN before the
5040 * root hub will detect new devices (why?); NEC doesn't
5041 */
5047 /*
5048 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
5049 * are explicitly handed to companion controller(s), so no TT is
5050 * involved with the root hub. (Except where one is integrated,
5051 * and there's no companion controller unless maybe for USB OTG.)
5052 *
5053 * Turning on the CF flag will transfer ownership of all ports
5054 * from the companions to the EHCI controller. If any of the
5055 * companions are in the middle of a port reset at the time, it
5056 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
5057 * guarantees that no resets are in progress. After we set CF,
5058 * a short delay lets the hardware catch up; new resets shouldn't
5059 * be started before the port switching actions could complete.
5060 */
5063 /* unblock posted writes */
5079 /* GRR this is run-once init(), being done every time the HC starts.
5080 * So long as they're part of class devices, we can't do it init()
5081 * since the class device isn't created that early.
5082 */
5087 }
5090 {
5100 /* cache this readonly data; minimize chip reads */
5106 /* data structure init */
5118 }
5121 {
5130 /* e.g. cardbus physical eject */
5134 }
5136 /*
5137 * We don't use STS_FLR, but some controllers don't like it to
5138 * remain on, so mask it out along with the other status bits.
5139 */
5142 /* Shared IRQ? */
5147 }
5149 /* clear (just) interrupts */
5154 /* unrequested/ignored: Frame List Rollover */
5157 /* INT, ERR, and IAA interrupt rates can be throttled */
5159 /* normal [4.15.1.2] or error [4.15.1.1] completion */
5163 else
5166 }
5168 /* complete the unlinking of some qh [4.15.2.3] */
5171 /* Turn off the IAA watchdog */
5175 /*
5176 * Mild optimization: Allow another IAAD to reset the
5177 * hrtimer, if one occurs before the next expiration.
5178 * In theory we could always cancel the hrtimer, but
5179 * tests show that about half the time it will be reset
5180 * for some other event anyway.
5181 */
5185 /* guard against (alleged) silicon errata */
5193 }
5195 /* remote wakeup [4.3.1] */
5200 /* kick root hub later */
5203 /* resume root hub? */
5215 /* start 20 msec resume signaling from this port,
5216 * and make hub_wq collect PORT_STAT_C_SUSPEND to
5217 * stop that signaling. Use 5 ms extra for safety,
5218 * like usb_port_resume() does.
5219 */
5224 }
5225 }
5227 /* PCI errors [4.15.2.4] */
5232 dead:
5235 /* Don't let the controller do anything more */
5244 /* Handle completions when the controller stops */
5246 }
5254 }
5256 /* non-error returns are a promise to giveback() the urb later
5257 * we drop ownership so next owner (or urb unlink) can get it
5258 *
5259 * urb + dev is in hcd.self.controller.urb_list
5260 * we're queueing TDs onto software and hardware lists
5261 *
5262 * hcd-specific init for hcpriv hasn't been done yet
5263 *
5264 * NOTE: control, bulk, and interrupt share the same code to append TDs
5265 * to a (possibly active) QH, and the same QH scanning code.
5266 */
5268 gfp_t mem_flags)
5269 {
5277 /* qh_completions() code doesn't handle all the fault cases
5278 * in multi-TD control transfers. Even 1KB is rare anyway.
5279 */
5282 /* FALLTHROUGH */
5283 /* case PIPE_BULK: */
5296 }
5297 }
5299 /* remove from hardware lists
5300 * completions normally happen asynchronously
5301 */
5304 {
5316 /* case PIPE_CONTROL: */
5317 /* case PIPE_BULK:*/
5329 /* already started */
5332 /* QH might be waiting for a Clear-TT-Buffer */
5335 }
5354 }
5358 /* itd... */
5360 /* wait till next completion, do it then. */
5361 /* completion irqs can wait up to 1024 msec, */
5363 }
5364 done:
5367 }
5369 /* bulk qh holds the data toggle */
5373 {
5378 /* ASSERT: any requests/urbs are being unlinked */
5379 /* ASSERT: nobody can be submitting urbs for this any more */
5381 rescan:
5387 /* endpoints can be iso streams. for now, we don't
5388 * accelerate iso completions ... so spin a while.
5389 */
5396 /* BUG_ON(!list_empty(&stream->free_list)); */
5399 }
5410 /* periodic qh self-unlinks on empty, and a COMPLETING qh
5411 * may already be unlinked.
5412 */
5415 /* FALL THROUGH */
5418 idle_timeout:
5428 }
5429 /* fall through */
5431 /* caller was supposed to have unlinked any requests;
5432 * that's not our job. just leak this memory.
5433 */
5438 }
5439 done:
5442 }
5446 {
5460 /* For Bulk and Interrupt endpoints we maintain the toggle state
5461 * in the hardware; the toggle bits in udev aren't used at all.
5462 * When an endpoint is reset by usb_clear_halt() we must reset
5463 * the toggle bit in the QH.
5464 */
5472 /* The toggle value in the QH can't be updated
5473 * while the QH is active. Unlink it now;
5474 * re-linking will call qh_refresh().
5475 */
5478 else
5480 }
5481 }
5483 }
5486 {
5491 }
5493 /* The EHCI in ChipIdea HDRC cannot be a separate module or device,
5494 * because its registers (and irq) are shared between host/gadget/otg
5495 * functions and in order to facilitate role switching we cannot
5496 * give the fotg210 driver exclusive access to those.
5497 */
5507 /*
5508 * generic hardware linkage
5509 */
5513 /*
5514 * basic lifecycle operations
5515 */
5521 /*
5522 * managing i/o requests and associated device resources
5523 */
5529 /*
5530 * scheduling support
5531 */
5534 /*
5535 * root hub support
5536 */
5546 };
5549 {
5550 u32 value;
5559 }
5561 /**
5562 * fotg210_hcd_probe - initialize faraday FOTG210 HCDs
5563 *
5564 * Allocates basic resources for this USB host controller, and
5565 * then invokes the start() method for the HCD associated with it
5566 * through the hotplug entry's driver_data.
5567 */
5569 {
5587 }
5597 }
5606 }
5615 /* It's OK not to supply this clock */
5622 }
5624 /*
5625 * Percolate deferrals, for anything else,
5626 * just live without the clocking.
5627 */
5630 }
5642 }
5648 failed_dis_clk:
5651 failed_put_hcd:
5653 fail_create_hcd:
5656 }
5658 /**
5659 * fotg210_hcd_remove - shutdown processing for EHCI HCDs
5660 * @dev: USB Host Controller being removed
5661 *
5662 */
5664 {
5675 }
5677 #ifdef CONFIG_OF
5680 {},
5681 };
5683 #endif
5689 },
5692 };
5695 {
5705 pr_warn("Warning! fotg210_hcd should always be loaded before uhci_hcd and ohci_hcd, not after\n");
5719 clean:
5725 }
5729 {
5733 }