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net: DCB: Validate DCB_ATTR_DCB_BUFFER argument
[linux/fpc-iii.git] / drivers / usb / host / xhci-dbgcap.c
blob93e2cca5262d16ffbdc7c96586cff3d1eb397924
1 // SPDX-License-Identifier: GPL-2.0
2 /**
3 * xhci-dbgcap.c - xHCI debug capability support
4 *
5 * Copyright (C) 2017 Intel Corporation
6 *
7 * Author: Lu Baolu <baolu.lu@linux.intel.com>
8 */
9 #include <linux/dma-mapping.h>
10 #include <linux/slab.h>
11 #include <linux/nls.h>
12
13 #include "xhci.h"
14 #include "xhci-trace.h"
15 #include "xhci-dbgcap.h"
16
17 static inline void *
18 dbc_dma_alloc_coherent(struct xhci_hcd *xhci, size_t size,
19 dma_addr_t *dma_handle, gfp_t flags)
20 {
21 void *vaddr;
22
23 vaddr = dma_alloc_coherent(xhci_to_hcd(xhci)->self.sysdev,
24 size, dma_handle, flags);
25 return vaddr;
26 }
27
28 static inline void
29 dbc_dma_free_coherent(struct xhci_hcd *xhci, size_t size,
30 void *cpu_addr, dma_addr_t dma_handle)
31 {
32 if (cpu_addr)
33 dma_free_coherent(xhci_to_hcd(xhci)->self.sysdev,
34 size, cpu_addr, dma_handle);
35 }
36
37 static u32 xhci_dbc_populate_strings(struct dbc_str_descs *strings)
38 {
39 struct usb_string_descriptor *s_desc;
40 u32 string_length;
41
42 /* Serial string: */
43 s_desc = (struct usb_string_descriptor *)strings->serial;
44 utf8s_to_utf16s(DBC_STRING_SERIAL, strlen(DBC_STRING_SERIAL),
45 UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
46 DBC_MAX_STRING_LENGTH);
47
48 s_desc->bLength = (strlen(DBC_STRING_SERIAL) + 1) * 2;
49 s_desc->bDescriptorType = USB_DT_STRING;
50 string_length = s_desc->bLength;
51 string_length <<= 8;
52
53 /* Product string: */
54 s_desc = (struct usb_string_descriptor *)strings->product;
55 utf8s_to_utf16s(DBC_STRING_PRODUCT, strlen(DBC_STRING_PRODUCT),
56 UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
57 DBC_MAX_STRING_LENGTH);
58
59 s_desc->bLength = (strlen(DBC_STRING_PRODUCT) + 1) * 2;
60 s_desc->bDescriptorType = USB_DT_STRING;
61 string_length += s_desc->bLength;
62 string_length <<= 8;
63
64 /* Manufacture string: */
65 s_desc = (struct usb_string_descriptor *)strings->manufacturer;
66 utf8s_to_utf16s(DBC_STRING_MANUFACTURER,
67 strlen(DBC_STRING_MANUFACTURER),
68 UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
69 DBC_MAX_STRING_LENGTH);
70
71 s_desc->bLength = (strlen(DBC_STRING_MANUFACTURER) + 1) * 2;
72 s_desc->bDescriptorType = USB_DT_STRING;
73 string_length += s_desc->bLength;
74 string_length <<= 8;
75
76 /* String0: */
77 strings->string0[0] = 4;
78 strings->string0[1] = USB_DT_STRING;
79 strings->string0[2] = 0x09;
80 strings->string0[3] = 0x04;
81 string_length += 4;
82
83 return string_length;
84 }
85
86 static void xhci_dbc_init_contexts(struct xhci_hcd *xhci, u32 string_length)
87 {
88 struct xhci_dbc *dbc;
89 struct dbc_info_context *info;
90 struct xhci_ep_ctx *ep_ctx;
91 u32 dev_info;
92 dma_addr_t deq, dma;
93 unsigned int max_burst;
94
95 dbc = xhci->dbc;
96 if (!dbc)
97 return;
98
99 /* Populate info Context: */
100 info = (struct dbc_info_context *)dbc->ctx->bytes;
101 dma = dbc->string_dma;
102 info->string0 = cpu_to_le64(dma);
103 info->manufacturer = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH);
104 info->product = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 2);
105 info->serial = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 3);
106 info->length = cpu_to_le32(string_length);
107
108 /* Populate bulk out endpoint context: */
109 ep_ctx = dbc_bulkout_ctx(dbc);
110 max_burst = DBC_CTRL_MAXBURST(readl(&dbc->regs->control));
111 deq = dbc_bulkout_enq(dbc);
112 ep_ctx->ep_info = 0;
113 ep_ctx->ep_info2 = dbc_epctx_info2(BULK_OUT_EP, 1024, max_burst);
114 ep_ctx->deq = cpu_to_le64(deq | dbc->ring_out->cycle_state);
115
116 /* Populate bulk in endpoint context: */
117 ep_ctx = dbc_bulkin_ctx(dbc);
118 deq = dbc_bulkin_enq(dbc);
119 ep_ctx->ep_info = 0;
120 ep_ctx->ep_info2 = dbc_epctx_info2(BULK_IN_EP, 1024, max_burst);
121 ep_ctx->deq = cpu_to_le64(deq | dbc->ring_in->cycle_state);
122
123 /* Set DbC context and info registers: */
124 xhci_write_64(xhci, dbc->ctx->dma, &dbc->regs->dccp);
125
126 dev_info = cpu_to_le32((DBC_VENDOR_ID << 16) | DBC_PROTOCOL);
127 writel(dev_info, &dbc->regs->devinfo1);
128
129 dev_info = cpu_to_le32((DBC_DEVICE_REV << 16) | DBC_PRODUCT_ID);
130 writel(dev_info, &dbc->regs->devinfo2);
131 }
132
133 static void xhci_dbc_giveback(struct dbc_request *req, int status)
134 __releases(&dbc->lock)
135 __acquires(&dbc->lock)
136 {
137 struct dbc_ep *dep = req->dep;
138 struct xhci_dbc *dbc = dep->dbc;
139 struct xhci_hcd *xhci = dbc->xhci;
140 struct device *dev = xhci_to_hcd(dbc->xhci)->self.sysdev;
141
142 list_del_init(&req->list_pending);
143 req->trb_dma = 0;
144 req->trb = NULL;
145
146 if (req->status == -EINPROGRESS)
147 req->status = status;
148
149 trace_xhci_dbc_giveback_request(req);
150
151 dma_unmap_single(dev,
152 req->dma,
153 req->length,
154 dbc_ep_dma_direction(dep));
155
156 /* Give back the transfer request: */
157 spin_unlock(&dbc->lock);
158 req->complete(xhci, req);
159 spin_lock(&dbc->lock);
160 }
161
162 static void xhci_dbc_flush_single_request(struct dbc_request *req)
163 {
164 union xhci_trb *trb = req->trb;
165
166 trb->generic.field[0] = 0;
167 trb->generic.field[1] = 0;
168 trb->generic.field[2] = 0;
169 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
170 trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(TRB_TR_NOOP));
171
172 xhci_dbc_giveback(req, -ESHUTDOWN);
173 }
174
175 static void xhci_dbc_flush_endpoint_requests(struct dbc_ep *dep)
176 {
177 struct dbc_request *req, *tmp;
178
179 list_for_each_entry_safe(req, tmp, &dep->list_pending, list_pending)
180 xhci_dbc_flush_single_request(req);
181 }
182
183 static void xhci_dbc_flush_requests(struct xhci_dbc *dbc)
184 {
185 xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_OUT]);
186 xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_IN]);
187 }
188
189 struct dbc_request *
190 dbc_alloc_request(struct dbc_ep *dep, gfp_t gfp_flags)
191 {
192 struct dbc_request *req;
193
194 req = kzalloc(sizeof(*req), gfp_flags);
195 if (!req)
196 return NULL;
197
198 req->dep = dep;
199 INIT_LIST_HEAD(&req->list_pending);
200 INIT_LIST_HEAD(&req->list_pool);
201 req->direction = dep->direction;
202
203 trace_xhci_dbc_alloc_request(req);
204
205 return req;
206 }
207
208 void
209 dbc_free_request(struct dbc_ep *dep, struct dbc_request *req)
210 {
211 trace_xhci_dbc_free_request(req);
212
213 kfree(req);
214 }
215
216 static void
217 xhci_dbc_queue_trb(struct xhci_ring *ring, u32 field1,
218 u32 field2, u32 field3, u32 field4)
219 {
220 union xhci_trb *trb, *next;
221
222 trb = ring->enqueue;
223 trb->generic.field[0] = cpu_to_le32(field1);
224 trb->generic.field[1] = cpu_to_le32(field2);
225 trb->generic.field[2] = cpu_to_le32(field3);
226 trb->generic.field[3] = cpu_to_le32(field4);
227
228 trace_xhci_dbc_gadget_ep_queue(ring, &trb->generic);
229
230 ring->num_trbs_free--;
231 next = ++(ring->enqueue);
232 if (TRB_TYPE_LINK_LE32(next->link.control)) {
233 next->link.control ^= cpu_to_le32(TRB_CYCLE);
234 ring->enqueue = ring->enq_seg->trbs;
235 ring->cycle_state ^= 1;
236 }
237 }
238
239 static int xhci_dbc_queue_bulk_tx(struct dbc_ep *dep,
240 struct dbc_request *req)
241 {
242 u64 addr;
243 union xhci_trb *trb;
244 unsigned int num_trbs;
245 struct xhci_dbc *dbc = dep->dbc;
246 struct xhci_ring *ring = dep->ring;
247 u32 length, control, cycle;
248
249 num_trbs = count_trbs(req->dma, req->length);
250 WARN_ON(num_trbs != 1);
251 if (ring->num_trbs_free < num_trbs)
252 return -EBUSY;
253
254 addr = req->dma;
255 trb = ring->enqueue;
256 cycle = ring->cycle_state;
257 length = TRB_LEN(req->length);
258 control = TRB_TYPE(TRB_NORMAL) | TRB_IOC;
259
260 if (cycle)
261 control &= cpu_to_le32(~TRB_CYCLE);
262 else
263 control |= cpu_to_le32(TRB_CYCLE);
264
265 req->trb = ring->enqueue;
266 req->trb_dma = xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
267 xhci_dbc_queue_trb(ring,
268 lower_32_bits(addr),
269 upper_32_bits(addr),
270 length, control);
271
272 /*
273 * Add a barrier between writes of trb fields and flipping
274 * the cycle bit:
275 */
276 wmb();
277
278 if (cycle)
279 trb->generic.field[3] |= cpu_to_le32(TRB_CYCLE);
280 else
281 trb->generic.field[3] &= cpu_to_le32(~TRB_CYCLE);
282
283 writel(DBC_DOOR_BELL_TARGET(dep->direction), &dbc->regs->doorbell);
284
285 return 0;
286 }
287
288 static int
289 dbc_ep_do_queue(struct dbc_ep *dep, struct dbc_request *req)
290 {
291 int ret;
292 struct device *dev;
293 struct xhci_dbc *dbc = dep->dbc;
294 struct xhci_hcd *xhci = dbc->xhci;
295
296 dev = xhci_to_hcd(xhci)->self.sysdev;
297
298 if (!req->length || !req->buf)
299 return -EINVAL;
300
301 req->actual = 0;
302 req->status = -EINPROGRESS;
303
304 req->dma = dma_map_single(dev,
305 req->buf,
306 req->length,
307 dbc_ep_dma_direction(dep));
308 if (dma_mapping_error(dev, req->dma)) {
309 xhci_err(xhci, "failed to map buffer\n");
310 return -EFAULT;
311 }
312
313 ret = xhci_dbc_queue_bulk_tx(dep, req);
314 if (ret) {
315 xhci_err(xhci, "failed to queue trbs\n");
316 dma_unmap_single(dev,
317 req->dma,
318 req->length,
319 dbc_ep_dma_direction(dep));
320 return -EFAULT;
321 }
322
323 list_add_tail(&req->list_pending, &dep->list_pending);
324
325 return 0;
326 }
327
328 int dbc_ep_queue(struct dbc_ep *dep, struct dbc_request *req,
329 gfp_t gfp_flags)
330 {
331 unsigned long flags;
332 struct xhci_dbc *dbc = dep->dbc;
333 int ret = -ESHUTDOWN;
334
335 spin_lock_irqsave(&dbc->lock, flags);
336 if (dbc->state == DS_CONFIGURED)
337 ret = dbc_ep_do_queue(dep, req);
338 spin_unlock_irqrestore(&dbc->lock, flags);
339
340 mod_delayed_work(system_wq, &dbc->event_work, 0);
341
342 trace_xhci_dbc_queue_request(req);
343
344 return ret;
345 }
346
347 static inline void xhci_dbc_do_eps_init(struct xhci_hcd *xhci, bool direction)
348 {
349 struct dbc_ep *dep;
350 struct xhci_dbc *dbc = xhci->dbc;
351
352 dep = &dbc->eps[direction];
353 dep->dbc = dbc;
354 dep->direction = direction;
355 dep->ring = direction ? dbc->ring_in : dbc->ring_out;
356
357 INIT_LIST_HEAD(&dep->list_pending);
358 }
359
360 static void xhci_dbc_eps_init(struct xhci_hcd *xhci)
361 {
362 xhci_dbc_do_eps_init(xhci, BULK_OUT);
363 xhci_dbc_do_eps_init(xhci, BULK_IN);
364 }
365
366 static void xhci_dbc_eps_exit(struct xhci_hcd *xhci)
367 {
368 struct xhci_dbc *dbc = xhci->dbc;
369
370 memset(dbc->eps, 0, sizeof(struct dbc_ep) * ARRAY_SIZE(dbc->eps));
371 }
372
373 static int xhci_dbc_mem_init(struct xhci_hcd *xhci, gfp_t flags)
374 {
375 int ret;
376 dma_addr_t deq;
377 u32 string_length;
378 struct xhci_dbc *dbc = xhci->dbc;
379
380 /* Allocate various rings for events and transfers: */
381 dbc->ring_evt = xhci_ring_alloc(xhci, 1, 1, TYPE_EVENT, 0, flags);
382 if (!dbc->ring_evt)
383 goto evt_fail;
384
385 dbc->ring_in = xhci_ring_alloc(xhci, 1, 1, TYPE_BULK, 0, flags);
386 if (!dbc->ring_in)
387 goto in_fail;
388
389 dbc->ring_out = xhci_ring_alloc(xhci, 1, 1, TYPE_BULK, 0, flags);
390 if (!dbc->ring_out)
391 goto out_fail;
392
393 /* Allocate and populate ERST: */
394 ret = xhci_alloc_erst(xhci, dbc->ring_evt, &dbc->erst, flags);
395 if (ret)
396 goto erst_fail;
397
398 /* Allocate context data structure: */
399 dbc->ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
400 if (!dbc->ctx)
401 goto ctx_fail;
402
403 /* Allocate the string table: */
404 dbc->string_size = sizeof(struct dbc_str_descs);
405 dbc->string = dbc_dma_alloc_coherent(xhci,
406 dbc->string_size,
407 &dbc->string_dma,
408 flags);
409 if (!dbc->string)
410 goto string_fail;
411
412 /* Setup ERST register: */
413 writel(dbc->erst.erst_size, &dbc->regs->ersts);
414 xhci_write_64(xhci, dbc->erst.erst_dma_addr, &dbc->regs->erstba);
415 deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
416 dbc->ring_evt->dequeue);
417 xhci_write_64(xhci, deq, &dbc->regs->erdp);
418
419 /* Setup strings and contexts: */
420 string_length = xhci_dbc_populate_strings(dbc->string);
421 xhci_dbc_init_contexts(xhci, string_length);
422
423 xhci_dbc_eps_init(xhci);
424 dbc->state = DS_INITIALIZED;
425
426 return 0;
427
428 string_fail:
429 xhci_free_container_ctx(xhci, dbc->ctx);
430 dbc->ctx = NULL;
431 ctx_fail:
432 xhci_free_erst(xhci, &dbc->erst);
433 erst_fail:
434 xhci_ring_free(xhci, dbc->ring_out);
435 dbc->ring_out = NULL;
436 out_fail:
437 xhci_ring_free(xhci, dbc->ring_in);
438 dbc->ring_in = NULL;
439 in_fail:
440 xhci_ring_free(xhci, dbc->ring_evt);
441 dbc->ring_evt = NULL;
442 evt_fail:
443 return -ENOMEM;
444 }
445
446 static void xhci_dbc_mem_cleanup(struct xhci_hcd *xhci)
447 {
448 struct xhci_dbc *dbc = xhci->dbc;
449
450 if (!dbc)
451 return;
452
453 xhci_dbc_eps_exit(xhci);
454
455 if (dbc->string) {
456 dbc_dma_free_coherent(xhci,
457 dbc->string_size,
458 dbc->string, dbc->string_dma);
459 dbc->string = NULL;
460 }
461
462 xhci_free_container_ctx(xhci, dbc->ctx);
463 dbc->ctx = NULL;
464
465 xhci_free_erst(xhci, &dbc->erst);
466 xhci_ring_free(xhci, dbc->ring_out);
467 xhci_ring_free(xhci, dbc->ring_in);
468 xhci_ring_free(xhci, dbc->ring_evt);
469 dbc->ring_in = NULL;
470 dbc->ring_out = NULL;
471 dbc->ring_evt = NULL;
472 }
473
474 static int xhci_do_dbc_start(struct xhci_hcd *xhci)
475 {
476 int ret;
477 u32 ctrl;
478 struct xhci_dbc *dbc = xhci->dbc;
479
480 if (dbc->state != DS_DISABLED)
481 return -EINVAL;
482
483 writel(0, &dbc->regs->control);
484 ret = xhci_handshake(&dbc->regs->control,
485 DBC_CTRL_DBC_ENABLE,
486 0, 1000);
487 if (ret)
488 return ret;
489
490 ret = xhci_dbc_mem_init(xhci, GFP_ATOMIC);
491 if (ret)
492 return ret;
493
494 ctrl = readl(&dbc->regs->control);
495 writel(ctrl | DBC_CTRL_DBC_ENABLE | DBC_CTRL_PORT_ENABLE,
496 &dbc->regs->control);
497 ret = xhci_handshake(&dbc->regs->control,
498 DBC_CTRL_DBC_ENABLE,
499 DBC_CTRL_DBC_ENABLE, 1000);
500 if (ret)
501 return ret;
502
503 dbc->state = DS_ENABLED;
504
505 return 0;
506 }
507
508 static int xhci_do_dbc_stop(struct xhci_hcd *xhci)
509 {
510 struct xhci_dbc *dbc = xhci->dbc;
511
512 if (dbc->state == DS_DISABLED)
513 return -1;
514
515 writel(0, &dbc->regs->control);
516 dbc->state = DS_DISABLED;
517
518 return 0;
519 }
520
521 static int xhci_dbc_start(struct xhci_hcd *xhci)
522 {
523 int ret;
524 unsigned long flags;
525 struct xhci_dbc *dbc = xhci->dbc;
526
527 WARN_ON(!dbc);
528
529 pm_runtime_get_sync(xhci_to_hcd(xhci)->self.controller);
530
531 spin_lock_irqsave(&dbc->lock, flags);
532 ret = xhci_do_dbc_start(xhci);
533 spin_unlock_irqrestore(&dbc->lock, flags);
534
535 if (ret) {
536 pm_runtime_put(xhci_to_hcd(xhci)->self.controller);
537 return ret;
538 }
539
540 return mod_delayed_work(system_wq, &dbc->event_work, 1);
541 }
542
543 static void xhci_dbc_stop(struct xhci_hcd *xhci)
544 {
545 int ret;
546 unsigned long flags;
547 struct xhci_dbc *dbc = xhci->dbc;
548 struct dbc_port *port = &dbc->port;
549
550 WARN_ON(!dbc);
551
552 cancel_delayed_work_sync(&dbc->event_work);
553
554 if (port->registered)
555 xhci_dbc_tty_unregister_device(xhci);
556
557 spin_lock_irqsave(&dbc->lock, flags);
558 ret = xhci_do_dbc_stop(xhci);
559 spin_unlock_irqrestore(&dbc->lock, flags);
560
561 if (!ret) {
562 xhci_dbc_mem_cleanup(xhci);
563 pm_runtime_put_sync(xhci_to_hcd(xhci)->self.controller);
564 }
565 }
566
567 static void
568 dbc_handle_port_status(struct xhci_hcd *xhci, union xhci_trb *event)
569 {
570 u32 portsc;
571 struct xhci_dbc *dbc = xhci->dbc;
572
573 portsc = readl(&dbc->regs->portsc);
574 if (portsc & DBC_PORTSC_CONN_CHANGE)
575 xhci_info(xhci, "DbC port connect change\n");
576
577 if (portsc & DBC_PORTSC_RESET_CHANGE)
578 xhci_info(xhci, "DbC port reset change\n");
579
580 if (portsc & DBC_PORTSC_LINK_CHANGE)
581 xhci_info(xhci, "DbC port link status change\n");
582
583 if (portsc & DBC_PORTSC_CONFIG_CHANGE)
584 xhci_info(xhci, "DbC config error change\n");
585
586 /* Port reset change bit will be cleared in other place: */
587 writel(portsc & ~DBC_PORTSC_RESET_CHANGE, &dbc->regs->portsc);
588 }
589
590 static void dbc_handle_xfer_event(struct xhci_hcd *xhci, union xhci_trb *event)
591 {
592 struct dbc_ep *dep;
593 struct xhci_ring *ring;
594 int ep_id;
595 int status;
596 u32 comp_code;
597 size_t remain_length;
598 struct dbc_request *req = NULL, *r;
599
600 comp_code = GET_COMP_CODE(le32_to_cpu(event->generic.field[2]));
601 remain_length = EVENT_TRB_LEN(le32_to_cpu(event->generic.field[2]));
602 ep_id = TRB_TO_EP_ID(le32_to_cpu(event->generic.field[3]));
603 dep = (ep_id == EPID_OUT) ?
604 get_out_ep(xhci) : get_in_ep(xhci);
605 ring = dep->ring;
606
607 switch (comp_code) {
608 case COMP_SUCCESS:
609 remain_length = 0;
610 /* FALLTHROUGH */
611 case COMP_SHORT_PACKET:
612 status = 0;
613 break;
614 case COMP_TRB_ERROR:
615 case COMP_BABBLE_DETECTED_ERROR:
616 case COMP_USB_TRANSACTION_ERROR:
617 case COMP_STALL_ERROR:
618 xhci_warn(xhci, "tx error %d detected\n", comp_code);
619 status = -comp_code;
620 break;
621 default:
622 xhci_err(xhci, "unknown tx error %d\n", comp_code);
623 status = -comp_code;
624 break;
625 }
626
627 /* Match the pending request: */
628 list_for_each_entry(r, &dep->list_pending, list_pending) {
629 if (r->trb_dma == event->trans_event.buffer) {
630 req = r;
631 break;
632 }
633 }
634
635 if (!req) {
636 xhci_warn(xhci, "no matched request\n");
637 return;
638 }
639
640 trace_xhci_dbc_handle_transfer(ring, &req->trb->generic);
641
642 ring->num_trbs_free++;
643 req->actual = req->length - remain_length;
644 xhci_dbc_giveback(req, status);
645 }
646
647 static enum evtreturn xhci_dbc_do_handle_events(struct xhci_dbc *dbc)
648 {
649 dma_addr_t deq;
650 struct dbc_ep *dep;
651 union xhci_trb *evt;
652 u32 ctrl, portsc;
653 struct xhci_hcd *xhci = dbc->xhci;
654 bool update_erdp = false;
655
656 /* DbC state machine: */
657 switch (dbc->state) {
658 case DS_DISABLED:
659 case DS_INITIALIZED:
660
661 return EVT_ERR;
662 case DS_ENABLED:
663 portsc = readl(&dbc->regs->portsc);
664 if (portsc & DBC_PORTSC_CONN_STATUS) {
665 dbc->state = DS_CONNECTED;
666 xhci_info(xhci, "DbC connected\n");
667 }
668
669 return EVT_DONE;
670 case DS_CONNECTED:
671 ctrl = readl(&dbc->regs->control);
672 if (ctrl & DBC_CTRL_DBC_RUN) {
673 dbc->state = DS_CONFIGURED;
674 xhci_info(xhci, "DbC configured\n");
675 portsc = readl(&dbc->regs->portsc);
676 writel(portsc, &dbc->regs->portsc);
677 return EVT_GSER;
678 }
679
680 return EVT_DONE;
681 case DS_CONFIGURED:
682 /* Handle cable unplug event: */
683 portsc = readl(&dbc->regs->portsc);
684 if (!(portsc & DBC_PORTSC_PORT_ENABLED) &&
685 !(portsc & DBC_PORTSC_CONN_STATUS)) {
686 xhci_info(xhci, "DbC cable unplugged\n");
687 dbc->state = DS_ENABLED;
688 xhci_dbc_flush_requests(dbc);
689
690 return EVT_DISC;
691 }
692
693 /* Handle debug port reset event: */
694 if (portsc & DBC_PORTSC_RESET_CHANGE) {
695 xhci_info(xhci, "DbC port reset\n");
696 writel(portsc, &dbc->regs->portsc);
697 dbc->state = DS_ENABLED;
698 xhci_dbc_flush_requests(dbc);
699
700 return EVT_DISC;
701 }
702
703 /* Handle endpoint stall event: */
704 ctrl = readl(&dbc->regs->control);
705 if ((ctrl & DBC_CTRL_HALT_IN_TR) ||
706 (ctrl & DBC_CTRL_HALT_OUT_TR)) {
707 xhci_info(xhci, "DbC Endpoint stall\n");
708 dbc->state = DS_STALLED;
709
710 if (ctrl & DBC_CTRL_HALT_IN_TR) {
711 dep = get_in_ep(xhci);
712 xhci_dbc_flush_endpoint_requests(dep);
713 }
714
715 if (ctrl & DBC_CTRL_HALT_OUT_TR) {
716 dep = get_out_ep(xhci);
717 xhci_dbc_flush_endpoint_requests(dep);
718 }
719
720 return EVT_DONE;
721 }
722
723 /* Clear DbC run change bit: */
724 if (ctrl & DBC_CTRL_DBC_RUN_CHANGE) {
725 writel(ctrl, &dbc->regs->control);
726 ctrl = readl(&dbc->regs->control);
727 }
728
729 break;
730 case DS_STALLED:
731 ctrl = readl(&dbc->regs->control);
732 if (!(ctrl & DBC_CTRL_HALT_IN_TR) &&
733 !(ctrl & DBC_CTRL_HALT_OUT_TR) &&
734 (ctrl & DBC_CTRL_DBC_RUN)) {
735 dbc->state = DS_CONFIGURED;
736 break;
737 }
738
739 return EVT_DONE;
740 default:
741 xhci_err(xhci, "Unknown DbC state %d\n", dbc->state);
742 break;
743 }
744
745 /* Handle the events in the event ring: */
746 evt = dbc->ring_evt->dequeue;
747 while ((le32_to_cpu(evt->event_cmd.flags) & TRB_CYCLE) ==
748 dbc->ring_evt->cycle_state) {
749 /*
750 * Add a barrier between reading the cycle flag and any
751 * reads of the event's flags/data below:
752 */
753 rmb();
754
755 trace_xhci_dbc_handle_event(dbc->ring_evt, &evt->generic);
756
757 switch (le32_to_cpu(evt->event_cmd.flags) & TRB_TYPE_BITMASK) {
758 case TRB_TYPE(TRB_PORT_STATUS):
759 dbc_handle_port_status(xhci, evt);
760 break;
761 case TRB_TYPE(TRB_TRANSFER):
762 dbc_handle_xfer_event(xhci, evt);
763 break;
764 default:
765 break;
766 }
767
768 inc_deq(xhci, dbc->ring_evt);
769 evt = dbc->ring_evt->dequeue;
770 update_erdp = true;
771 }
772
773 /* Update event ring dequeue pointer: */
774 if (update_erdp) {
775 deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
776 dbc->ring_evt->dequeue);
777 xhci_write_64(xhci, deq, &dbc->regs->erdp);
778 }
779
780 return EVT_DONE;
781 }
782
783 static void xhci_dbc_handle_events(struct work_struct *work)
784 {
785 int ret;
786 enum evtreturn evtr;
787 struct xhci_dbc *dbc;
788 unsigned long flags;
789 struct xhci_hcd *xhci;
790
791 dbc = container_of(to_delayed_work(work), struct xhci_dbc, event_work);
792 xhci = dbc->xhci;
793
794 spin_lock_irqsave(&dbc->lock, flags);
795 evtr = xhci_dbc_do_handle_events(dbc);
796 spin_unlock_irqrestore(&dbc->lock, flags);
797
798 switch (evtr) {
799 case EVT_GSER:
800 ret = xhci_dbc_tty_register_device(xhci);
801 if (ret) {
802 xhci_err(xhci, "failed to alloc tty device\n");
803 break;
804 }
805
806 xhci_info(xhci, "DbC now attached to /dev/ttyDBC0\n");
807 break;
808 case EVT_DISC:
809 xhci_dbc_tty_unregister_device(xhci);
810 break;
811 case EVT_DONE:
812 break;
813 default:
814 xhci_info(xhci, "stop handling dbc events\n");
815 return;
816 }
817
818 mod_delayed_work(system_wq, &dbc->event_work, 1);
819 }
820
821 static void xhci_do_dbc_exit(struct xhci_hcd *xhci)
822 {
823 unsigned long flags;
824
825 spin_lock_irqsave(&xhci->lock, flags);
826 kfree(xhci->dbc);
827 xhci->dbc = NULL;
828 spin_unlock_irqrestore(&xhci->lock, flags);
829 }
830
831 static int xhci_do_dbc_init(struct xhci_hcd *xhci)
832 {
833 u32 reg;
834 struct xhci_dbc *dbc;
835 unsigned long flags;
836 void __iomem *base;
837 int dbc_cap_offs;
838
839 base = &xhci->cap_regs->hc_capbase;
840 dbc_cap_offs = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_DEBUG);
841 if (!dbc_cap_offs)
842 return -ENODEV;
843
844 dbc = kzalloc(sizeof(*dbc), GFP_KERNEL);
845 if (!dbc)
846 return -ENOMEM;
847
848 dbc->regs = base + dbc_cap_offs;
849
850 /* We will avoid using DbC in xhci driver if it's in use. */
851 reg = readl(&dbc->regs->control);
852 if (reg & DBC_CTRL_DBC_ENABLE) {
853 kfree(dbc);
854 return -EBUSY;
855 }
856
857 spin_lock_irqsave(&xhci->lock, flags);
858 if (xhci->dbc) {
859 spin_unlock_irqrestore(&xhci->lock, flags);
860 kfree(dbc);
861 return -EBUSY;
862 }
863 xhci->dbc = dbc;
864 spin_unlock_irqrestore(&xhci->lock, flags);
865
866 dbc->xhci = xhci;
867 INIT_DELAYED_WORK(&dbc->event_work, xhci_dbc_handle_events);
868 spin_lock_init(&dbc->lock);
869
870 return 0;
871 }
872
873 static ssize_t dbc_show(struct device *dev,
874 struct device_attribute *attr,
875 char *buf)
876 {
877 const char *p;
878 struct xhci_dbc *dbc;
879 struct xhci_hcd *xhci;
880
881 xhci = hcd_to_xhci(dev_get_drvdata(dev));
882 dbc = xhci->dbc;
883
884 switch (dbc->state) {
885 case DS_DISABLED:
886 p = "disabled";
887 break;
888 case DS_INITIALIZED:
889 p = "initialized";
890 break;
891 case DS_ENABLED:
892 p = "enabled";
893 break;
894 case DS_CONNECTED:
895 p = "connected";
896 break;
897 case DS_CONFIGURED:
898 p = "configured";
899 break;
900 case DS_STALLED:
901 p = "stalled";
902 break;
903 default:
904 p = "unknown";
905 }
906
907 return sprintf(buf, "%s\n", p);
908 }
909
910 static ssize_t dbc_store(struct device *dev,
911 struct device_attribute *attr,
912 const char *buf, size_t count)
913 {
914 struct xhci_hcd *xhci;
915
916 xhci = hcd_to_xhci(dev_get_drvdata(dev));
917
918 if (!strncmp(buf, "enable", 6))
919 xhci_dbc_start(xhci);
920 else if (!strncmp(buf, "disable", 7))
921 xhci_dbc_stop(xhci);
922 else
923 return -EINVAL;
924
925 return count;
926 }
927
928 static DEVICE_ATTR_RW(dbc);
929
930 int xhci_dbc_init(struct xhci_hcd *xhci)
931 {
932 int ret;
933 struct device *dev = xhci_to_hcd(xhci)->self.controller;
934
935 ret = xhci_do_dbc_init(xhci);
936 if (ret)
937 goto init_err3;
938
939 ret = xhci_dbc_tty_register_driver(xhci);
940 if (ret)
941 goto init_err2;
942
943 ret = device_create_file(dev, &dev_attr_dbc);
944 if (ret)
945 goto init_err1;
946
947 return 0;
948
949 init_err1:
950 xhci_dbc_tty_unregister_driver();
951 init_err2:
952 xhci_do_dbc_exit(xhci);
953 init_err3:
954 return ret;
955 }
956
957 void xhci_dbc_exit(struct xhci_hcd *xhci)
958 {
959 struct device *dev = xhci_to_hcd(xhci)->self.controller;
960
961 if (!xhci->dbc)
962 return;
963
964 device_remove_file(dev, &dev_attr_dbc);
965 xhci_dbc_tty_unregister_driver();
966 xhci_dbc_stop(xhci);
967 xhci_do_dbc_exit(xhci);
968 }
969
970 #ifdef CONFIG_PM
971 int xhci_dbc_suspend(struct xhci_hcd *xhci)
972 {
973 struct xhci_dbc *dbc = xhci->dbc;
974
975 if (!dbc)
976 return 0;
977
978 if (dbc->state == DS_CONFIGURED)
979 dbc->resume_required = 1;
980
981 xhci_dbc_stop(xhci);
982
983 return 0;
984 }
985
986 int xhci_dbc_resume(struct xhci_hcd *xhci)
987 {
988 int ret = 0;
989 struct xhci_dbc *dbc = xhci->dbc;
990
991 if (!dbc)
992 return 0;
993
994 if (dbc->resume_required) {
995 dbc->resume_required = 0;
996 xhci_dbc_start(xhci);
997 }
998
999 return ret;
1000 }
1001 #endif /* CONFIG_PM */
Linux with added FPC-III support