1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
2 -----------------------------------------------------------
4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
7 Required root node property:
9 compatible: should be "brcm,bcm63138"
11 An optional Boot lookup table Device Tree node is required for secondary CPU
12 initialization as well as a 'resets' phandle to the correct PMB controller as
13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
14 'enable-method' property.
16 Required properties for the Boot lookup table node:
17 - compatible: should be "brcm,bcm63138-bootlut"
18 - reg: register base address and length for the Boot Lookup table
20 Optional properties for the primary CPU node:
21 - enable-method: should be "brcm,bcm63138"
23 Optional properties for the secondary CPU node:
24 - enable-method: should be "brcm,bcm63138"
25 - resets: phandle to the relevant PMB controller, one integer indicating the internal
26 bus number, and a second integer indicating the address of the CPU in the PMB
33 compatible = "arm,cotex-a9";
36 enable-method = "brcm,bcm63138";
40 compatible = "arm,cortex-a9";
43 enable-method = "brcm,bcm63138";
48 bootlut: bootlut@8000 {
49 compatible = "brcm,bcm63138-bootlut";
56 Two nodes are required for software reboot: a timer node and a syscon-reboot node.
60 - compatible: Must be "brcm,bcm6328-timer", "syscon"
61 - reg: Register base address and length
65 See Documentation/devicetree/bindings/power/reset/syscon-reboot.txt for the
66 detailed list of properties, the two values defined below are specific to the
69 - offset: Should be 0x34 to denote the offset of the TIMER_WD_TIMER_RESET register
70 from the beginning of the TIMER block
71 - mask: Should be 1 for the SoftRst bit.
76 compatible = "brcm,bcm6328-timer", "syscon";
81 compatible = "syscon-reboot";