Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt

   1 Broadcom Northstar Plus SoC CPU Enable Method
   2 ---------------------------------------------
   3 This binding defines the enable method used for starting secondary
   4 CPU in the following Broadcom SoCs:
   5   BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312
   6
   7 The enable method is specified by defining the following required
   8 properties in the corresponding secondary "cpu" device tree node:
   9   - enable-method = "brcm,bcm-nsp-smp";
  10   - secondary-boot-reg = <...>;
  11
  12 The secondary-boot-reg property is a u32 value that specifies the
  13 physical address of the register which should hold the common
  14 entry point for a secondary CPU. This entry is cpu node specific
  15 and should be added per cpu. E.g., in case of NSP (BCM58625) which
  16 is a dual core CPU SoC, this entry should be added to cpu1 node.
  17
  18
  19 Example:
  20         cpus {
  21                 #address-cells = <1>;
  22                 #size-cells = <0>;
  23
  24                 cpu0: cpu@0 {
  25                         device_type = "cpu";
  26                         compatible = "arm,cortex-a9";
  27                         next-level-cache = <&L2>;
  28                         reg = <0>;
  29                 };
  30
  31                 cpu1: cpu@1 {
  32                         device_type = "cpu";
  33                         compatible = "arm,cortex-a9";
  34                         next-level-cache = <&L2>;
  35                         enable-method = "brcm,bcm-nsp-smp";
  36                         secondary-boot-reg = <0xffff042c>;
  37                         reg = <1>;
  38                 };
  39         };