1 Texas Instruments OMAP5 Display Subsystem
2 =========================================
4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
5 description about OMAP Display Subsystem bindings.
11 - compatible: "ti,omap5-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
21 - DSS Submodules: RFBI, DSI, HDMI
22 - Video port for DPI output
24 DPI Endpoint required properties:
25 - data-lines: number of lines used
32 - compatible: "ti,omap5-dispc"
33 - reg: address and length of the register space
34 - ti,hwmods: "dss_dispc"
35 - interrupts: the DISPC interrupt
36 - clocks: handle to fclk
44 - compatible: "ti,omap5-rfbi"
45 - reg: address and length of the register space
46 - ti,hwmods: "dss_rfbi"
47 - clocks: handles to fclk and iclk
48 - clock-names: "fck", "ick"
51 - Video port for RFBI output
52 - RFBI controlled peripherals
59 - compatible: "ti,omap5-dsi"
60 - reg: addresses and lengths of the register spaces for 'proto', 'phy' and 'pll'
61 - reg-names: "proto", "phy", "pll"
62 - interrupts: the DSI interrupt line
63 - ti,hwmods: "dss_dsi1" or "dss_dsi2"
64 - vdd-supply: power supply for DSI
65 - clocks: handles to fclk and pll clock
66 - clock-names: "fck", "sys_clk"
69 - Video port for DSI output
70 - DSI controlled peripherals
72 DSI Endpoint required properties:
73 - lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
81 - compatible: "ti,omap5-hdmi"
82 - reg: addresses and lengths of the register spaces for 'wp', 'pll', 'phy',
84 - reg-names: "wp", "pll", "phy", "core"
85 - interrupts: the HDMI interrupt line
86 - ti,hwmods: "dss_hdmi"
87 - vdda-supply: vdda power supply
88 - clocks: handles to fclk and pll clock
89 - clock-names: "fck", "sys_clk"
92 - Video port for HDMI output
94 HDMI Endpoint optional properties:
95 - lanes: list of 8 pin numbers for the HDMI lanes: CLK+, CLK-, D0+, D0-,
96 D1+, D1-, D2+, D2-. (default: 0,1,2,3,4,5,6,7)