1 I2C for Hisilicon hix5hd2 chipset platform
4 - compatible: Must be "hisilicon,hix5hd2-i2c"
5 - reg: physical base address of the controller and length of memory mapped
7 - interrupts: interrupt number to the cpu.
8 - #address-cells = <1>;
10 - clocks: phandles to input clocks.
13 - clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000
14 - Child nodes conforming to i2c bus binding
18 compatible = "hisilicon,hix5hd2-i2c";
19 reg = <0xf8b10000 0x1000>;
20 interrupts = <0 38 4>;
21 clocks = <&clock HIX5HD2_I2C0_RST>;