1 Freescale FlexTimer Module (FTM) PWM controller
3 The same FTM PWM device can have a different endianness on different SoCs. The
4 device tree provides a property to describing this so that an operating system
5 device driver can handle all variants of the device. Refer to the table below
6 for the endianness of the FTM PWM block as integrated into the existing SoCs:
8 SoC | FTM-PWM endianness
9 --------+-------------------
14 Please see ../regmap/regmap.txt for more detail about how to specify endian
19 - compatible: Should be "fsl,vf610-ftm-pwm".
20 - reg: Physical base address and length of the controller's registers
21 - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
23 - clock-names: Should include the following module clock source entries:
24 "ftm_sys" (module clock, also can be used as counter clock),
25 "ftm_ext" (external counter clock),
26 "ftm_fix" (fixed counter clock),
27 "ftm_cnt_clk_en" (external and fixed counter clock enable/disable).
28 - clocks: Must contain a phandle and clock specifier for each entry in
29 clock-names, please see clock/clock-bindings.txt for details of the property
31 - pinctrl-names: Must contain a "default" entry.
32 - pinctrl-NNN: One property must exist for each entry in pinctrl-names.
33 See pinctrl/pinctrl-bindings.txt for details of the property values.
34 - big-endian: Boolean property, required if the FTM PWM registers use a big-
35 endian rather than little-endian layout.
40 compatible = "fsl,vf610-ftm-pwm";
41 reg = <0x40038000 0x1000>;
43 clock-names = "ftm_sys", "ftm_ext",
44 "ftm_fix", "ftm_cnt_clk_en";
45 clocks = <&clks VF610_CLK_FTM0>,
46 <&clks VF610_CLK_FTM0_EXT_SEL>,
47 <&clks VF610_CLK_FTM0_FIX_SEL>,
48 <&clks VF610_CLK_FTM0_EXT_FIX_EN>;
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_pwm0_1>;