1 * Samsung's UART Controller
3 The Samsung's UART controller is used for interfacing SoC with serial
7 - compatible: should be one of following:
8 - "samsung,exynos4210-uart" - Exynos4210 SoC,
9 - "samsung,s3c2410-uart" - compatible with ports present on S3C2410 SoC,
10 - "samsung,s3c2412-uart" - compatible with ports present on S3C2412 SoC,
11 - "samsung,s3c2440-uart" - compatible with ports present on S3C2440 SoC,
12 - "samsung,s3c6400-uart" - compatible with ports present on S3C6400 SoC,
13 - "samsung,s5pv210-uart" - compatible with ports present on S5PV210 SoC.
15 - reg: base physical address of the controller and length of memory mapped
18 - interrupts: a single interrupt signal to SoC interrupt controller,
19 according to interrupt bindings documentation [1].
21 - clock-names: input names of clocks used by the controller:
22 - "uart" - controller bus clock,
23 - "clk_uart_baudN" - Nth baud base clock input (N = 0, 1, ...),
24 according to SoC User's Manual (only N = 0 is allowedfor SoCs without
25 internal baud clock mux).
26 - clocks: phandles and specifiers for all clocks specified in "clock-names"
27 property, in the same order, according to clock bindings documentation [2].
29 [1] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
30 [2] Documentation/devicetree/bindings/clock/clock-bindings.txt
33 - samsung,uart-fifosize: The fifo size supported by the UART channel
35 Note: Each Samsung UART should have an alias correctly numbered in the
36 "aliases" node, according to serialN format, where N is the port number
37 (non-negative decimal integer) as specified by User's Manual of respective
48 uart1: serial@7f005400 {
49 compatible = "samsung,s3c6400-uart";
50 reg = <0x7f005400 0x100>;
51 interrupt-parent = <&vic1>;
53 clock-names = "uart", "clk_uart_baud2",
55 clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
57 samsung,uart-fifosize = <16>;