1 Qualcomm Shared Memory Point 2 Point binding
3 The Shared Memory Point to Point (SMP2P) protocol facilitates communication of
4 a single 32-bit value between two processors. Each value has a single writer
5 (the local side) and a single reader (the remote side). Values are uniquely
6 identified in the system by the directed edge (local processor ID to remote
7 processor ID) and a string identifier.
12 Definition: must be one of:
17 Value type: <prop-encoded-array>
18 Definition: one entry specifying the smp2p notification interrupt
22 Value type: <prop-encoded-array>
23 Definition: three entries specifying the outgoing ipc bit used for
24 signaling the remote end of the smp2p edge:
25 - phandle to a syscon node representing the apcs registers
26 - u32 representing offset to the register within the syscon
27 - u32 representing the ipc bit within the register
31 Value type: <u32 array>
32 Definition: two identifiers of the inbound and outbound smem items used
38 Definition: specifies the identfier of the local endpoint of this edge
43 Definition: specifies the identfier of the remote endpoint of this edge
46 Each SMP2P pair contain a set of inbound and outbound entries, these are
47 described in subnodes of the smp2p device node. The node names are not
53 Definition: specifies the name of this entry, for inbound entries this
54 will be used to match against the remotely allocated entry
55 and for outbound entries this name is used for allocating
58 - interrupt-controller:
59 Usage: required for incoming entries
61 Definition: marks the entry as inbound; the node should be specified
62 as a two cell interrupt-controller as defined in
63 "../interrupt-controller/interrupts.txt"
64 If not specified this node will denote the outgoing entry
67 Usage: required for incoming entries
69 Definition: must be 2 - denoting the bit in the entry and IRQ flags
72 Usage: required for outgoing entries
74 Definition: must be 1 - denoting the bit in the entry
77 The following example shows the SMP2P setup with the wireless processor,
78 defined from the 8974 apps processor's point-of-view. It encompasses one
79 inbound and one outbound entry:
82 compatible = "qcom,smp2p";
83 qcom,smem = <431>, <451>;
85 interrupts = <0 143 1>;
87 qcom,ipc = <&apcs 8 18>;
90 qcom,remote-pid = <4>;
92 wcnss_smp2p_out: master-kernel {
93 qcom,entry-name = "master-kernel";
95 #qcom,state-cells = <1>;
98 wcnss_smp2p_in: slave-kernel {
99 qcom,entry-name = "slave-kernel";
101 interrupt-controller;
102 #interrupt-cells = <2>;