Documentation/devicetree/bindings/spi/qcom,spi-qup.txt

   1 Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
   2
   3 The QUP core is an AHB slave that provides a common data path (an output FIFO
   4 and an input FIFO) for serial peripheral interface (SPI) mini-core.
   5
   6 SPI in master mode supports up to 50MHz, up to four chip selects, programmable
   7 data path from 4 bits to 32 bits and numerous protocol variants.
   8
   9 Required properties:
  10 - compatible:     Should contain:
  11                   "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.
  12                   "qcom,spi-qup-v2.1.1" for 8974 and later
  13                   "qcom,spi-qup-v2.2.1" for 8974 v2 and later.
  14
  15 - reg:            Should contain base register location and length
  16 - interrupts:     Interrupt number used by this controller
  17
  18 - clocks:         Should contain the core clock and the AHB clock.
  19 - clock-names:    Should be "core" for the core clock and "iface" for the
  20                   AHB clock.
  21
  22 - #address-cells: Number of cells required to define a chip select
  23                   address on the SPI bus. Should be set to 1.
  24 - #size-cells:    Should be zero.
  25
  26 Optional properties:
  27 - spi-max-frequency: Specifies maximum SPI clock frequency,
  28                      Units - Hz. Definition as per
  29                      Documentation/devicetree/bindings/spi/spi-bus.txt
  30 - num-cs:       total number of chipselects
  31 - cs-gpios:     should specify GPIOs used for chipselects.
  32                 The gpios will be referred to as reg = <index> in the SPI child
  33                 nodes.  If unspecified, a single SPI device without a chip
  34                 select can be used.
  35
  36 - dmas:         Two DMA channel specifiers following the convention outlined
  37                 in bindings/dma/dma.txt
  38 - dma-names:    Names for the dma channels, if present. There must be at
  39                 least one channel named "tx" for transmit and named "rx" for
  40                 receive.
  41
  42 SPI slave nodes must be children of the SPI master node and can contain
  43 properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
  44
  45 Example:
  46
  47         spi_8: spi@f9964000 { /* BLSP2 QUP2 */
  48
  49                 compatible = "qcom,spi-qup-v2";
  50                 #address-cells = <1>;
  51                 #size-cells = <0>;
  52                 reg = <0xf9964000 0x1000>;
  53                 interrupts = <0 102 0>;
  54                 spi-max-frequency = <19200000>;
  55
  56                 clocks = <&gcc GCC_BLSP2_QUP2_SPI_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
  57                 clock-names = "core", "iface";
  58
  59                 dmas = <&blsp1_bam 13>, <&blsp1_bam 12>;
  60                 dma-names = "rx", "tx";
  61
  62                 pinctrl-names = "default";
  63                 pinctrl-0 = <&spi8_default>;
  64
  65                 device@0 {
  66                         compatible = "arm,pl022-dummy";
  67                         #address-cells = <1>;
  68                         #size-cells = <1>;
  69                         reg = <0>; /* Chip select 0 */
  70                         spi-max-frequency = <19200000>;
  71                         spi-cpol;
  72                 };
  73
  74                 device@1 {
  75                         compatible = "arm,pl022-dummy";
  76                         #address-cells = <1>;
  77                         #size-cells = <1>;
  78                         reg = <1>; /* Chip select 1 */
  79                         spi-max-frequency = <9600000>;
  80                         spi-cpha;
  81                 };
  82
  83                 device@2 {
  84                         compatible = "arm,pl022-dummy";
  85                         #address-cells = <1>;
  86                         #size-cells = <1>;
  87                         reg = <2>; /* Chip select 2 */
  88                         spi-max-frequency = <19200000>;
  89                         spi-cpol;
  90                         spi-cpha;
  91                 };
  92
  93                 device@3 {
  94                         compatible = "arm,pl022-dummy";
  95                         #address-cells = <1>;
  96                         #size-cells = <1>;
  97                         reg = <3>; /* Chip select 3 */
  98                         spi-max-frequency = <19200000>;
  99                         spi-cpol;
 100                         spi-cpha;
 101                         spi-cs-high;
 102                 };
 103         };