3 This describes the device tree binding for the Mediatek thermal controller
4 which measures the on-SoC temperatures. This device does not have its own ADC,
5 instead it directly controls the AUXADC via AHB bus accesses. For this reason
6 this device needs phandles to the AUXADC. Also it controls a mux in the
7 apmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS
11 - compatible: "mediatek,mt8173-thermal"
12 - reg: Address range of the thermal controller
13 - interrupts: IRQ for the thermal controller
14 - clocks, clock-names: Clocks needed for the thermal controller. required
16 "therm": Main clock needed for register access
17 "auxadc": The AUXADC clock
18 - resets: Reference to the reset controller controlling the thermal controller.
19 - mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses
20 - mediatek,apmixedsys: A phandle to the APMIXEDSYS controller.
21 - #thermal-sensor-cells : Should be 0. See ./thermal.txt for a description.
24 - nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
25 unspecified default values shall be used.
26 - nvmem-cell-names: Should be "calibration-data"
30 thermal: thermal@1100b000 {
31 #thermal-sensor-cells = <1>;
32 compatible = "mediatek,mt8173-thermal";
33 reg = <0 0x1100b000 0 0x1000>;
34 interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
35 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
36 clock-names = "therm", "auxadc";
37 resets = <&pericfg MT8173_PERI_THERM_SW_RST>;
38 reset-names = "therm";
39 mediatek,auxadc = <&auxadc>;
40 mediatek,apmixedsys = <&apmixedsys>;
41 nvmem-cells = <&thermal_calibration_data>;
42 nvmem-cell-names = "calibration-data";