1 Xilinx AXI/PLB soft-core watchdog Device Tree Bindings
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5 - compatible : Should be "xlnx,xps-timebase-wdt-1.00.a" or
6 "xlnx,xps-timebase-wdt-1.01.a".
7 - reg : Physical base address and size
10 - clock-frequency : Frequency of clock in Hz
11 - xlnx,wdt-enable-once : 0 - Watchdog can be restarted
12 1 - Watchdog can be enabled just once
13 - xlnx,wdt-interval : Watchdog timeout interval in 2^<val> clock cycles,
14 <val> is integer from 8 to 31.
17 axi-timebase-wdt@40100000 {
18 clock-frequency = <50000000>;
19 compatible = "xlnx,xps-timebase-wdt-1.00.a";
20 reg = <0x40100000 0x10000>;
21 xlnx,wdt-enable-once = <0x0>;
22 xlnx,wdt-interval = <0x1b>;