2 * Hisilicon clock driver
4 * Copyright (c) 2012-2013 Hisilicon Limited.
5 * Copyright (c) 2012-2013 Linaro Limited.
7 * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
8 * Xin Li <li.xin@linaro.org>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
26 #include <linux/kernel.h>
27 #include <linux/clkdev.h>
28 #include <linux/clk-provider.h>
29 #include <linux/delay.h>
32 #include <linux/of_address.h>
33 #include <linux/of_device.h>
34 #include <linux/slab.h>
38 static DEFINE_SPINLOCK(hisi_clk_lock
);
40 struct hisi_clock_data __init
*hisi_clk_init(struct device_node
*np
,
43 struct hisi_clock_data
*clk_data
;
44 struct clk
**clk_table
;
47 base
= of_iomap(np
, 0);
49 pr_err("%s: failed to map clock registers\n", __func__
);
53 clk_data
= kzalloc(sizeof(*clk_data
), GFP_KERNEL
);
55 pr_err("%s: could not allocate clock data\n", __func__
);
58 clk_data
->base
= base
;
60 clk_table
= kzalloc(sizeof(struct clk
*) * nr_clks
, GFP_KERNEL
);
62 pr_err("%s: could not allocate clock lookup table\n", __func__
);
65 clk_data
->clk_data
.clks
= clk_table
;
66 clk_data
->clk_data
.clk_num
= nr_clks
;
67 of_clk_add_provider(np
, of_clk_src_onecell_get
, &clk_data
->clk_data
);
75 void __init
hisi_clk_register_fixed_rate(struct hisi_fixed_rate_clock
*clks
,
76 int nums
, struct hisi_clock_data
*data
)
81 for (i
= 0; i
< nums
; i
++) {
82 clk
= clk_register_fixed_rate(NULL
, clks
[i
].name
,
87 pr_err("%s: failed to register clock %s\n",
88 __func__
, clks
[i
].name
);
91 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
95 void __init
hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock
*clks
,
97 struct hisi_clock_data
*data
)
102 for (i
= 0; i
< nums
; i
++) {
103 clk
= clk_register_fixed_factor(NULL
, clks
[i
].name
,
105 clks
[i
].flags
, clks
[i
].mult
,
108 pr_err("%s: failed to register clock %s\n",
109 __func__
, clks
[i
].name
);
112 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
116 void __init
hisi_clk_register_mux(struct hisi_mux_clock
*clks
,
117 int nums
, struct hisi_clock_data
*data
)
120 void __iomem
*base
= data
->base
;
123 for (i
= 0; i
< nums
; i
++) {
124 u32 mask
= BIT(clks
[i
].width
) - 1;
126 clk
= clk_register_mux_table(NULL
, clks
[i
].name
,
127 clks
[i
].parent_names
,
128 clks
[i
].num_parents
, clks
[i
].flags
,
129 base
+ clks
[i
].offset
, clks
[i
].shift
,
130 mask
, clks
[i
].mux_flags
,
131 clks
[i
].table
, &hisi_clk_lock
);
133 pr_err("%s: failed to register clock %s\n",
134 __func__
, clks
[i
].name
);
139 clk_register_clkdev(clk
, clks
[i
].alias
, NULL
);
141 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
145 void __init
hisi_clk_register_divider(struct hisi_divider_clock
*clks
,
146 int nums
, struct hisi_clock_data
*data
)
149 void __iomem
*base
= data
->base
;
152 for (i
= 0; i
< nums
; i
++) {
153 clk
= clk_register_divider_table(NULL
, clks
[i
].name
,
156 base
+ clks
[i
].offset
,
157 clks
[i
].shift
, clks
[i
].width
,
162 pr_err("%s: failed to register clock %s\n",
163 __func__
, clks
[i
].name
);
168 clk_register_clkdev(clk
, clks
[i
].alias
, NULL
);
170 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
174 void __init
hisi_clk_register_gate(struct hisi_gate_clock
*clks
,
175 int nums
, struct hisi_clock_data
*data
)
178 void __iomem
*base
= data
->base
;
181 for (i
= 0; i
< nums
; i
++) {
182 clk
= clk_register_gate(NULL
, clks
[i
].name
,
185 base
+ clks
[i
].offset
,
190 pr_err("%s: failed to register clock %s\n",
191 __func__
, clks
[i
].name
);
196 clk_register_clkdev(clk
, clks
[i
].alias
, NULL
);
198 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
202 void __init
hisi_clk_register_gate_sep(struct hisi_gate_clock
*clks
,
203 int nums
, struct hisi_clock_data
*data
)
206 void __iomem
*base
= data
->base
;
209 for (i
= 0; i
< nums
; i
++) {
210 clk
= hisi_register_clkgate_sep(NULL
, clks
[i
].name
,
213 base
+ clks
[i
].offset
,
218 pr_err("%s: failed to register clock %s\n",
219 __func__
, clks
[i
].name
);
224 clk_register_clkdev(clk
, clks
[i
].alias
, NULL
);
226 data
->clk_data
.clks
[clks
[i
].id
] = clk
;
230 void __init
hi6220_clk_register_divider(struct hi6220_divider_clock
*clks
,
231 int nums
, struct hisi_clock_data
*data
)
234 void __iomem
*base
= data
->base
;
237 for (i
= 0; i
< nums
; i
++) {
238 clk
= hi6220_register_clkdiv(NULL
, clks
[i
].name
,
241 base
+ clks
[i
].offset
,
247 pr_err("%s: failed to register clock %s\n",
248 __func__
, clks
[i
].name
);
253 clk_register_clkdev(clk
, clks
[i
].alias
, NULL
);
255 data
->clk_data
.clks
[clks
[i
].id
] = clk
;