2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include <linux/clk.h>
18 #include <linux/clkdev.h>
19 #include <linux/clk-provider.h>
20 #include <linux/slab.h>
21 #include <linux/spinlock.h>
22 #include <linux/of_address.h>
24 #define SUN8I_MBUS_ENABLE 31
25 #define SUN8I_MBUS_MUX_SHIFT 24
26 #define SUN8I_MBUS_MUX_MASK 0x3
27 #define SUN8I_MBUS_DIV_SHIFT 0
28 #define SUN8I_MBUS_DIV_WIDTH 3
29 #define SUN8I_MBUS_MAX_PARENTS 4
31 static DEFINE_SPINLOCK(sun8i_a23_mbus_lock
);
33 static void __init
sun8i_a23_mbus_setup(struct device_node
*node
)
35 int num_parents
= of_clk_get_parent_count(node
);
37 const char *clk_name
= node
->name
;
39 struct clk_divider
*div
;
40 struct clk_gate
*gate
;
46 parents
= kcalloc(num_parents
, sizeof(*parents
), GFP_KERNEL
);
50 reg
= of_io_request_and_map(node
, 0, of_node_full_name(node
));
52 pr_err("Could not get registers for sun8i-mbus-clk\n");
53 goto err_free_parents
;
56 div
= kzalloc(sizeof(*div
), GFP_KERNEL
);
60 mux
= kzalloc(sizeof(*mux
), GFP_KERNEL
);
64 gate
= kzalloc(sizeof(*gate
), GFP_KERNEL
);
68 of_property_read_string(node
, "clock-output-names", &clk_name
);
69 of_clk_parent_fill(node
, parents
, num_parents
);
72 gate
->bit_idx
= SUN8I_MBUS_ENABLE
;
73 gate
->lock
= &sun8i_a23_mbus_lock
;
76 div
->shift
= SUN8I_MBUS_DIV_SHIFT
;
77 div
->width
= SUN8I_MBUS_DIV_WIDTH
;
78 div
->lock
= &sun8i_a23_mbus_lock
;
81 mux
->shift
= SUN8I_MBUS_MUX_SHIFT
;
82 mux
->mask
= SUN8I_MBUS_MUX_MASK
;
83 mux
->lock
= &sun8i_a23_mbus_lock
;
85 clk
= clk_register_composite(NULL
, clk_name
, parents
, num_parents
,
86 &mux
->hw
, &clk_mux_ops
,
87 &div
->hw
, &clk_divider_ops
,
88 &gate
->hw
, &clk_gate_ops
,
93 err
= of_clk_add_provider(node
, of_clk_src_simple_get
, clk
);
95 goto err_unregister_clk
;
97 kfree(parents
); /* parents is deep copied */
98 /* The MBUS clocks needs to be always enabled */
100 clk_prepare_enable(clk
);
105 /* TODO: The composite clock stuff will leak a bit here. */
115 of_address_to_resource(node
, 0, &res
);
116 release_mem_region(res
.start
, resource_size(&res
));
120 CLK_OF_DECLARE(sun8i_a23_mbus
, "allwinner,sun8i-a23-mbus-clk", sun8i_a23_mbus_setup
);