3 bool "Hardware crypto devices"
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
9 If you say N, all options in this submenu will be skipped and disabled.
13 config CRYPTO_DEV_PADLOCK
14 tristate "Support for VIA PadLock ACE"
15 depends on X86 && !UML
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
22 The instructions are used only when the CPU supports them.
23 Otherwise software encryption is used.
25 config CRYPTO_DEV_PADLOCK_AES
26 tristate "PadLock driver for AES algorithm"
27 depends on CRYPTO_DEV_PADLOCK
28 select CRYPTO_BLKCIPHER
31 Use VIA PadLock for AES algorithm.
33 Available in VIA C3 and newer CPUs.
35 If unsure say M. The compiled module will be
38 config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
45 Use VIA PadLock for SHA1/SHA256 algorithms.
47 Available in VIA C7 and newer processors.
49 If unsure say M. The compiled module will be
52 config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
54 depends on X86_32 && PCI
56 select CRYPTO_BLKCIPHER
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
59 engine for the CryptoAPI AES algorithm.
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
65 tristate "Support for PCI-attached cryptographic adapters"
69 Select this option if you want to use a PCI-attached cryptographic
71 + PCI Cryptographic Accelerator (PCICA)
72 + PCI Cryptographic Coprocessor (PCICC)
73 + PCI-X Cryptographic Coprocessor (PCIXCC)
74 + Crypto Express2 Coprocessor (CEX2C)
75 + Crypto Express2 Accelerator (CEX2A)
76 + Crypto Express3 Coprocessor (CEX3C)
77 + Crypto Express3 Accelerator (CEX3A)
79 config CRYPTO_SHA1_S390
80 tristate "SHA1 digest algorithm"
84 This is the s390 hardware accelerated implementation of the
85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
87 It is available as of z990.
89 config CRYPTO_SHA256_S390
90 tristate "SHA256 digest algorithm"
94 This is the s390 hardware accelerated implementation of the
95 SHA256 secure hash standard (DFIPS 180-2).
97 It is available as of z9.
99 config CRYPTO_SHA512_S390
100 tristate "SHA384 and SHA512 digest algorithm"
104 This is the s390 hardware accelerated implementation of the
105 SHA512 secure hash standard.
107 It is available as of z10.
109 config CRYPTO_DES_S390
110 tristate "DES and Triple DES cipher algorithms"
113 select CRYPTO_BLKCIPHER
116 This is the s390 hardware accelerated implementation of the
117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
119 As of z990 the ECB and CBC mode are hardware accelerated.
120 As of z196 the CTR mode is hardware accelerated.
122 config CRYPTO_AES_S390
123 tristate "AES cipher algorithms"
126 select CRYPTO_BLKCIPHER
128 This is the s390 hardware accelerated implementation of the
129 AES cipher algorithms (FIPS-197).
131 As of z9 the ECB and CBC modes are hardware accelerated
133 As of z10 the ECB and CBC modes are hardware accelerated
134 for all AES key sizes.
135 As of z196 the CTR mode is hardware accelerated for all AES
136 key sizes and XTS mode is hardware accelerated for 256 and
140 tristate "Pseudo random number generator device driver"
144 Select this option if you want to use the s390 pseudo random number
145 generator. The PRNG is part of the cryptographic processor functions
146 and uses triple-DES to generate secure random numbers like the
147 ANSI X9.17 standard. User-space programs access the
148 pseudo-random-number device through the char device /dev/prandom.
150 It is available as of z9.
152 config CRYPTO_GHASH_S390
153 tristate "GHASH digest algorithm"
157 This is the s390 hardware accelerated implementation of the
158 GHASH message digest algorithm for GCM (Galois/Counter Mode).
160 It is available as of z196.
162 config CRYPTO_DEV_MV_CESA
163 tristate "Marvell's Cryptographic Engine"
164 depends on PLAT_ORION
166 select CRYPTO_BLKCIPHER
170 This driver allows you to utilize the Cryptographic Engines and
171 Security Accelerator (CESA) which can be found on the Marvell Orion
172 and Kirkwood SoCs, such as QNAP's TS-209.
174 Currently the driver supports AES in ECB and CBC mode without DMA.
176 config CRYPTO_DEV_MARVELL_CESA
177 tristate "New Marvell's Cryptographic Engine driver"
178 depends on PLAT_ORION || ARCH_MVEBU
181 select CRYPTO_BLKCIPHER
185 This driver allows you to utilize the Cryptographic Engines and
186 Security Accelerator (CESA) which can be found on the Armada 370.
187 This driver supports CPU offload through DMA transfers.
189 This driver is aimed at replacing the mv_cesa driver. This will only
190 happen once it has received proper testing.
192 config CRYPTO_DEV_NIAGARA2
193 tristate "Niagara2 Stream Processing Unit driver"
195 select CRYPTO_BLKCIPHER
202 Each core of a Niagara2 processor contains a Stream
203 Processing Unit, which itself contains several cryptographic
204 sub-units. One set provides the Modular Arithmetic Unit,
205 used for SSL offload. The other set provides the Cipher
206 Group, which can perform encryption, decryption, hashing,
207 checksumming, and raw copies.
209 config CRYPTO_DEV_HIFN_795X
210 tristate "Driver HIFN 795x crypto accelerator chips"
212 select CRYPTO_BLKCIPHER
213 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
215 depends on !ARCH_DMA_ADDR_T_64BIT
217 This option allows you to have support for HIFN 795x crypto adapters.
219 config CRYPTO_DEV_HIFN_795X_RNG
220 bool "HIFN 795x random number generator"
221 depends on CRYPTO_DEV_HIFN_795X
223 Select this option if you want to enable the random number generator
224 on the HIFN 795x crypto adapters.
226 source drivers/crypto/caam/Kconfig
228 config CRYPTO_DEV_TALITOS
229 tristate "Talitos Freescale Security Engine (SEC)"
231 select CRYPTO_AUTHENC
232 select CRYPTO_BLKCIPHER
237 Say 'Y' here to use the Freescale Security Engine (SEC)
238 to offload cryptographic algorithm computation.
240 The Freescale SEC is present on PowerQUICC 'E' processors, such
241 as the MPC8349E and MPC8548E.
243 To compile this driver as a module, choose M here: the module
244 will be called talitos.
246 config CRYPTO_DEV_TALITOS1
247 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
248 depends on CRYPTO_DEV_TALITOS
249 depends on PPC_8xx || PPC_82xx
252 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
253 found on MPC82xx or the Freescale Security Engine (SEC Lite)
254 version 1.2 found on MPC8xx
256 config CRYPTO_DEV_TALITOS2
257 bool "SEC2+ (SEC version 2.0 or upper)"
258 depends on CRYPTO_DEV_TALITOS
259 default y if !PPC_8xx
261 Say 'Y' here to use the Freescale Security Engine (SEC)
262 version 2 and following as found on MPC83xx, MPC85xx, etc ...
264 config CRYPTO_DEV_IXP4XX
265 tristate "Driver for IXP4xx crypto hardware acceleration"
266 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
269 select CRYPTO_AUTHENC
270 select CRYPTO_BLKCIPHER
272 Driver for the IXP4xx NPE crypto engine.
274 config CRYPTO_DEV_PPC4XX
275 tristate "Driver AMCC PPC4xx crypto accelerator"
276 depends on PPC && 4xx
278 select CRYPTO_BLKCIPHER
280 This option allows you to have support for AMCC crypto acceleration.
282 config CRYPTO_DEV_OMAP_SHAM
283 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
284 depends on ARCH_OMAP2PLUS
291 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
292 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
294 config CRYPTO_DEV_OMAP_AES
295 tristate "Support for OMAP AES hw engine"
296 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
298 select CRYPTO_BLKCIPHER
301 OMAP processors have AES module accelerator. Select this if you
302 want to use the OMAP module for AES algorithms.
304 config CRYPTO_DEV_OMAP_DES
305 tristate "Support for OMAP DES3DES hw engine"
306 depends on ARCH_OMAP2PLUS
308 select CRYPTO_BLKCIPHER
310 OMAP processors have DES/3DES module accelerator. Select this if you
311 want to use the OMAP module for DES and 3DES algorithms. Currently
312 the ECB and CBC modes of operation supported by the driver. Also
313 accesses made on unaligned boundaries are also supported.
315 config CRYPTO_DEV_PICOXCELL
316 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
317 depends on ARCH_PICOXCELL && HAVE_CLK
320 select CRYPTO_AUTHENC
321 select CRYPTO_BLKCIPHER
327 This option enables support for the hardware offload engines in the
328 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
329 and for 3gpp Layer 2 ciphering support.
331 Saying m here will build a module named pipcoxcell_crypto.
333 config CRYPTO_DEV_SAHARA
334 tristate "Support for SAHARA crypto accelerator"
335 depends on ARCH_MXC && OF
336 select CRYPTO_BLKCIPHER
340 This option enables support for the SAHARA HW crypto accelerator
341 found in some Freescale i.MX chips.
343 config CRYPTO_DEV_S5P
344 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
345 depends on ARCH_S5PV210 || ARCH_EXYNOS
347 select CRYPTO_BLKCIPHER
349 This option allows you to have support for S5P crypto acceleration.
350 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
351 algorithms execution.
354 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
357 This enables support for the NX hardware cryptographic accelerator
358 coprocessor that is in IBM PowerPC P7+ or later processors. This
359 does not actually enable any drivers, it only allows you to select
360 which acceleration type (encryption and/or compression) to enable.
363 source "drivers/crypto/nx/Kconfig"
366 config CRYPTO_DEV_UX500
367 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
368 depends on ARCH_U8500
370 Driver for ST-Ericsson UX500 crypto engine.
373 source "drivers/crypto/ux500/Kconfig"
374 endif # if CRYPTO_DEV_UX500
376 config CRYPTO_DEV_BFIN_CRC
377 tristate "Support for Blackfin CRC hardware"
380 Newer Blackfin processors have CRC hardware. Select this if you
381 want to use the Blackfin CRC module.
383 config CRYPTO_DEV_ATMEL_AES
384 tristate "Support for Atmel AES hw accelerator"
386 depends on AT_XDMAC || AT_HDMAC || COMPILE_TEST
389 select CRYPTO_BLKCIPHER
391 Some Atmel processors have AES hw accelerator.
392 Select this if you want to use the Atmel module for
395 To compile this driver as a module, choose M here: the module
396 will be called atmel-aes.
398 config CRYPTO_DEV_ATMEL_TDES
399 tristate "Support for Atmel DES/TDES hw accelerator"
402 select CRYPTO_BLKCIPHER
404 Some Atmel processors have DES/TDES hw accelerator.
405 Select this if you want to use the Atmel module for
408 To compile this driver as a module, choose M here: the module
409 will be called atmel-tdes.
411 config CRYPTO_DEV_ATMEL_SHA
412 tristate "Support for Atmel SHA hw accelerator"
416 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
418 Select this if you want to use the Atmel module for
419 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
421 To compile this driver as a module, choose M here: the module
422 will be called atmel-sha.
424 config CRYPTO_DEV_CCP
425 bool "Support for AMD Cryptographic Coprocessor"
426 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
428 The AMD Cryptographic Coprocessor provides hardware offload support
429 for encryption, hashing and related operations.
432 source "drivers/crypto/ccp/Kconfig"
435 config CRYPTO_DEV_MXS_DCP
436 tristate "Support for Freescale MXS DCP"
437 depends on (ARCH_MXS || ARCH_MXC)
442 select CRYPTO_BLKCIPHER
445 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
446 co-processor on the die.
448 To compile this driver as a module, choose M here: the module
449 will be called mxs-dcp.
451 source "drivers/crypto/qat/Kconfig"
453 config CRYPTO_DEV_QCE
454 tristate "Qualcomm crypto engine accelerator"
455 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
462 select CRYPTO_BLKCIPHER
464 This driver supports Qualcomm crypto engine accelerator
465 hardware. To compile this driver as a module, choose M here. The
466 module will be called qcrypto.
468 config CRYPTO_DEV_VMX
469 bool "Support for VMX cryptographic acceleration instructions"
470 depends on PPC64 && VSX
472 Support for VMX cryptographic acceleration instructions.
474 source "drivers/crypto/vmx/Kconfig"
476 config CRYPTO_DEV_IMGTEC_HASH
477 tristate "Imagination Technologies hardware hash accelerator"
478 depends on MIPS || COMPILE_TEST
485 This driver interfaces with the Imagination Technologies
486 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
489 config CRYPTO_DEV_SUN4I_SS
490 tristate "Support for Allwinner Security System cryptographic accelerator"
491 depends on ARCH_SUNXI && !64BIT
496 select CRYPTO_BLKCIPHER
498 Some Allwinner SoC have a crypto accelerator named
499 Security System. Select this if you want to use it.
500 The Security System handle AES/DES/3DES ciphers in CBC mode
501 and SHA1 and MD5 hash algorithms.
503 To compile this driver as a module, choose M here: the module
504 will be called sun4i-ss.
506 config CRYPTO_DEV_ROCKCHIP
507 tristate "Rockchip's Cryptographic Engine driver"
508 depends on OF && ARCH_ROCKCHIP
515 select CRYPTO_BLKCIPHER
518 This driver interfaces with the hardware crypto accelerator.
519 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.