1 /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17 #include <linux/gpio.h>
18 #include <linux/i2c.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/irq.h>
22 #include <linux/module.h>
23 #include <linux/mutex.h>
24 #include <linux/slab.h>
25 #include <linux/i2c/sx150x.h>
27 #include <linux/of_address.h>
28 #include <linux/of_irq.h>
29 #include <linux/of_gpio.h>
30 #include <linux/of_device.h>
32 #define NO_UPDATE_PENDING -1
34 /* The chip models of sx150x */
39 struct sx150x_123_pri
{
49 struct sx150x_456_pri
{
59 struct sx150x_789_pri
{
68 struct sx150x_device_data
{
79 struct sx150x_123_pri x123
;
80 struct sx150x_456_pri x456
;
81 struct sx150x_789_pri x789
;
86 struct gpio_chip gpio_chip
;
87 struct i2c_client
*client
;
88 const struct sx150x_device_data
*dev_cfg
;
96 struct irq_chip irq_chip
;
100 static const struct sx150x_device_data sx150x_devices
[] = {
101 [0] = { /* sx1508q */
107 .reg_irq_mask
= 0x09,
112 .reg_polarity
= 0x06,
119 [1] = { /* sx1509q */
125 .reg_irq_mask
= 0x13,
130 .reg_polarity
= 0x0d,
137 [2] = { /* sx1506q */
143 .reg_irq_mask
= 0x09,
147 .reg_pld_mode
= 0x21,
148 .reg_pld_table0
= 0x23,
149 .reg_pld_table1
= 0x25,
150 .reg_pld_table2
= 0x27,
151 .reg_pld_table3
= 0x29,
152 .reg_pld_table4
= 0x2b,
157 [3] = { /* sx1502q */
163 .reg_irq_mask
= 0x05,
167 .reg_pld_mode
= 0x10,
168 .reg_pld_table0
= 0x11,
169 .reg_pld_table1
= 0x12,
170 .reg_pld_table2
= 0x13,
171 .reg_pld_table3
= 0x14,
172 .reg_pld_table4
= 0x15,
179 static const struct i2c_device_id sx150x_id
[] = {
186 MODULE_DEVICE_TABLE(i2c
, sx150x_id
);
188 static const struct of_device_id sx150x_of_match
[] = {
189 { .compatible
= "semtech,sx1508q" },
190 { .compatible
= "semtech,sx1509q" },
191 { .compatible
= "semtech,sx1506q" },
192 { .compatible
= "semtech,sx1502q" },
195 MODULE_DEVICE_TABLE(of
, sx150x_of_match
);
197 static s32
sx150x_i2c_write(struct i2c_client
*client
, u8 reg
, u8 val
)
199 s32 err
= i2c_smbus_write_byte_data(client
, reg
, val
);
202 dev_warn(&client
->dev
,
203 "i2c write fail: can't write %02x to %02x: %d\n",
208 static s32
sx150x_i2c_read(struct i2c_client
*client
, u8 reg
, u8
*val
)
210 s32 err
= i2c_smbus_read_byte_data(client
, reg
);
215 dev_warn(&client
->dev
,
216 "i2c read fail: can't read from %02x: %d\n",
221 static inline bool offset_is_oscio(struct sx150x_chip
*chip
, unsigned offset
)
223 return (chip
->dev_cfg
->ngpios
== offset
);
227 * These utility functions solve the common problem of locating and setting
228 * configuration bits. Configuration bits are grouped into registers
229 * whose indexes increase downwards. For example, with eight-bit registers,
230 * sixteen gpios would have their config bits grouped in the following order:
231 * REGISTER N-1 [ f e d c b a 9 8 ]
232 * N [ 7 6 5 4 3 2 1 0 ]
234 * For multi-bit configurations, the pattern gets wider:
235 * REGISTER N-3 [ f f e e d d c c ]
236 * N-2 [ b b a a 9 9 8 8 ]
237 * N-1 [ 7 7 6 6 5 5 4 4 ]
238 * N [ 3 3 2 2 1 1 0 0 ]
240 * Given the address of the starting register 'N', the index of the gpio
241 * whose configuration we seek to change, and the width in bits of that
242 * configuration, these functions allow us to locate the correct
243 * register and mask the correct bits.
245 static inline void sx150x_find_cfg(u8 offset
, u8 width
,
246 u8
*reg
, u8
*mask
, u8
*shift
)
248 *reg
-= offset
* width
/ 8;
249 *mask
= (1 << width
) - 1;
250 *shift
= (offset
* width
) % 8;
254 static s32
sx150x_write_cfg(struct sx150x_chip
*chip
,
255 u8 offset
, u8 width
, u8 reg
, u8 val
)
262 sx150x_find_cfg(offset
, width
, ®
, &mask
, &shift
);
263 err
= sx150x_i2c_read(chip
->client
, reg
, &data
);
268 data
|= (val
<< shift
) & mask
;
269 return sx150x_i2c_write(chip
->client
, reg
, data
);
272 static int sx150x_get_io(struct sx150x_chip
*chip
, unsigned offset
)
274 u8 reg
= chip
->dev_cfg
->reg_data
;
280 sx150x_find_cfg(offset
, 1, ®
, &mask
, &shift
);
281 err
= sx150x_i2c_read(chip
->client
, reg
, &data
);
283 err
= (data
& mask
) != 0 ? 1 : 0;
288 static void sx150x_set_oscio(struct sx150x_chip
*chip
, int val
)
290 sx150x_i2c_write(chip
->client
,
291 chip
->dev_cfg
->pri
.x789
.reg_clock
,
292 (val
? 0x1f : 0x10));
295 static void sx150x_set_io(struct sx150x_chip
*chip
, unsigned offset
, int val
)
297 sx150x_write_cfg(chip
,
300 chip
->dev_cfg
->reg_data
,
304 static int sx150x_io_input(struct sx150x_chip
*chip
, unsigned offset
)
306 return sx150x_write_cfg(chip
,
309 chip
->dev_cfg
->reg_dir
,
313 static int sx150x_io_output(struct sx150x_chip
*chip
, unsigned offset
, int val
)
317 err
= sx150x_write_cfg(chip
,
320 chip
->dev_cfg
->reg_data
,
323 err
= sx150x_write_cfg(chip
,
326 chip
->dev_cfg
->reg_dir
,
331 static int sx150x_gpio_get(struct gpio_chip
*gc
, unsigned offset
)
333 struct sx150x_chip
*chip
= gpiochip_get_data(gc
);
334 int status
= -EINVAL
;
336 if (!offset_is_oscio(chip
, offset
)) {
337 mutex_lock(&chip
->lock
);
338 status
= sx150x_get_io(chip
, offset
);
339 mutex_unlock(&chip
->lock
);
342 return (status
< 0) ? status
: !!status
;
345 static void sx150x_gpio_set(struct gpio_chip
*gc
, unsigned offset
, int val
)
347 struct sx150x_chip
*chip
= gpiochip_get_data(gc
);
349 mutex_lock(&chip
->lock
);
350 if (offset_is_oscio(chip
, offset
))
351 sx150x_set_oscio(chip
, val
);
353 sx150x_set_io(chip
, offset
, val
);
354 mutex_unlock(&chip
->lock
);
357 static int sx150x_gpio_direction_input(struct gpio_chip
*gc
, unsigned offset
)
359 struct sx150x_chip
*chip
= gpiochip_get_data(gc
);
360 int status
= -EINVAL
;
362 if (!offset_is_oscio(chip
, offset
)) {
363 mutex_lock(&chip
->lock
);
364 status
= sx150x_io_input(chip
, offset
);
365 mutex_unlock(&chip
->lock
);
370 static int sx150x_gpio_direction_output(struct gpio_chip
*gc
,
374 struct sx150x_chip
*chip
= gpiochip_get_data(gc
);
377 if (!offset_is_oscio(chip
, offset
)) {
378 mutex_lock(&chip
->lock
);
379 status
= sx150x_io_output(chip
, offset
, val
);
380 mutex_unlock(&chip
->lock
);
385 static void sx150x_irq_mask(struct irq_data
*d
)
387 struct sx150x_chip
*chip
= gpiochip_get_data(irq_data_get_irq_chip_data(d
));
388 unsigned n
= d
->hwirq
;
390 chip
->irq_masked
|= (1 << n
);
391 chip
->irq_update
= n
;
394 static void sx150x_irq_unmask(struct irq_data
*d
)
396 struct sx150x_chip
*chip
= gpiochip_get_data(irq_data_get_irq_chip_data(d
));
397 unsigned n
= d
->hwirq
;
399 chip
->irq_masked
&= ~(1 << n
);
400 chip
->irq_update
= n
;
403 static int sx150x_irq_set_type(struct irq_data
*d
, unsigned int flow_type
)
405 struct sx150x_chip
*chip
= gpiochip_get_data(irq_data_get_irq_chip_data(d
));
408 if (flow_type
& (IRQ_TYPE_LEVEL_HIGH
| IRQ_TYPE_LEVEL_LOW
))
413 if (flow_type
& IRQ_TYPE_EDGE_RISING
)
415 if (flow_type
& IRQ_TYPE_EDGE_FALLING
)
418 chip
->irq_sense
&= ~(3UL << (n
* 2));
419 chip
->irq_sense
|= val
<< (n
* 2);
420 chip
->irq_update
= n
;
424 static irqreturn_t
sx150x_irq_thread_fn(int irq
, void *dev_id
)
426 struct sx150x_chip
*chip
= (struct sx150x_chip
*)dev_id
;
427 unsigned nhandled
= 0;
434 for (i
= (chip
->dev_cfg
->ngpios
/ 8) - 1; i
>= 0; --i
) {
435 err
= sx150x_i2c_read(chip
->client
,
436 chip
->dev_cfg
->reg_irq_src
- i
,
441 sx150x_i2c_write(chip
->client
,
442 chip
->dev_cfg
->reg_irq_src
- i
,
444 for (n
= 0; n
< 8; ++n
) {
445 if (val
& (1 << n
)) {
446 sub_irq
= irq_find_mapping(
447 chip
->gpio_chip
.irqdomain
,
449 handle_nested_irq(sub_irq
);
455 return (nhandled
> 0 ? IRQ_HANDLED
: IRQ_NONE
);
458 static void sx150x_irq_bus_lock(struct irq_data
*d
)
460 struct sx150x_chip
*chip
= gpiochip_get_data(irq_data_get_irq_chip_data(d
));
462 mutex_lock(&chip
->lock
);
465 static void sx150x_irq_bus_sync_unlock(struct irq_data
*d
)
467 struct sx150x_chip
*chip
= gpiochip_get_data(irq_data_get_irq_chip_data(d
));
470 if (chip
->irq_update
== NO_UPDATE_PENDING
)
473 n
= chip
->irq_update
;
474 chip
->irq_update
= NO_UPDATE_PENDING
;
476 /* Avoid updates if nothing changed */
477 if (chip
->dev_sense
== chip
->irq_sense
&&
478 chip
->dev_masked
== chip
->irq_masked
)
481 chip
->dev_sense
= chip
->irq_sense
;
482 chip
->dev_masked
= chip
->irq_masked
;
484 if (chip
->irq_masked
& (1 << n
)) {
485 sx150x_write_cfg(chip
, n
, 1, chip
->dev_cfg
->reg_irq_mask
, 1);
486 sx150x_write_cfg(chip
, n
, 2, chip
->dev_cfg
->reg_sense
, 0);
488 sx150x_write_cfg(chip
, n
, 1, chip
->dev_cfg
->reg_irq_mask
, 0);
489 sx150x_write_cfg(chip
, n
, 2, chip
->dev_cfg
->reg_sense
,
490 chip
->irq_sense
>> (n
* 2));
493 mutex_unlock(&chip
->lock
);
496 static void sx150x_init_chip(struct sx150x_chip
*chip
,
497 struct i2c_client
*client
,
498 kernel_ulong_t driver_data
,
499 struct sx150x_platform_data
*pdata
)
501 mutex_init(&chip
->lock
);
503 chip
->client
= client
;
504 chip
->dev_cfg
= &sx150x_devices
[driver_data
];
505 chip
->gpio_chip
.parent
= &client
->dev
;
506 chip
->gpio_chip
.label
= client
->name
;
507 chip
->gpio_chip
.direction_input
= sx150x_gpio_direction_input
;
508 chip
->gpio_chip
.direction_output
= sx150x_gpio_direction_output
;
509 chip
->gpio_chip
.get
= sx150x_gpio_get
;
510 chip
->gpio_chip
.set
= sx150x_gpio_set
;
511 chip
->gpio_chip
.base
= pdata
->gpio_base
;
512 chip
->gpio_chip
.can_sleep
= true;
513 chip
->gpio_chip
.ngpio
= chip
->dev_cfg
->ngpios
;
514 #ifdef CONFIG_OF_GPIO
515 chip
->gpio_chip
.of_node
= client
->dev
.of_node
;
516 chip
->gpio_chip
.of_gpio_n_cells
= 2;
518 if (pdata
->oscio_is_gpo
)
519 ++chip
->gpio_chip
.ngpio
;
521 chip
->irq_chip
.name
= client
->name
;
522 chip
->irq_chip
.irq_mask
= sx150x_irq_mask
;
523 chip
->irq_chip
.irq_unmask
= sx150x_irq_unmask
;
524 chip
->irq_chip
.irq_set_type
= sx150x_irq_set_type
;
525 chip
->irq_chip
.irq_bus_lock
= sx150x_irq_bus_lock
;
526 chip
->irq_chip
.irq_bus_sync_unlock
= sx150x_irq_bus_sync_unlock
;
527 chip
->irq_summary
= -1;
529 chip
->irq_masked
= ~0;
531 chip
->dev_masked
= ~0;
533 chip
->irq_update
= NO_UPDATE_PENDING
;
536 static int sx150x_init_io(struct sx150x_chip
*chip
, u8 base
, u16 cfg
)
541 for (n
= 0; err
>= 0 && n
< (chip
->dev_cfg
->ngpios
/ 8); ++n
)
542 err
= sx150x_i2c_write(chip
->client
, base
- n
, cfg
>> (n
* 8));
546 static int sx150x_reset(struct sx150x_chip
*chip
)
550 err
= i2c_smbus_write_byte_data(chip
->client
,
551 chip
->dev_cfg
->pri
.x789
.reg_reset
,
556 err
= i2c_smbus_write_byte_data(chip
->client
,
557 chip
->dev_cfg
->pri
.x789
.reg_reset
,
562 static int sx150x_init_hw(struct sx150x_chip
*chip
,
563 struct sx150x_platform_data
*pdata
)
567 if (pdata
->reset_during_probe
) {
568 err
= sx150x_reset(chip
);
573 if (chip
->dev_cfg
->model
== SX150X_789
)
574 err
= sx150x_i2c_write(chip
->client
,
575 chip
->dev_cfg
->pri
.x789
.reg_misc
,
577 else if (chip
->dev_cfg
->model
== SX150X_456
)
578 err
= sx150x_i2c_write(chip
->client
,
579 chip
->dev_cfg
->pri
.x456
.reg_advance
,
582 err
= sx150x_i2c_write(chip
->client
,
583 chip
->dev_cfg
->pri
.x123
.reg_advance
,
588 err
= sx150x_init_io(chip
, chip
->dev_cfg
->reg_pullup
,
589 pdata
->io_pullup_ena
);
593 err
= sx150x_init_io(chip
, chip
->dev_cfg
->reg_pulldn
,
594 pdata
->io_pulldn_ena
);
598 if (chip
->dev_cfg
->model
== SX150X_789
) {
599 err
= sx150x_init_io(chip
,
600 chip
->dev_cfg
->pri
.x789
.reg_drain
,
601 pdata
->io_open_drain_ena
);
605 err
= sx150x_init_io(chip
,
606 chip
->dev_cfg
->pri
.x789
.reg_polarity
,
610 } else if (chip
->dev_cfg
->model
== SX150X_456
) {
611 /* Set all pins to work in normal mode */
612 err
= sx150x_init_io(chip
,
613 chip
->dev_cfg
->pri
.x456
.reg_pld_mode
,
618 /* Set all pins to work in normal mode */
619 err
= sx150x_init_io(chip
,
620 chip
->dev_cfg
->pri
.x123
.reg_pld_mode
,
627 if (pdata
->oscio_is_gpo
)
628 sx150x_set_oscio(chip
, 0);
633 static int sx150x_install_irq_chip(struct sx150x_chip
*chip
,
639 chip
->irq_summary
= irq_summary
;
640 chip
->irq_base
= irq_base
;
642 /* Add gpio chip to irq subsystem */
643 err
= gpiochip_irqchip_add(&chip
->gpio_chip
,
644 &chip
->irq_chip
, chip
->irq_base
,
645 handle_edge_irq
, IRQ_TYPE_EDGE_BOTH
);
647 dev_err(&chip
->client
->dev
,
648 "could not connect irqchip to gpiochip\n");
652 err
= devm_request_threaded_irq(&chip
->client
->dev
,
653 irq_summary
, NULL
, sx150x_irq_thread_fn
,
654 IRQF_ONESHOT
| IRQF_SHARED
| IRQF_TRIGGER_FALLING
,
655 chip
->irq_chip
.name
, chip
);
657 chip
->irq_summary
= -1;
664 static int sx150x_probe(struct i2c_client
*client
,
665 const struct i2c_device_id
*id
)
667 static const u32 i2c_funcs
= I2C_FUNC_SMBUS_BYTE_DATA
|
668 I2C_FUNC_SMBUS_WRITE_WORD_DATA
;
669 struct sx150x_platform_data
*pdata
;
670 struct sx150x_chip
*chip
;
673 pdata
= dev_get_platdata(&client
->dev
);
677 if (!i2c_check_functionality(client
->adapter
, i2c_funcs
))
680 chip
= devm_kzalloc(&client
->dev
,
681 sizeof(struct sx150x_chip
), GFP_KERNEL
);
685 sx150x_init_chip(chip
, client
, id
->driver_data
, pdata
);
686 rc
= sx150x_init_hw(chip
, pdata
);
690 rc
= devm_gpiochip_add_data(&client
->dev
, &chip
->gpio_chip
, chip
);
694 if (pdata
->irq_summary
>= 0) {
695 rc
= sx150x_install_irq_chip(chip
,
702 i2c_set_clientdata(client
, chip
);
707 static struct i2c_driver sx150x_driver
= {
710 .of_match_table
= of_match_ptr(sx150x_of_match
),
712 .probe
= sx150x_probe
,
713 .id_table
= sx150x_id
,
716 static int __init
sx150x_init(void)
718 return i2c_add_driver(&sx150x_driver
);
720 subsys_initcall(sx150x_init
);
722 static void __exit
sx150x_exit(void)
724 return i2c_del_driver(&sx150x_driver
);
726 module_exit(sx150x_exit
);
728 MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
729 MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
730 MODULE_LICENSE("GPL v2");