1 /*******************************************************************************
3 * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenFabrics.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 *******************************************************************************/
38 #define PAUSE_TIMER_VALUE 0xFFFF
39 #define REFRESH_THRESHOLD 0x7FFF
40 #define HIGH_THRESHOLD 0x800
41 #define LOW_THRESHOLD 0x200
42 #define ALL_TC2PFC 0xFF
44 void i40iw_debug_buf(struct i40iw_sc_dev
*dev
, enum i40iw_debug_flag mask
,
45 char *desc
, u64
*buf
, u32 size
);
47 enum i40iw_status_code
i40iw_device_init(struct i40iw_sc_dev
*dev
,
48 struct i40iw_device_init_info
*info
);
50 enum i40iw_status_code
i40iw_device_init_pestat(struct i40iw_dev_pestat
*);
52 void i40iw_sc_cqp_post_sq(struct i40iw_sc_cqp
*cqp
);
54 u64
*i40iw_sc_cqp_get_next_send_wqe(struct i40iw_sc_cqp
*cqp
, u64 scratch
);
56 enum i40iw_status_code
i40iw_sc_mr_fast_register(struct i40iw_sc_qp
*qp
,
57 struct i40iw_fast_reg_stag_info
*info
,
60 /* HMC/FPM functions */
61 enum i40iw_status_code
i40iw_sc_init_iw_hmc(struct i40iw_sc_dev
*dev
,
64 enum i40iw_status_code
i40iw_pf_init_vfhmc(struct i40iw_sc_dev
*dev
, u8 vf_hmc_fn_id
,
67 /* cqp misc functions */
69 void i40iw_terminate_send_fin(struct i40iw_sc_qp
*qp
);
71 void i40iw_terminate_connection(struct i40iw_sc_qp
*qp
, struct i40iw_aeqe_info
*info
);
73 void i40iw_terminate_received(struct i40iw_sc_qp
*qp
, struct i40iw_aeqe_info
*info
);
75 enum i40iw_status_code
i40iw_sc_suspend_qp(struct i40iw_sc_cqp
*cqp
,
76 struct i40iw_sc_qp
*qp
, u64 scratch
);
78 enum i40iw_status_code
i40iw_sc_resume_qp(struct i40iw_sc_cqp
*cqp
,
79 struct i40iw_sc_qp
*qp
, u64 scratch
);
81 enum i40iw_status_code
i40iw_sc_static_hmc_pages_allocated(struct i40iw_sc_cqp
*cqp
,
82 u64 scratch
, u8 hmc_fn_id
,
86 enum i40iw_status_code
i40iw_config_fpm_values(struct i40iw_sc_dev
*dev
, u32 qp_count
);
88 void free_sd_mem(struct i40iw_sc_dev
*dev
);
90 enum i40iw_status_code
i40iw_process_cqp_cmd(struct i40iw_sc_dev
*dev
,
91 struct cqp_commands_info
*pcmdinfo
);
93 enum i40iw_status_code
i40iw_process_bh(struct i40iw_sc_dev
*dev
);
95 /* prototype for functions used for dynamic memory allocation */
96 enum i40iw_status_code
i40iw_allocate_dma_mem(struct i40iw_hw
*hw
,
97 struct i40iw_dma_mem
*mem
, u64 size
,
99 void i40iw_free_dma_mem(struct i40iw_hw
*hw
, struct i40iw_dma_mem
*mem
);
100 enum i40iw_status_code
i40iw_allocate_virt_mem(struct i40iw_hw
*hw
,
101 struct i40iw_virt_mem
*mem
, u32 size
);
102 enum i40iw_status_code
i40iw_free_virt_mem(struct i40iw_hw
*hw
,
103 struct i40iw_virt_mem
*mem
);
104 u8
i40iw_get_encoded_wqe_size(u32 wqsize
, bool cqpsq
);