drivers/infiniband/hw/i40iw/i40iw_ucontext.h

   1 /*
   2  * Copyright (c) 2006 - 2016 Intel Corporation.  All rights reserved.
   3  * Copyright (c) 2005 Topspin Communications.  All rights reserved.
   4  * Copyright (c) 2005 Cisco Systems.  All rights reserved.
   5  * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  *
  35  */
  36
  37 #ifndef I40IW_USER_CONTEXT_H
  38 #define I40IW_USER_CONTEXT_H
  39
  40 #include <linux/types.h>
  41
  42 #define I40IW_ABI_USERSPACE_VER 4
  43 #define I40IW_ABI_KERNEL_VER    4
  44 struct i40iw_alloc_ucontext_req {
  45         __u32 reserved32;
  46         __u8 userspace_ver;
  47         __u8 reserved8[3];
  48 };
  49
  50 struct i40iw_alloc_ucontext_resp {
  51         __u32 max_pds;          /* maximum pds allowed for this user process */
  52         __u32 max_qps;          /* maximum qps allowed for this user process */
  53         __u32 wq_size;          /* size of the WQs (sq+rq) allocated to the mmaped area */
  54         __u8 kernel_ver;
  55         __u8 reserved[3];
  56 };
  57
  58 struct i40iw_alloc_pd_resp {
  59         __u32 pd_id;
  60         __u8 reserved[4];
  61 };
  62
  63 struct i40iw_create_cq_req {
  64         __u64 user_cq_buffer;
  65         __u64 user_shadow_area;
  66 };
  67
  68 struct i40iw_create_qp_req {
  69         __u64 user_wqe_buffers;
  70         __u64 user_compl_ctx;
  71
  72         /* UDA QP PHB */
  73         __u64 user_sq_phb;      /* place for VA of the sq phb buff */
  74         __u64 user_rq_phb;      /* place for VA of the rq phb buff */
  75 };
  76
  77 enum i40iw_memreg_type {
  78         IW_MEMREG_TYPE_MEM = 0x0000,
  79         IW_MEMREG_TYPE_QP = 0x0001,
  80         IW_MEMREG_TYPE_CQ = 0x0002,
  81 };
  82
  83 struct i40iw_mem_reg_req {
  84         __u16 reg_type;         /* Memory, QP or CQ */
  85         __u16 cq_pages;
  86         __u16 rq_pages;
  87         __u16 sq_pages;
  88 };
  89
  90 struct i40iw_create_cq_resp {
  91         __u32 cq_id;
  92         __u32 cq_size;
  93         __u32 mmap_db_index;
  94         __u32 reserved;
  95 };
  96
  97 struct i40iw_create_qp_resp {
  98         __u32 qp_id;
  99         __u32 actual_sq_size;
 100         __u32 actual_rq_size;
 101         __u32 i40iw_drv_opt;
 102         __u16 push_idx;
 103         __u8  lsmm;
 104         __u8  rsvd2;
 105 };
 106
 107 #endif