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Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux...
[linux/fpc-iii.git] / drivers / media / platform / soc_camera / rcar_vin.c
blob3b8edf458964dcb76097493db6d40a4fc7d266fc
1 /*
2 * SoC-camera host driver for Renesas R-Car VIN unit
3 *
4 * Copyright (C) 2011-2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Cogent Embedded, Inc., <source@cogentembedded.com>
6 *
7 * Based on V4L2 Driver for SuperH Mobile CEU interface "sh_mobile_ceu_camera.c"
8 *
9 * Copyright (C) 2008 Magnus Damm
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17 #include <linux/delay.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/of.h>
23 #include <linux/of_device.h>
24 #include <linux/platform_device.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/slab.h>
27 #include <linux/videodev2.h>
28
29 #include <media/soc_camera.h>
30 #include <media/drv-intf/soc_mediabus.h>
31 #include <media/v4l2-common.h>
32 #include <media/v4l2-dev.h>
33 #include <media/v4l2-device.h>
34 #include <media/v4l2-mediabus.h>
35 #include <media/v4l2-of.h>
36 #include <media/v4l2-subdev.h>
37 #include <media/videobuf2-dma-contig.h>
38
39 #include "soc_scale_crop.h"
40
41 #define DRV_NAME "rcar_vin"
42
43 /* Register offsets for R-Car VIN */
44 #define VNMC_REG 0x00 /* Video n Main Control Register */
45 #define VNMS_REG 0x04 /* Video n Module Status Register */
46 #define VNFC_REG 0x08 /* Video n Frame Capture Register */
47 #define VNSLPRC_REG 0x0C /* Video n Start Line Pre-Clip Register */
48 #define VNELPRC_REG 0x10 /* Video n End Line Pre-Clip Register */
49 #define VNSPPRC_REG 0x14 /* Video n Start Pixel Pre-Clip Register */
50 #define VNEPPRC_REG 0x18 /* Video n End Pixel Pre-Clip Register */
51 #define VNSLPOC_REG 0x1C /* Video n Start Line Post-Clip Register */
52 #define VNELPOC_REG 0x20 /* Video n End Line Post-Clip Register */
53 #define VNSPPOC_REG 0x24 /* Video n Start Pixel Post-Clip Register */
54 #define VNEPPOC_REG 0x28 /* Video n End Pixel Post-Clip Register */
55 #define VNIS_REG 0x2C /* Video n Image Stride Register */
56 #define VNMB_REG(m) (0x30 + ((m) << 2)) /* Video n Memory Base m Register */
57 #define VNIE_REG 0x40 /* Video n Interrupt Enable Register */
58 #define VNINTS_REG 0x44 /* Video n Interrupt Status Register */
59 #define VNSI_REG 0x48 /* Video n Scanline Interrupt Register */
60 #define VNMTC_REG 0x4C /* Video n Memory Transfer Control Register */
61 #define VNYS_REG 0x50 /* Video n Y Scale Register */
62 #define VNXS_REG 0x54 /* Video n X Scale Register */
63 #define VNDMR_REG 0x58 /* Video n Data Mode Register */
64 #define VNDMR2_REG 0x5C /* Video n Data Mode Register 2 */
65 #define VNUVAOF_REG 0x60 /* Video n UV Address Offset Register */
66 #define VNC1A_REG 0x80 /* Video n Coefficient Set C1A Register */
67 #define VNC1B_REG 0x84 /* Video n Coefficient Set C1B Register */
68 #define VNC1C_REG 0x88 /* Video n Coefficient Set C1C Register */
69 #define VNC2A_REG 0x90 /* Video n Coefficient Set C2A Register */
70 #define VNC2B_REG 0x94 /* Video n Coefficient Set C2B Register */
71 #define VNC2C_REG 0x98 /* Video n Coefficient Set C2C Register */
72 #define VNC3A_REG 0xA0 /* Video n Coefficient Set C3A Register */
73 #define VNC3B_REG 0xA4 /* Video n Coefficient Set C3B Register */
74 #define VNC3C_REG 0xA8 /* Video n Coefficient Set C3C Register */
75 #define VNC4A_REG 0xB0 /* Video n Coefficient Set C4A Register */
76 #define VNC4B_REG 0xB4 /* Video n Coefficient Set C4B Register */
77 #define VNC4C_REG 0xB8 /* Video n Coefficient Set C4C Register */
78 #define VNC5A_REG 0xC0 /* Video n Coefficient Set C5A Register */
79 #define VNC5B_REG 0xC4 /* Video n Coefficient Set C5B Register */
80 #define VNC5C_REG 0xC8 /* Video n Coefficient Set C5C Register */
81 #define VNC6A_REG 0xD0 /* Video n Coefficient Set C6A Register */
82 #define VNC6B_REG 0xD4 /* Video n Coefficient Set C6B Register */
83 #define VNC6C_REG 0xD8 /* Video n Coefficient Set C6C Register */
84 #define VNC7A_REG 0xE0 /* Video n Coefficient Set C7A Register */
85 #define VNC7B_REG 0xE4 /* Video n Coefficient Set C7B Register */
86 #define VNC7C_REG 0xE8 /* Video n Coefficient Set C7C Register */
87 #define VNC8A_REG 0xF0 /* Video n Coefficient Set C8A Register */
88 #define VNC8B_REG 0xF4 /* Video n Coefficient Set C8B Register */
89 #define VNC8C_REG 0xF8 /* Video n Coefficient Set C8C Register */
90
91 /* Register bit fields for R-Car VIN */
92 /* Video n Main Control Register bits */
93 #define VNMC_FOC (1 << 21)
94 #define VNMC_YCAL (1 << 19)
95 #define VNMC_INF_YUV8_BT656 (0 << 16)
96 #define VNMC_INF_YUV8_BT601 (1 << 16)
97 #define VNMC_INF_YUV10_BT656 (2 << 16)
98 #define VNMC_INF_YUV10_BT601 (3 << 16)
99 #define VNMC_INF_YUV16 (5 << 16)
100 #define VNMC_INF_RGB888 (6 << 16)
101 #define VNMC_VUP (1 << 10)
102 #define VNMC_IM_ODD (0 << 3)
103 #define VNMC_IM_ODD_EVEN (1 << 3)
104 #define VNMC_IM_EVEN (2 << 3)
105 #define VNMC_IM_FULL (3 << 3)
106 #define VNMC_BPS (1 << 1)
107 #define VNMC_ME (1 << 0)
108
109 /* Video n Module Status Register bits */
110 #define VNMS_FBS_MASK (3 << 3)
111 #define VNMS_FBS_SHIFT 3
112 #define VNMS_AV (1 << 1)
113 #define VNMS_CA (1 << 0)
114
115 /* Video n Frame Capture Register bits */
116 #define VNFC_C_FRAME (1 << 1)
117 #define VNFC_S_FRAME (1 << 0)
118
119 /* Video n Interrupt Enable Register bits */
120 #define VNIE_FIE (1 << 4)
121 #define VNIE_EFE (1 << 1)
122
123 /* Video n Data Mode Register bits */
124 #define VNDMR_EXRGB (1 << 8)
125 #define VNDMR_BPSM (1 << 4)
126 #define VNDMR_DTMD_YCSEP (1 << 1)
127 #define VNDMR_DTMD_ARGB (1 << 0)
128
129 /* Video n Data Mode Register 2 bits */
130 #define VNDMR2_VPS (1 << 30)
131 #define VNDMR2_HPS (1 << 29)
132 #define VNDMR2_FTEV (1 << 17)
133 #define VNDMR2_VLV(n) ((n & 0xf) << 12)
134
135 #define VIN_MAX_WIDTH 2048
136 #define VIN_MAX_HEIGHT 2048
137
138 #define TIMEOUT_MS 100
139
140 #define RCAR_VIN_HSYNC_ACTIVE_LOW (1 << 0)
141 #define RCAR_VIN_VSYNC_ACTIVE_LOW (1 << 1)
142 #define RCAR_VIN_BT601 (1 << 2)
143 #define RCAR_VIN_BT656 (1 << 3)
144
145 enum chip_id {
146 RCAR_GEN3,
147 RCAR_GEN2,
148 RCAR_H1,
149 RCAR_M1,
150 RCAR_E1,
151 };
152
153 struct vin_coeff {
154 unsigned short xs_value;
155 u32 coeff_set[24];
156 };
157
158 static const struct vin_coeff vin_coeff_set[] = {
159 { 0x0000, {
160 0x00000000, 0x00000000, 0x00000000,
161 0x00000000, 0x00000000, 0x00000000,
162 0x00000000, 0x00000000, 0x00000000,
163 0x00000000, 0x00000000, 0x00000000,
164 0x00000000, 0x00000000, 0x00000000,
165 0x00000000, 0x00000000, 0x00000000,
166 0x00000000, 0x00000000, 0x00000000,
167 0x00000000, 0x00000000, 0x00000000 },
168 },
169 { 0x1000, {
170 0x000fa400, 0x000fa400, 0x09625902,
171 0x000003f8, 0x00000403, 0x3de0d9f0,
172 0x001fffed, 0x00000804, 0x3cc1f9c3,
173 0x001003de, 0x00000c01, 0x3cb34d7f,
174 0x002003d2, 0x00000c00, 0x3d24a92d,
175 0x00200bca, 0x00000bff, 0x3df600d2,
176 0x002013cc, 0x000007ff, 0x3ed70c7e,
177 0x00100fde, 0x00000000, 0x3f87c036 },
178 },
179 { 0x1200, {
180 0x002ffff1, 0x002ffff1, 0x02a0a9c8,
181 0x002003e7, 0x001ffffa, 0x000185bc,
182 0x002007dc, 0x000003ff, 0x3e52859c,
183 0x00200bd4, 0x00000002, 0x3d53996b,
184 0x00100fd0, 0x00000403, 0x3d04ad2d,
185 0x00000bd5, 0x00000403, 0x3d35ace7,
186 0x3ff003e4, 0x00000801, 0x3dc674a1,
187 0x3fffe800, 0x00000800, 0x3e76f461 },
188 },
189 { 0x1400, {
190 0x00100be3, 0x00100be3, 0x04d1359a,
191 0x00000fdb, 0x002003ed, 0x0211fd93,
192 0x00000fd6, 0x002003f4, 0x0002d97b,
193 0x000007d6, 0x002ffffb, 0x3e93b956,
194 0x3ff003da, 0x001003ff, 0x3db49926,
195 0x3fffefe9, 0x00100001, 0x3d655cee,
196 0x3fffd400, 0x00000003, 0x3d65f4b6,
197 0x000fb421, 0x00000402, 0x3dc6547e },
198 },
199 { 0x1600, {
200 0x00000bdd, 0x00000bdd, 0x06519578,
201 0x3ff007da, 0x00000be3, 0x03c24973,
202 0x3ff003d9, 0x00000be9, 0x01b30d5f,
203 0x3ffff7df, 0x001003f1, 0x0003c542,
204 0x000fdfec, 0x001003f7, 0x3ec4711d,
205 0x000fc400, 0x002ffffd, 0x3df504f1,
206 0x001fa81a, 0x002ffc00, 0x3d957cc2,
207 0x002f8c3c, 0x00100000, 0x3db5c891 },
208 },
209 { 0x1800, {
210 0x3ff003dc, 0x3ff003dc, 0x0791e558,
211 0x000ff7dd, 0x3ff007de, 0x05328554,
212 0x000fe7e3, 0x3ff00be2, 0x03232546,
213 0x000fd7ee, 0x000007e9, 0x0143bd30,
214 0x001fb800, 0x000007ee, 0x00044511,
215 0x002fa015, 0x000007f4, 0x3ef4bcee,
216 0x002f8832, 0x001003f9, 0x3e4514c7,
217 0x001f7853, 0x001003fd, 0x3de54c9f },
218 },
219 { 0x1a00, {
220 0x000fefe0, 0x000fefe0, 0x08721d3c,
221 0x001fdbe7, 0x000ffbde, 0x0652a139,
222 0x001fcbf0, 0x000003df, 0x0463292e,
223 0x002fb3ff, 0x3ff007e3, 0x0293a91d,
224 0x002f9c12, 0x3ff00be7, 0x01241905,
225 0x001f8c29, 0x000007ed, 0x3fe470eb,
226 0x000f7c46, 0x000007f2, 0x3f04b8ca,
227 0x3fef7865, 0x000007f6, 0x3e74e4a8 },
228 },
229 { 0x1c00, {
230 0x001fd3e9, 0x001fd3e9, 0x08f23d26,
231 0x002fbff3, 0x001fe3e4, 0x0712ad23,
232 0x002fa800, 0x000ff3e0, 0x05631d1b,
233 0x001f9810, 0x000ffbe1, 0x03b3890d,
234 0x000f8c23, 0x000003e3, 0x0233e8fa,
235 0x3fef843b, 0x000003e7, 0x00f430e4,
236 0x3fbf8456, 0x3ff00bea, 0x00046cc8,
237 0x3f8f8c72, 0x3ff00bef, 0x3f3490ac },
238 },
239 { 0x1e00, {
240 0x001fbbf4, 0x001fbbf4, 0x09425112,
241 0x001fa800, 0x002fc7ed, 0x0792b110,
242 0x000f980e, 0x001fdbe6, 0x0613110a,
243 0x3fff8c20, 0x001fe7e3, 0x04a368fd,
244 0x3fcf8c33, 0x000ff7e2, 0x0343b8ed,
245 0x3f9f8c4a, 0x000fffe3, 0x0203f8da,
246 0x3f5f9c61, 0x000003e6, 0x00e428c5,
247 0x3f1fb07b, 0x000003eb, 0x3fe440af },
248 },
249 { 0x2000, {
250 0x000fa400, 0x000fa400, 0x09625902,
251 0x3fff980c, 0x001fb7f5, 0x0812b0ff,
252 0x3fdf901c, 0x001fc7ed, 0x06b2fcfa,
253 0x3faf902d, 0x001fd3e8, 0x055348f1,
254 0x3f7f983f, 0x001fe3e5, 0x04038ce3,
255 0x3f3fa454, 0x001fefe3, 0x02e3c8d1,
256 0x3f0fb86a, 0x001ff7e4, 0x01c3e8c0,
257 0x3ecfd880, 0x000fffe6, 0x00c404ac },
258 },
259 { 0x2200, {
260 0x3fdf9c0b, 0x3fdf9c0b, 0x09725cf4,
261 0x3fbf9818, 0x3fffa400, 0x0842a8f1,
262 0x3f8f9827, 0x000fb3f7, 0x0702f0ec,
263 0x3f5fa037, 0x000fc3ef, 0x05d330e4,
264 0x3f2fac49, 0x001fcfea, 0x04a364d9,
265 0x3effc05c, 0x001fdbe7, 0x038394ca,
266 0x3ecfdc6f, 0x001fe7e6, 0x0273b0bb,
267 0x3ea00083, 0x001fefe6, 0x0183c0a9 },
268 },
269 { 0x2400, {
270 0x3f9fa014, 0x3f9fa014, 0x098260e6,
271 0x3f7f9c23, 0x3fcf9c0a, 0x08629ce5,
272 0x3f4fa431, 0x3fefa400, 0x0742d8e1,
273 0x3f1fb440, 0x3fffb3f8, 0x062310d9,
274 0x3eefc850, 0x000fbbf2, 0x050340d0,
275 0x3ecfe062, 0x000fcbec, 0x041364c2,
276 0x3ea00073, 0x001fd3ea, 0x03037cb5,
277 0x3e902086, 0x001fdfe8, 0x022388a5 },
278 },
279 { 0x2600, {
280 0x3f5fa81e, 0x3f5fa81e, 0x096258da,
281 0x3f3fac2b, 0x3f8fa412, 0x088290d8,
282 0x3f0fbc38, 0x3fafa408, 0x0772c8d5,
283 0x3eefcc47, 0x3fcfa800, 0x0672f4ce,
284 0x3ecfe456, 0x3fefaffa, 0x05531cc6,
285 0x3eb00066, 0x3fffbbf3, 0x047334bb,
286 0x3ea01c77, 0x000fc7ee, 0x039348ae,
287 0x3ea04486, 0x000fd3eb, 0x02b350a1 },
288 },
289 { 0x2800, {
290 0x3f2fb426, 0x3f2fb426, 0x094250ce,
291 0x3f0fc032, 0x3f4fac1b, 0x086284cd,
292 0x3eefd040, 0x3f7fa811, 0x0782acc9,
293 0x3ecfe84c, 0x3f9fa807, 0x06a2d8c4,
294 0x3eb0005b, 0x3fbfac00, 0x05b2f4bc,
295 0x3eb0186a, 0x3fdfb3fa, 0x04c308b4,
296 0x3eb04077, 0x3fefbbf4, 0x03f31ca8,
297 0x3ec06884, 0x000fbff2, 0x03031c9e },
298 },
299 { 0x2a00, {
300 0x3f0fc42d, 0x3f0fc42d, 0x090240c4,
301 0x3eefd439, 0x3f2fb822, 0x08526cc2,
302 0x3edfe845, 0x3f4fb018, 0x078294bf,
303 0x3ec00051, 0x3f6fac0f, 0x06b2b4bb,
304 0x3ec0185f, 0x3f8fac07, 0x05e2ccb4,
305 0x3ec0386b, 0x3fafac00, 0x0502e8ac,
306 0x3ed05c77, 0x3fcfb3fb, 0x0432f0a3,
307 0x3ef08482, 0x3fdfbbf6, 0x0372f898 },
308 },
309 { 0x2c00, {
310 0x3eefdc31, 0x3eefdc31, 0x08e238b8,
311 0x3edfec3d, 0x3f0fc828, 0x082258b9,
312 0x3ed00049, 0x3f1fc01e, 0x077278b6,
313 0x3ed01455, 0x3f3fb815, 0x06c294b2,
314 0x3ed03460, 0x3f5fb40d, 0x0602acac,
315 0x3ef0506c, 0x3f7fb006, 0x0542c0a4,
316 0x3f107476, 0x3f9fb400, 0x0472c89d,
317 0x3f309c80, 0x3fbfb7fc, 0x03b2cc94 },
318 },
319 { 0x2e00, {
320 0x3eefec37, 0x3eefec37, 0x088220b0,
321 0x3ee00041, 0x3effdc2d, 0x07f244ae,
322 0x3ee0144c, 0x3f0fd023, 0x07625cad,
323 0x3ef02c57, 0x3f1fc81a, 0x06c274a9,
324 0x3f004861, 0x3f3fbc13, 0x060288a6,
325 0x3f20686b, 0x3f5fb80c, 0x05529c9e,
326 0x3f408c74, 0x3f6fb805, 0x04b2ac96,
327 0x3f80ac7e, 0x3f8fb800, 0x0402ac8e },
328 },
329 { 0x3000, {
330 0x3ef0003a, 0x3ef0003a, 0x084210a6,
331 0x3ef01045, 0x3effec32, 0x07b228a7,
332 0x3f00284e, 0x3f0fdc29, 0x073244a4,
333 0x3f104058, 0x3f0fd420, 0x06a258a2,
334 0x3f305c62, 0x3f2fc818, 0x0612689d,
335 0x3f508069, 0x3f3fc011, 0x05728496,
336 0x3f80a072, 0x3f4fc00a, 0x04d28c90,
337 0x3fc0c07b, 0x3f6fbc04, 0x04429088 },
338 },
339 { 0x3200, {
340 0x3f00103e, 0x3f00103e, 0x07f1fc9e,
341 0x3f102447, 0x3f000035, 0x0782149d,
342 0x3f203c4f, 0x3f0ff02c, 0x07122c9c,
343 0x3f405458, 0x3f0fe424, 0x06924099,
344 0x3f607061, 0x3f1fd41d, 0x06024c97,
345 0x3f909068, 0x3f2fcc16, 0x05726490,
346 0x3fc0b070, 0x3f3fc80f, 0x04f26c8a,
347 0x0000d077, 0x3f4fc409, 0x04627484 },
348 },
349 { 0x3400, {
350 0x3f202040, 0x3f202040, 0x07a1e898,
351 0x3f303449, 0x3f100c38, 0x0741fc98,
352 0x3f504c50, 0x3f10002f, 0x06e21495,
353 0x3f706459, 0x3f1ff028, 0x06722492,
354 0x3fa08060, 0x3f1fe421, 0x05f2348f,
355 0x3fd09c67, 0x3f1fdc19, 0x05824c89,
356 0x0000bc6e, 0x3f2fd014, 0x04f25086,
357 0x0040dc74, 0x3f3fcc0d, 0x04825c7f },
358 },
359 { 0x3600, {
360 0x3f403042, 0x3f403042, 0x0761d890,
361 0x3f504848, 0x3f301c3b, 0x0701f090,
362 0x3f805c50, 0x3f200c33, 0x06a2008f,
363 0x3fa07458, 0x3f10002b, 0x06520c8d,
364 0x3fd0905e, 0x3f1ff424, 0x05e22089,
365 0x0000ac65, 0x3f1fe81d, 0x05823483,
366 0x0030cc6a, 0x3f2fdc18, 0x04f23c81,
367 0x0080e871, 0x3f2fd412, 0x0482407c },
368 },
369 { 0x3800, {
370 0x3f604043, 0x3f604043, 0x0721c88a,
371 0x3f80544a, 0x3f502c3c, 0x06d1d88a,
372 0x3fb06851, 0x3f301c35, 0x0681e889,
373 0x3fd08456, 0x3f30082f, 0x0611fc88,
374 0x00009c5d, 0x3f200027, 0x05d20884,
375 0x0030b863, 0x3f2ff421, 0x05621880,
376 0x0070d468, 0x3f2fe81b, 0x0502247c,
377 0x00c0ec6f, 0x3f2fe015, 0x04a22877 },
378 },
379 { 0x3a00, {
380 0x3f904c44, 0x3f904c44, 0x06e1b884,
381 0x3fb0604a, 0x3f70383e, 0x0691c885,
382 0x3fe07451, 0x3f502c36, 0x0661d483,
383 0x00009055, 0x3f401831, 0x0601ec81,
384 0x0030a85b, 0x3f300c2a, 0x05b1f480,
385 0x0070c061, 0x3f300024, 0x0562047a,
386 0x00b0d867, 0x3f3ff41e, 0x05020c77,
387 0x00f0f46b, 0x3f2fec19, 0x04a21474 },
388 },
389 { 0x3c00, {
390 0x3fb05c43, 0x3fb05c43, 0x06c1b07e,
391 0x3fe06c4b, 0x3f902c3f, 0x0681c081,
392 0x0000844f, 0x3f703838, 0x0631cc7d,
393 0x00309855, 0x3f602433, 0x05d1d47e,
394 0x0060b459, 0x3f50142e, 0x0581e47b,
395 0x00a0c85f, 0x3f400828, 0x0531f078,
396 0x00e0e064, 0x3f300021, 0x0501fc73,
397 0x00b0fc6a, 0x3f3ff41d, 0x04a20873 },
398 },
399 { 0x3e00, {
400 0x3fe06444, 0x3fe06444, 0x0681a07a,
401 0x00007849, 0x3fc0503f, 0x0641b07a,
402 0x0020904d, 0x3fa0403a, 0x05f1c07a,
403 0x0060a453, 0x3f803034, 0x05c1c878,
404 0x0090b858, 0x3f70202f, 0x0571d477,
405 0x00d0d05d, 0x3f501829, 0x0531e073,
406 0x0110e462, 0x3f500825, 0x04e1e471,
407 0x01510065, 0x3f40001f, 0x04a1f06d },
408 },
409 { 0x4000, {
410 0x00007044, 0x00007044, 0x06519476,
411 0x00208448, 0x3fe05c3f, 0x0621a476,
412 0x0050984d, 0x3fc04c3a, 0x05e1b075,
413 0x0080ac52, 0x3fa03c35, 0x05a1b875,
414 0x00c0c056, 0x3f803030, 0x0561c473,
415 0x0100d45b, 0x3f70202b, 0x0521d46f,
416 0x0140e860, 0x3f601427, 0x04d1d46e,
417 0x01810064, 0x3f500822, 0x0491dc6b },
418 },
419 { 0x5000, {
420 0x0110a442, 0x0110a442, 0x0551545e,
421 0x0140b045, 0x00e0983f, 0x0531585f,
422 0x0160c047, 0x00c08c3c, 0x0511645e,
423 0x0190cc4a, 0x00908039, 0x04f1685f,
424 0x01c0dc4c, 0x00707436, 0x04d1705e,
425 0x0200e850, 0x00506833, 0x04b1785b,
426 0x0230f453, 0x00305c30, 0x0491805a,
427 0x02710056, 0x0010542d, 0x04718059 },
428 },
429 { 0x6000, {
430 0x01c0bc40, 0x01c0bc40, 0x04c13052,
431 0x01e0c841, 0x01a0b43d, 0x04c13851,
432 0x0210cc44, 0x0180a83c, 0x04a13453,
433 0x0230d845, 0x0160a03a, 0x04913c52,
434 0x0260e047, 0x01409838, 0x04714052,
435 0x0280ec49, 0x01208c37, 0x04514c50,
436 0x02b0f44b, 0x01008435, 0x04414c50,
437 0x02d1004c, 0x00e07c33, 0x0431544f },
438 },
439 { 0x7000, {
440 0x0230c83e, 0x0230c83e, 0x04711c4c,
441 0x0250d03f, 0x0210c43c, 0x0471204b,
442 0x0270d840, 0x0200b83c, 0x0451244b,
443 0x0290dc42, 0x01e0b43a, 0x0441244c,
444 0x02b0e443, 0x01c0b038, 0x0441284b,
445 0x02d0ec44, 0x01b0a438, 0x0421304a,
446 0x02f0f445, 0x0190a036, 0x04213449,
447 0x0310f847, 0x01709c34, 0x04213848 },
448 },
449 { 0x8000, {
450 0x0280d03d, 0x0280d03d, 0x04310c48,
451 0x02a0d43e, 0x0270c83c, 0x04311047,
452 0x02b0dc3e, 0x0250c83a, 0x04311447,
453 0x02d0e040, 0x0240c03a, 0x04211446,
454 0x02e0e840, 0x0220bc39, 0x04111847,
455 0x0300e842, 0x0210b438, 0x04012445,
456 0x0310f043, 0x0200b037, 0x04012045,
457 0x0330f444, 0x01e0ac36, 0x03f12445 },
458 },
459 { 0xefff, {
460 0x0340dc3a, 0x0340dc3a, 0x03b0ec40,
461 0x0340e03a, 0x0330e039, 0x03c0f03e,
462 0x0350e03b, 0x0330dc39, 0x03c0ec3e,
463 0x0350e43a, 0x0320dc38, 0x03c0f43e,
464 0x0360e43b, 0x0320d839, 0x03b0f03e,
465 0x0360e83b, 0x0310d838, 0x03c0fc3b,
466 0x0370e83b, 0x0310d439, 0x03a0f83d,
467 0x0370e83c, 0x0300d438, 0x03b0fc3c },
468 }
469 };
470
471 enum rcar_vin_state {
472 STOPPED = 0,
473 RUNNING,
474 STOPPING,
475 };
476
477 struct rcar_vin_priv {
478 void __iomem *base;
479 spinlock_t lock;
480 int sequence;
481 /* State of the VIN module in capturing mode */
482 enum rcar_vin_state state;
483 struct soc_camera_host ici;
484 struct list_head capture;
485 #define MAX_BUFFER_NUM 3
486 struct vb2_v4l2_buffer *queue_buf[MAX_BUFFER_NUM];
487 struct vb2_alloc_ctx *alloc_ctx;
488 enum v4l2_field field;
489 unsigned int pdata_flags;
490 unsigned int vb_count;
491 unsigned int nr_hw_slots;
492 bool request_to_stop;
493 struct completion capture_stop;
494 enum chip_id chip;
495 };
496
497 #define is_continuous_transfer(priv) (priv->vb_count > MAX_BUFFER_NUM)
498
499 struct rcar_vin_buffer {
500 struct vb2_v4l2_buffer vb;
501 struct list_head list;
502 };
503
504 #define to_buf_list(vb2_buffer) (&container_of(vb2_buffer, \
505 struct rcar_vin_buffer, \
506 vb)->list)
507
508 struct rcar_vin_cam {
509 /* VIN offsets within the camera output, before the VIN scaler */
510 unsigned int vin_left;
511 unsigned int vin_top;
512 /* Client output, as seen by the VIN */
513 unsigned int width;
514 unsigned int height;
515 /* User window from S_FMT */
516 unsigned int out_width;
517 unsigned int out_height;
518 /*
519 * User window from S_CROP / G_CROP, produced by client cropping and
520 * scaling, VIN scaling and VIN cropping, mapped back onto the client
521 * input window
522 */
523 struct v4l2_rect subrect;
524 /* Camera cropping rectangle */
525 struct v4l2_rect rect;
526 const struct soc_mbus_pixelfmt *extra_fmt;
527 };
528
529 /*
530 * .queue_setup() is called to check whether the driver can accept the requested
531 * number of buffers and to fill in plane sizes for the current frame format if
532 * required
533 */
534 static int rcar_vin_videobuf_setup(struct vb2_queue *vq,
535 unsigned int *count,
536 unsigned int *num_planes,
537 unsigned int sizes[], void *alloc_ctxs[])
538 {
539 struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
540 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
541 struct rcar_vin_priv *priv = ici->priv;
542
543 alloc_ctxs[0] = priv->alloc_ctx;
544
545 if (!vq->num_buffers)
546 priv->sequence = 0;
547
548 if (!*count)
549 *count = 2;
550 priv->vb_count = *count;
551
552 /* Number of hardware slots */
553 if (is_continuous_transfer(priv))
554 priv->nr_hw_slots = MAX_BUFFER_NUM;
555 else
556 priv->nr_hw_slots = 1;
557
558 if (*num_planes)
559 return sizes[0] < icd->sizeimage ? -EINVAL : 0;
560
561 sizes[0] = icd->sizeimage;
562 *num_planes = 1;
563
564 dev_dbg(icd->parent, "count=%d, size=%u\n", *count, sizes[0]);
565
566 return 0;
567 }
568
569 static int rcar_vin_setup(struct rcar_vin_priv *priv)
570 {
571 struct soc_camera_device *icd = priv->ici.icd;
572 struct rcar_vin_cam *cam = icd->host_priv;
573 u32 vnmc, dmr, interrupts;
574 bool progressive = false, output_is_yuv = false, input_is_yuv = false;
575
576 switch (priv->field) {
577 case V4L2_FIELD_TOP:
578 vnmc = VNMC_IM_ODD;
579 break;
580 case V4L2_FIELD_BOTTOM:
581 vnmc = VNMC_IM_EVEN;
582 break;
583 case V4L2_FIELD_INTERLACED:
584 case V4L2_FIELD_INTERLACED_TB:
585 vnmc = VNMC_IM_FULL;
586 break;
587 case V4L2_FIELD_INTERLACED_BT:
588 vnmc = VNMC_IM_FULL | VNMC_FOC;
589 break;
590 case V4L2_FIELD_NONE:
591 if (is_continuous_transfer(priv)) {
592 vnmc = VNMC_IM_ODD_EVEN;
593 progressive = true;
594 } else {
595 vnmc = VNMC_IM_ODD;
596 }
597 break;
598 default:
599 vnmc = VNMC_IM_ODD;
600 break;
601 }
602
603 /* input interface */
604 switch (icd->current_fmt->code) {
605 case MEDIA_BUS_FMT_YUYV8_1X16:
606 /* BT.601/BT.1358 16bit YCbCr422 */
607 vnmc |= VNMC_INF_YUV16;
608 input_is_yuv = true;
609 break;
610 case MEDIA_BUS_FMT_YUYV8_2X8:
611 /* BT.656 8bit YCbCr422 or BT.601 8bit YCbCr422 */
612 vnmc |= priv->pdata_flags & RCAR_VIN_BT656 ?
613 VNMC_INF_YUV8_BT656 : VNMC_INF_YUV8_BT601;
614 input_is_yuv = true;
615 break;
616 case MEDIA_BUS_FMT_RGB888_1X24:
617 vnmc |= VNMC_INF_RGB888;
618 break;
619 case MEDIA_BUS_FMT_YUYV10_2X10:
620 /* BT.656 10bit YCbCr422 or BT.601 10bit YCbCr422 */
621 vnmc |= priv->pdata_flags & RCAR_VIN_BT656 ?
622 VNMC_INF_YUV10_BT656 : VNMC_INF_YUV10_BT601;
623 input_is_yuv = true;
624 break;
625 default:
626 break;
627 }
628
629 /* output format */
630 switch (icd->current_fmt->host_fmt->fourcc) {
631 case V4L2_PIX_FMT_NV16:
632 iowrite32(ALIGN(cam->width * cam->height, 0x80),
633 priv->base + VNUVAOF_REG);
634 dmr = VNDMR_DTMD_YCSEP;
635 output_is_yuv = true;
636 break;
637 case V4L2_PIX_FMT_YUYV:
638 dmr = VNDMR_BPSM;
639 output_is_yuv = true;
640 break;
641 case V4L2_PIX_FMT_UYVY:
642 dmr = 0;
643 output_is_yuv = true;
644 break;
645 case V4L2_PIX_FMT_RGB555X:
646 dmr = VNDMR_DTMD_ARGB;
647 break;
648 case V4L2_PIX_FMT_RGB565:
649 dmr = 0;
650 break;
651 case V4L2_PIX_FMT_RGB32:
652 if (priv->chip != RCAR_GEN2 && priv->chip != RCAR_H1 &&
653 priv->chip != RCAR_E1)
654 goto e_format;
655
656 dmr = VNDMR_EXRGB;
657 break;
658 case V4L2_PIX_FMT_ARGB32:
659 if (priv->chip != RCAR_GEN3)
660 goto e_format;
661
662 dmr = VNDMR_EXRGB | VNDMR_DTMD_ARGB;
663 break;
664 default:
665 goto e_format;
666 }
667
668 /* Always update on field change */
669 vnmc |= VNMC_VUP;
670
671 /* If input and output use the same colorspace, use bypass mode */
672 if (input_is_yuv == output_is_yuv)
673 vnmc |= VNMC_BPS;
674
675 /* progressive or interlaced mode */
676 interrupts = progressive ? VNIE_FIE : VNIE_EFE;
677
678 /* ack interrupts */
679 iowrite32(interrupts, priv->base + VNINTS_REG);
680 /* enable interrupts */
681 iowrite32(interrupts, priv->base + VNIE_REG);
682 /* start capturing */
683 iowrite32(dmr, priv->base + VNDMR_REG);
684 iowrite32(vnmc | VNMC_ME, priv->base + VNMC_REG);
685
686 return 0;
687
688 e_format:
689 dev_warn(icd->parent, "Invalid fourcc format (0x%x)\n",
690 icd->current_fmt->host_fmt->fourcc);
691 return -EINVAL;
692 }
693
694 static void rcar_vin_capture(struct rcar_vin_priv *priv)
695 {
696 if (is_continuous_transfer(priv))
697 /* Continuous Frame Capture Mode */
698 iowrite32(VNFC_C_FRAME, priv->base + VNFC_REG);
699 else
700 /* Single Frame Capture Mode */
701 iowrite32(VNFC_S_FRAME, priv->base + VNFC_REG);
702 }
703
704 static void rcar_vin_request_capture_stop(struct rcar_vin_priv *priv)
705 {
706 priv->state = STOPPING;
707
708 /* set continuous & single transfer off */
709 iowrite32(0, priv->base + VNFC_REG);
710 /* disable capture (release DMA buffer), reset */
711 iowrite32(ioread32(priv->base + VNMC_REG) & ~VNMC_ME,
712 priv->base + VNMC_REG);
713
714 /* update the status if stopped already */
715 if (!(ioread32(priv->base + VNMS_REG) & VNMS_CA))
716 priv->state = STOPPED;
717 }
718
719 static int rcar_vin_get_free_hw_slot(struct rcar_vin_priv *priv)
720 {
721 int slot;
722
723 for (slot = 0; slot < priv->nr_hw_slots; slot++)
724 if (priv->queue_buf[slot] == NULL)
725 return slot;
726
727 return -1;
728 }
729
730 static int rcar_vin_hw_ready(struct rcar_vin_priv *priv)
731 {
732 /* Ensure all HW slots are filled */
733 return rcar_vin_get_free_hw_slot(priv) < 0 ? 1 : 0;
734 }
735
736 /* Moves a buffer from the queue to the HW slots */
737 static int rcar_vin_fill_hw_slot(struct rcar_vin_priv *priv)
738 {
739 struct vb2_v4l2_buffer *vbuf;
740 dma_addr_t phys_addr_top;
741 int slot;
742
743 if (list_empty(&priv->capture))
744 return 0;
745
746 /* Find a free HW slot */
747 slot = rcar_vin_get_free_hw_slot(priv);
748 if (slot < 0)
749 return 0;
750
751 vbuf = &list_entry(priv->capture.next,
752 struct rcar_vin_buffer, list)->vb;
753 list_del_init(to_buf_list(vbuf));
754 priv->queue_buf[slot] = vbuf;
755 phys_addr_top = vb2_dma_contig_plane_dma_addr(&vbuf->vb2_buf, 0);
756 iowrite32(phys_addr_top, priv->base + VNMB_REG(slot));
757
758 return 1;
759 }
760
761 static void rcar_vin_videobuf_queue(struct vb2_buffer *vb)
762 {
763 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
764 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
765 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
766 struct rcar_vin_priv *priv = ici->priv;
767 unsigned long size;
768
769 size = icd->sizeimage;
770
771 if (vb2_plane_size(vb, 0) < size) {
772 dev_err(icd->parent, "Buffer #%d too small (%lu < %lu)\n",
773 vb->index, vb2_plane_size(vb, 0), size);
774 goto error;
775 }
776
777 vb2_set_plane_payload(vb, 0, size);
778
779 dev_dbg(icd->parent, "%s (vb=0x%p) 0x%p %lu\n", __func__,
780 vb, vb2_plane_vaddr(vb, 0), vb2_get_plane_payload(vb, 0));
781
782 spin_lock_irq(&priv->lock);
783
784 list_add_tail(to_buf_list(vbuf), &priv->capture);
785 rcar_vin_fill_hw_slot(priv);
786
787 /* If we weren't running, and have enough buffers, start capturing! */
788 if (priv->state != RUNNING && rcar_vin_hw_ready(priv)) {
789 if (rcar_vin_setup(priv)) {
790 /* Submit error */
791 list_del_init(to_buf_list(vbuf));
792 spin_unlock_irq(&priv->lock);
793 goto error;
794 }
795 priv->request_to_stop = false;
796 init_completion(&priv->capture_stop);
797 priv->state = RUNNING;
798 rcar_vin_capture(priv);
799 }
800
801 spin_unlock_irq(&priv->lock);
802
803 return;
804
805 error:
806 vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
807 }
808
809 /*
810 * Wait for capture to stop and all in-flight buffers to be finished with by
811 * the video hardware. This must be called under &priv->lock
812 *
813 */
814 static void rcar_vin_wait_stop_streaming(struct rcar_vin_priv *priv)
815 {
816 while (priv->state != STOPPED) {
817 /* issue stop if running */
818 if (priv->state == RUNNING)
819 rcar_vin_request_capture_stop(priv);
820
821 /* wait until capturing has been stopped */
822 if (priv->state == STOPPING) {
823 priv->request_to_stop = true;
824 spin_unlock_irq(&priv->lock);
825 if (!wait_for_completion_timeout(
826 &priv->capture_stop,
827 msecs_to_jiffies(TIMEOUT_MS)))
828 priv->state = STOPPED;
829 spin_lock_irq(&priv->lock);
830 }
831 }
832 }
833
834 static void rcar_vin_stop_streaming(struct vb2_queue *vq)
835 {
836 struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
837 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
838 struct rcar_vin_priv *priv = ici->priv;
839 struct list_head *buf_head, *tmp;
840 int i;
841
842 spin_lock_irq(&priv->lock);
843 rcar_vin_wait_stop_streaming(priv);
844
845 for (i = 0; i < MAX_BUFFER_NUM; i++) {
846 if (priv->queue_buf[i]) {
847 vb2_buffer_done(&priv->queue_buf[i]->vb2_buf,
848 VB2_BUF_STATE_ERROR);
849 priv->queue_buf[i] = NULL;
850 }
851 }
852
853 list_for_each_safe(buf_head, tmp, &priv->capture) {
854 vb2_buffer_done(&list_entry(buf_head,
855 struct rcar_vin_buffer, list)->vb.vb2_buf,
856 VB2_BUF_STATE_ERROR);
857 list_del_init(buf_head);
858 }
859 spin_unlock_irq(&priv->lock);
860 }
861
862 static struct vb2_ops rcar_vin_vb2_ops = {
863 .queue_setup = rcar_vin_videobuf_setup,
864 .buf_queue = rcar_vin_videobuf_queue,
865 .stop_streaming = rcar_vin_stop_streaming,
866 .wait_prepare = vb2_ops_wait_prepare,
867 .wait_finish = vb2_ops_wait_finish,
868 };
869
870 static irqreturn_t rcar_vin_irq(int irq, void *data)
871 {
872 struct rcar_vin_priv *priv = data;
873 u32 int_status;
874 bool can_run = false, hw_stopped;
875 int slot;
876 unsigned int handled = 0;
877
878 spin_lock(&priv->lock);
879
880 int_status = ioread32(priv->base + VNINTS_REG);
881 if (!int_status)
882 goto done;
883 /* ack interrupts */
884 iowrite32(int_status, priv->base + VNINTS_REG);
885 handled = 1;
886
887 /* nothing to do if capture status is 'STOPPED' */
888 if (priv->state == STOPPED)
889 goto done;
890
891 hw_stopped = !(ioread32(priv->base + VNMS_REG) & VNMS_CA);
892
893 if (!priv->request_to_stop) {
894 if (is_continuous_transfer(priv))
895 slot = (ioread32(priv->base + VNMS_REG) &
896 VNMS_FBS_MASK) >> VNMS_FBS_SHIFT;
897 else
898 slot = 0;
899
900 priv->queue_buf[slot]->field = priv->field;
901 priv->queue_buf[slot]->sequence = priv->sequence++;
902 priv->queue_buf[slot]->vb2_buf.timestamp = ktime_get_ns();
903 vb2_buffer_done(&priv->queue_buf[slot]->vb2_buf,
904 VB2_BUF_STATE_DONE);
905 priv->queue_buf[slot] = NULL;
906
907 if (priv->state != STOPPING)
908 can_run = rcar_vin_fill_hw_slot(priv);
909
910 if (hw_stopped || !can_run) {
911 priv->state = STOPPED;
912 } else if (is_continuous_transfer(priv) &&
913 list_empty(&priv->capture) &&
914 priv->state == RUNNING) {
915 /*
916 * The continuous capturing requires an explicit stop
917 * operation when there is no buffer to be set into
918 * the VnMBm registers.
919 */
920 rcar_vin_request_capture_stop(priv);
921 } else {
922 rcar_vin_capture(priv);
923 }
924
925 } else if (hw_stopped) {
926 priv->state = STOPPED;
927 priv->request_to_stop = false;
928 complete(&priv->capture_stop);
929 }
930
931 done:
932 spin_unlock(&priv->lock);
933
934 return IRQ_RETVAL(handled);
935 }
936
937 static int rcar_vin_add_device(struct soc_camera_device *icd)
938 {
939 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
940 struct rcar_vin_priv *priv = ici->priv;
941 int i;
942
943 for (i = 0; i < MAX_BUFFER_NUM; i++)
944 priv->queue_buf[i] = NULL;
945
946 pm_runtime_get_sync(ici->v4l2_dev.dev);
947
948 dev_dbg(icd->parent, "R-Car VIN driver attached to camera %d\n",
949 icd->devnum);
950
951 return 0;
952 }
953
954 static void rcar_vin_remove_device(struct soc_camera_device *icd)
955 {
956 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
957 struct rcar_vin_priv *priv = ici->priv;
958 struct vb2_v4l2_buffer *vbuf;
959 int i;
960
961 /* disable capture, disable interrupts */
962 iowrite32(ioread32(priv->base + VNMC_REG) & ~VNMC_ME,
963 priv->base + VNMC_REG);
964 iowrite32(0, priv->base + VNIE_REG);
965
966 priv->state = STOPPED;
967 priv->request_to_stop = false;
968
969 /* make sure active buffer is cancelled */
970 spin_lock_irq(&priv->lock);
971 for (i = 0; i < MAX_BUFFER_NUM; i++) {
972 vbuf = priv->queue_buf[i];
973 if (vbuf) {
974 list_del_init(to_buf_list(vbuf));
975 vb2_buffer_done(&vbuf->vb2_buf, VB2_BUF_STATE_ERROR);
976 }
977 }
978 spin_unlock_irq(&priv->lock);
979
980 pm_runtime_put(ici->v4l2_dev.dev);
981
982 dev_dbg(icd->parent, "R-Car VIN driver detached from camera %d\n",
983 icd->devnum);
984 }
985
986 static void set_coeff(struct rcar_vin_priv *priv, unsigned short xs)
987 {
988 int i;
989 const struct vin_coeff *p_prev_set = NULL;
990 const struct vin_coeff *p_set = NULL;
991
992 /* Look for suitable coefficient values */
993 for (i = 0; i < ARRAY_SIZE(vin_coeff_set); i++) {
994 p_prev_set = p_set;
995 p_set = &vin_coeff_set[i];
996
997 if (xs < p_set->xs_value)
998 break;
999 }
1000
1001 /* Use previous value if its XS value is closer */
1002 if (p_prev_set && p_set &&
1003 xs - p_prev_set->xs_value < p_set->xs_value - xs)
1004 p_set = p_prev_set;
1005
1006 /* Set coefficient registers */
1007 iowrite32(p_set->coeff_set[0], priv->base + VNC1A_REG);
1008 iowrite32(p_set->coeff_set[1], priv->base + VNC1B_REG);
1009 iowrite32(p_set->coeff_set[2], priv->base + VNC1C_REG);
1010
1011 iowrite32(p_set->coeff_set[3], priv->base + VNC2A_REG);
1012 iowrite32(p_set->coeff_set[4], priv->base + VNC2B_REG);
1013 iowrite32(p_set->coeff_set[5], priv->base + VNC2C_REG);
1014
1015 iowrite32(p_set->coeff_set[6], priv->base + VNC3A_REG);
1016 iowrite32(p_set->coeff_set[7], priv->base + VNC3B_REG);
1017 iowrite32(p_set->coeff_set[8], priv->base + VNC3C_REG);
1018
1019 iowrite32(p_set->coeff_set[9], priv->base + VNC4A_REG);
1020 iowrite32(p_set->coeff_set[10], priv->base + VNC4B_REG);
1021 iowrite32(p_set->coeff_set[11], priv->base + VNC4C_REG);
1022
1023 iowrite32(p_set->coeff_set[12], priv->base + VNC5A_REG);
1024 iowrite32(p_set->coeff_set[13], priv->base + VNC5B_REG);
1025 iowrite32(p_set->coeff_set[14], priv->base + VNC5C_REG);
1026
1027 iowrite32(p_set->coeff_set[15], priv->base + VNC6A_REG);
1028 iowrite32(p_set->coeff_set[16], priv->base + VNC6B_REG);
1029 iowrite32(p_set->coeff_set[17], priv->base + VNC6C_REG);
1030
1031 iowrite32(p_set->coeff_set[18], priv->base + VNC7A_REG);
1032 iowrite32(p_set->coeff_set[19], priv->base + VNC7B_REG);
1033 iowrite32(p_set->coeff_set[20], priv->base + VNC7C_REG);
1034
1035 iowrite32(p_set->coeff_set[21], priv->base + VNC8A_REG);
1036 iowrite32(p_set->coeff_set[22], priv->base + VNC8B_REG);
1037 iowrite32(p_set->coeff_set[23], priv->base + VNC8C_REG);
1038 }
1039
1040 /* rect is guaranteed to not exceed the scaled camera rectangle */
1041 static int rcar_vin_set_rect(struct soc_camera_device *icd)
1042 {
1043 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
1044 struct rcar_vin_cam *cam = icd->host_priv;
1045 struct rcar_vin_priv *priv = ici->priv;
1046 unsigned int left_offset, top_offset;
1047 unsigned char dsize = 0;
1048 struct v4l2_rect *cam_subrect = &cam->subrect;
1049 u32 value;
1050
1051 dev_dbg(icd->parent, "Crop %ux%u@%u:%u\n",
1052 icd->user_width, icd->user_height, cam->vin_left, cam->vin_top);
1053
1054 left_offset = cam->vin_left;
1055 top_offset = cam->vin_top;
1056
1057 if (icd->current_fmt->host_fmt->fourcc == V4L2_PIX_FMT_RGB32 &&
1058 priv->chip == RCAR_E1)
1059 dsize = 1;
1060
1061 dev_dbg(icd->parent, "Cam %ux%u@%u:%u\n",
1062 cam->width, cam->height, cam->vin_left, cam->vin_top);
1063 dev_dbg(icd->parent, "Cam subrect %ux%u@%u:%u\n",
1064 cam_subrect->width, cam_subrect->height,
1065 cam_subrect->left, cam_subrect->top);
1066
1067 /* Set Start/End Pixel/Line Pre-Clip */
1068 iowrite32(left_offset << dsize, priv->base + VNSPPRC_REG);
1069 iowrite32((left_offset + cam_subrect->width - 1) << dsize,
1070 priv->base + VNEPPRC_REG);
1071 switch (priv->field) {
1072 case V4L2_FIELD_INTERLACED:
1073 case V4L2_FIELD_INTERLACED_TB:
1074 case V4L2_FIELD_INTERLACED_BT:
1075 iowrite32(top_offset / 2, priv->base + VNSLPRC_REG);
1076 iowrite32((top_offset + cam_subrect->height) / 2 - 1,
1077 priv->base + VNELPRC_REG);
1078 break;
1079 default:
1080 iowrite32(top_offset, priv->base + VNSLPRC_REG);
1081 iowrite32(top_offset + cam_subrect->height - 1,
1082 priv->base + VNELPRC_REG);
1083 break;
1084 }
1085
1086 /* Set scaling coefficient */
1087 value = 0;
1088 if (cam_subrect->height != cam->out_height)
1089 value = (4096 * cam_subrect->height) / cam->out_height;
1090 dev_dbg(icd->parent, "YS Value: %x\n", value);
1091 iowrite32(value, priv->base + VNYS_REG);
1092
1093 value = 0;
1094 if (cam_subrect->width != cam->out_width)
1095 value = (4096 * cam_subrect->width) / cam->out_width;
1096
1097 /* Horizontal upscaling is up to double size */
1098 if (0 < value && value < 2048)
1099 value = 2048;
1100
1101 dev_dbg(icd->parent, "XS Value: %x\n", value);
1102 iowrite32(value, priv->base + VNXS_REG);
1103
1104 /* Horizontal upscaling is carried out by scaling down from double size */
1105 if (value < 4096)
1106 value *= 2;
1107
1108 set_coeff(priv, value);
1109
1110 /* Set Start/End Pixel/Line Post-Clip */
1111 iowrite32(0, priv->base + VNSPPOC_REG);
1112 iowrite32(0, priv->base + VNSLPOC_REG);
1113 iowrite32((cam->out_width - 1) << dsize, priv->base + VNEPPOC_REG);
1114 switch (priv->field) {
1115 case V4L2_FIELD_INTERLACED:
1116 case V4L2_FIELD_INTERLACED_TB:
1117 case V4L2_FIELD_INTERLACED_BT:
1118 iowrite32(cam->out_height / 2 - 1,
1119 priv->base + VNELPOC_REG);
1120 break;
1121 default:
1122 iowrite32(cam->out_height - 1, priv->base + VNELPOC_REG);
1123 break;
1124 }
1125
1126 iowrite32(ALIGN(cam->out_width, 0x10), priv->base + VNIS_REG);
1127
1128 return 0;
1129 }
1130
1131 static void capture_stop_preserve(struct rcar_vin_priv *priv, u32 *vnmc)
1132 {
1133 *vnmc = ioread32(priv->base + VNMC_REG);
1134 /* module disable */
1135 iowrite32(*vnmc & ~VNMC_ME, priv->base + VNMC_REG);
1136 }
1137
1138 static void capture_restore(struct rcar_vin_priv *priv, u32 vnmc)
1139 {
1140 unsigned long timeout = jiffies + 10 * HZ;
1141
1142 /*
1143 * Wait until the end of the current frame. It can take a long time,
1144 * but if it has been aborted by a MRST1 reset, it should exit sooner.
1145 */
1146 while ((ioread32(priv->base + VNMS_REG) & VNMS_AV) &&
1147 time_before(jiffies, timeout))
1148 msleep(1);
1149
1150 if (time_after(jiffies, timeout)) {
1151 dev_err(priv->ici.v4l2_dev.dev,
1152 "Timeout waiting for frame end! Interface problem?\n");
1153 return;
1154 }
1155
1156 iowrite32(vnmc, priv->base + VNMC_REG);
1157 }
1158
1159 #define VIN_MBUS_FLAGS (V4L2_MBUS_MASTER | \
1160 V4L2_MBUS_PCLK_SAMPLE_RISING | \
1161 V4L2_MBUS_HSYNC_ACTIVE_HIGH | \
1162 V4L2_MBUS_HSYNC_ACTIVE_LOW | \
1163 V4L2_MBUS_VSYNC_ACTIVE_HIGH | \
1164 V4L2_MBUS_VSYNC_ACTIVE_LOW | \
1165 V4L2_MBUS_DATA_ACTIVE_HIGH)
1166
1167 static int rcar_vin_set_bus_param(struct soc_camera_device *icd)
1168 {
1169 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
1170 struct rcar_vin_priv *priv = ici->priv;
1171 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1172 struct v4l2_mbus_config cfg;
1173 unsigned long common_flags;
1174 u32 vnmc;
1175 u32 val;
1176 int ret;
1177
1178 capture_stop_preserve(priv, &vnmc);
1179
1180 ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
1181 if (!ret) {
1182 common_flags = soc_mbus_config_compatible(&cfg, VIN_MBUS_FLAGS);
1183 if (!common_flags) {
1184 dev_warn(icd->parent,
1185 "MBUS flags incompatible: camera 0x%x, host 0x%x\n",
1186 cfg.flags, VIN_MBUS_FLAGS);
1187 return -EINVAL;
1188 }
1189 } else if (ret != -ENOIOCTLCMD) {
1190 return ret;
1191 } else {
1192 common_flags = VIN_MBUS_FLAGS;
1193 }
1194
1195 /* Make choises, based on platform preferences */
1196 if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
1197 (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
1198 if (priv->pdata_flags & RCAR_VIN_HSYNC_ACTIVE_LOW)
1199 common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
1200 else
1201 common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
1202 }
1203
1204 if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
1205 (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
1206 if (priv->pdata_flags & RCAR_VIN_VSYNC_ACTIVE_LOW)
1207 common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
1208 else
1209 common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
1210 }
1211
1212 cfg.flags = common_flags;
1213 ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
1214 if (ret < 0 && ret != -ENOIOCTLCMD)
1215 return ret;
1216
1217 val = VNDMR2_FTEV | VNDMR2_VLV(1);
1218 if (!(common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW))
1219 val |= VNDMR2_VPS;
1220 if (!(common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW))
1221 val |= VNDMR2_HPS;
1222 iowrite32(val, priv->base + VNDMR2_REG);
1223
1224 ret = rcar_vin_set_rect(icd);
1225 if (ret < 0)
1226 return ret;
1227
1228 capture_restore(priv, vnmc);
1229
1230 return 0;
1231 }
1232
1233 static int rcar_vin_try_bus_param(struct soc_camera_device *icd,
1234 unsigned char buswidth)
1235 {
1236 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1237 struct v4l2_mbus_config cfg;
1238 int ret;
1239
1240 ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
1241 if (ret == -ENOIOCTLCMD)
1242 return 0;
1243 else if (ret)
1244 return ret;
1245
1246 if (buswidth > 24)
1247 return -EINVAL;
1248
1249 /* check is there common mbus flags */
1250 ret = soc_mbus_config_compatible(&cfg, VIN_MBUS_FLAGS);
1251 if (ret)
1252 return 0;
1253
1254 dev_warn(icd->parent,
1255 "MBUS flags incompatible: camera 0x%x, host 0x%x\n",
1256 cfg.flags, VIN_MBUS_FLAGS);
1257
1258 return -EINVAL;
1259 }
1260
1261 static bool rcar_vin_packing_supported(const struct soc_mbus_pixelfmt *fmt)
1262 {
1263 return fmt->packing == SOC_MBUS_PACKING_NONE ||
1264 (fmt->bits_per_sample > 8 &&
1265 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
1266 }
1267
1268 static const struct soc_mbus_pixelfmt rcar_vin_formats[] = {
1269 {
1270 .fourcc = V4L2_PIX_FMT_NV16,
1271 .name = "NV16",
1272 .bits_per_sample = 8,
1273 .packing = SOC_MBUS_PACKING_2X8_PADHI,
1274 .order = SOC_MBUS_ORDER_LE,
1275 .layout = SOC_MBUS_LAYOUT_PLANAR_Y_C,
1276 },
1277 {
1278 .fourcc = V4L2_PIX_FMT_YUYV,
1279 .name = "YUYV",
1280 .bits_per_sample = 16,
1281 .packing = SOC_MBUS_PACKING_NONE,
1282 .order = SOC_MBUS_ORDER_LE,
1283 .layout = SOC_MBUS_LAYOUT_PACKED,
1284 },
1285 {
1286 .fourcc = V4L2_PIX_FMT_UYVY,
1287 .name = "UYVY",
1288 .bits_per_sample = 16,
1289 .packing = SOC_MBUS_PACKING_NONE,
1290 .order = SOC_MBUS_ORDER_LE,
1291 .layout = SOC_MBUS_LAYOUT_PACKED,
1292 },
1293 {
1294 .fourcc = V4L2_PIX_FMT_RGB565,
1295 .name = "RGB565",
1296 .bits_per_sample = 16,
1297 .packing = SOC_MBUS_PACKING_NONE,
1298 .order = SOC_MBUS_ORDER_LE,
1299 .layout = SOC_MBUS_LAYOUT_PACKED,
1300 },
1301 {
1302 .fourcc = V4L2_PIX_FMT_RGB555X,
1303 .name = "ARGB1555",
1304 .bits_per_sample = 16,
1305 .packing = SOC_MBUS_PACKING_NONE,
1306 .order = SOC_MBUS_ORDER_LE,
1307 .layout = SOC_MBUS_LAYOUT_PACKED,
1308 },
1309 {
1310 .fourcc = V4L2_PIX_FMT_RGB32,
1311 .name = "RGB888",
1312 .bits_per_sample = 32,
1313 .packing = SOC_MBUS_PACKING_NONE,
1314 .order = SOC_MBUS_ORDER_LE,
1315 .layout = SOC_MBUS_LAYOUT_PACKED,
1316 },
1317 {
1318 .fourcc = V4L2_PIX_FMT_ARGB32,
1319 .name = "ARGB8888",
1320 .bits_per_sample = 32,
1321 .packing = SOC_MBUS_PACKING_NONE,
1322 .order = SOC_MBUS_ORDER_LE,
1323 .layout = SOC_MBUS_LAYOUT_PACKED,
1324 },
1325 };
1326
1327 static int rcar_vin_get_formats(struct soc_camera_device *icd, unsigned int idx,
1328 struct soc_camera_format_xlate *xlate)
1329 {
1330 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1331 struct device *dev = icd->parent;
1332 int ret, k, n;
1333 int formats = 0;
1334 struct rcar_vin_cam *cam;
1335 struct v4l2_subdev_mbus_code_enum code = {
1336 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1337 .index = idx,
1338 };
1339 const struct soc_mbus_pixelfmt *fmt;
1340
1341 ret = v4l2_subdev_call(sd, pad, enum_mbus_code, NULL, &code);
1342 if (ret < 0)
1343 return 0;
1344
1345 fmt = soc_mbus_get_fmtdesc(code.code);
1346 if (!fmt) {
1347 dev_warn(dev, "unsupported format code #%u: %d\n", idx, code.code);
1348 return 0;
1349 }
1350
1351 ret = rcar_vin_try_bus_param(icd, fmt->bits_per_sample);
1352 if (ret < 0)
1353 return 0;
1354
1355 if (!icd->host_priv) {
1356 struct v4l2_subdev_format fmt = {
1357 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1358 };
1359 struct v4l2_mbus_framefmt *mf = &fmt.format;
1360 struct v4l2_rect rect;
1361 struct device *dev = icd->parent;
1362 int shift;
1363
1364 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt);
1365 if (ret < 0)
1366 return ret;
1367
1368 /* Cache current client geometry */
1369 ret = soc_camera_client_g_rect(sd, &rect);
1370 if (ret == -ENOIOCTLCMD) {
1371 /* Sensor driver doesn't support cropping */
1372 rect.left = 0;
1373 rect.top = 0;
1374 rect.width = mf->width;
1375 rect.height = mf->height;
1376 } else if (ret < 0) {
1377 return ret;
1378 }
1379
1380 /*
1381 * If sensor proposes too large format then try smaller ones:
1382 * 1280x960, 640x480, 320x240
1383 */
1384 for (shift = 0; shift < 3; shift++) {
1385 if (mf->width <= VIN_MAX_WIDTH &&
1386 mf->height <= VIN_MAX_HEIGHT)
1387 break;
1388
1389 mf->width = 1280 >> shift;
1390 mf->height = 960 >> shift;
1391 ret = v4l2_device_call_until_err(sd->v4l2_dev,
1392 soc_camera_grp_id(icd),
1393 pad, set_fmt, NULL,
1394 &fmt);
1395 if (ret < 0)
1396 return ret;
1397 }
1398
1399 if (shift == 3) {
1400 dev_err(dev,
1401 "Failed to configure the client below %ux%u\n",
1402 mf->width, mf->height);
1403 return -EIO;
1404 }
1405
1406 dev_dbg(dev, "camera fmt %ux%u\n", mf->width, mf->height);
1407
1408 cam = kzalloc(sizeof(*cam), GFP_KERNEL);
1409 if (!cam)
1410 return -ENOMEM;
1411 /*
1412 * We are called with current camera crop,
1413 * initialise subrect with it
1414 */
1415 cam->rect = rect;
1416 cam->subrect = rect;
1417 cam->width = mf->width;
1418 cam->height = mf->height;
1419 cam->out_width = mf->width;
1420 cam->out_height = mf->height;
1421
1422 icd->host_priv = cam;
1423 } else {
1424 cam = icd->host_priv;
1425 }
1426
1427 /* Beginning of a pass */
1428 if (!idx)
1429 cam->extra_fmt = NULL;
1430
1431 switch (code.code) {
1432 case MEDIA_BUS_FMT_YUYV8_1X16:
1433 case MEDIA_BUS_FMT_YUYV8_2X8:
1434 case MEDIA_BUS_FMT_YUYV10_2X10:
1435 case MEDIA_BUS_FMT_RGB888_1X24:
1436 if (cam->extra_fmt)
1437 break;
1438
1439 /* Add all our formats that can be generated by VIN */
1440 cam->extra_fmt = rcar_vin_formats;
1441
1442 n = ARRAY_SIZE(rcar_vin_formats);
1443 formats += n;
1444 for (k = 0; xlate && k < n; k++, xlate++) {
1445 xlate->host_fmt = &rcar_vin_formats[k];
1446 xlate->code = code.code;
1447 dev_dbg(dev, "Providing format %s using code %d\n",
1448 rcar_vin_formats[k].name, code.code);
1449 }
1450 break;
1451 default:
1452 if (!rcar_vin_packing_supported(fmt))
1453 return 0;
1454
1455 dev_dbg(dev, "Providing format %s in pass-through mode\n",
1456 fmt->name);
1457 break;
1458 }
1459
1460 /* Generic pass-through */
1461 formats++;
1462 if (xlate) {
1463 xlate->host_fmt = fmt;
1464 xlate->code = code.code;
1465 xlate++;
1466 }
1467
1468 return formats;
1469 }
1470
1471 static void rcar_vin_put_formats(struct soc_camera_device *icd)
1472 {
1473 kfree(icd->host_priv);
1474 icd->host_priv = NULL;
1475 }
1476
1477 static int rcar_vin_set_crop(struct soc_camera_device *icd,
1478 const struct v4l2_crop *a)
1479 {
1480 struct v4l2_crop a_writable = *a;
1481 const struct v4l2_rect *rect = &a_writable.c;
1482 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
1483 struct rcar_vin_priv *priv = ici->priv;
1484 struct v4l2_crop cam_crop;
1485 struct rcar_vin_cam *cam = icd->host_priv;
1486 struct v4l2_rect *cam_rect = &cam_crop.c;
1487 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1488 struct device *dev = icd->parent;
1489 struct v4l2_subdev_format fmt = {
1490 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1491 };
1492 struct v4l2_mbus_framefmt *mf = &fmt.format;
1493 u32 vnmc;
1494 int ret, i;
1495
1496 dev_dbg(dev, "S_CROP(%ux%u@%u:%u)\n", rect->width, rect->height,
1497 rect->left, rect->top);
1498
1499 /* During camera cropping its output window can change too, stop VIN */
1500 capture_stop_preserve(priv, &vnmc);
1501 dev_dbg(dev, "VNMC_REG 0x%x\n", vnmc);
1502
1503 /* Apply iterative camera S_CROP for new input window. */
1504 ret = soc_camera_client_s_crop(sd, &a_writable, &cam_crop,
1505 &cam->rect, &cam->subrect);
1506 if (ret < 0)
1507 return ret;
1508
1509 dev_dbg(dev, "camera cropped to %ux%u@%u:%u\n",
1510 cam_rect->width, cam_rect->height,
1511 cam_rect->left, cam_rect->top);
1512
1513 /* On success cam_crop contains current camera crop */
1514
1515 /* Retrieve camera output window */
1516 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt);
1517 if (ret < 0)
1518 return ret;
1519
1520 if (mf->width > VIN_MAX_WIDTH || mf->height > VIN_MAX_HEIGHT)
1521 return -EINVAL;
1522
1523 /* Cache camera output window */
1524 cam->width = mf->width;
1525 cam->height = mf->height;
1526
1527 icd->user_width = cam->width;
1528 icd->user_height = cam->height;
1529
1530 cam->vin_left = rect->left & ~1;
1531 cam->vin_top = rect->top & ~1;
1532
1533 /* Use VIN cropping to crop to the new window. */
1534 ret = rcar_vin_set_rect(icd);
1535 if (ret < 0)
1536 return ret;
1537
1538 cam->subrect = *rect;
1539
1540 dev_dbg(dev, "VIN cropped to %ux%u@%u:%u\n",
1541 icd->user_width, icd->user_height,
1542 cam->vin_left, cam->vin_top);
1543
1544 /* Restore capture */
1545 for (i = 0; i < MAX_BUFFER_NUM; i++) {
1546 if (priv->queue_buf[i] && priv->state == STOPPED) {
1547 vnmc |= VNMC_ME;
1548 break;
1549 }
1550 }
1551 capture_restore(priv, vnmc);
1552
1553 /* Even if only camera cropping succeeded */
1554 return ret;
1555 }
1556
1557 static int rcar_vin_get_crop(struct soc_camera_device *icd,
1558 struct v4l2_crop *a)
1559 {
1560 struct rcar_vin_cam *cam = icd->host_priv;
1561
1562 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1563 a->c = cam->subrect;
1564
1565 return 0;
1566 }
1567
1568 /* Similar to set_crop multistage iterative algorithm */
1569 static int rcar_vin_set_fmt(struct soc_camera_device *icd,
1570 struct v4l2_format *f)
1571 {
1572 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
1573 struct rcar_vin_priv *priv = ici->priv;
1574 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1575 struct rcar_vin_cam *cam = icd->host_priv;
1576 struct v4l2_pix_format *pix = &f->fmt.pix;
1577 struct v4l2_mbus_framefmt mf;
1578 struct device *dev = icd->parent;
1579 __u32 pixfmt = pix->pixelformat;
1580 const struct soc_camera_format_xlate *xlate;
1581 unsigned int vin_sub_width = 0, vin_sub_height = 0;
1582 int ret;
1583 bool can_scale;
1584 enum v4l2_field field;
1585 v4l2_std_id std;
1586
1587 dev_dbg(dev, "S_FMT(pix=0x%x, %ux%u)\n",
1588 pixfmt, pix->width, pix->height);
1589
1590 switch (pix->field) {
1591 default:
1592 pix->field = V4L2_FIELD_NONE;
1593 /* fall-through */
1594 case V4L2_FIELD_NONE:
1595 case V4L2_FIELD_TOP:
1596 case V4L2_FIELD_BOTTOM:
1597 case V4L2_FIELD_INTERLACED_TB:
1598 case V4L2_FIELD_INTERLACED_BT:
1599 field = pix->field;
1600 break;
1601 case V4L2_FIELD_INTERLACED:
1602 /* Query for standard if not explicitly mentioned _TB/_BT */
1603 ret = v4l2_subdev_call(sd, video, querystd, &std);
1604 if (ret == -ENOIOCTLCMD) {
1605 field = V4L2_FIELD_NONE;
1606 } else if (ret < 0) {
1607 return ret;
1608 } else {
1609 field = std & V4L2_STD_625_50 ?
1610 V4L2_FIELD_INTERLACED_TB :
1611 V4L2_FIELD_INTERLACED_BT;
1612 }
1613 break;
1614 }
1615
1616 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
1617 if (!xlate) {
1618 dev_warn(dev, "Format %x not found\n", pixfmt);
1619 return -EINVAL;
1620 }
1621 /* Calculate client output geometry */
1622 soc_camera_calc_client_output(icd, &cam->rect, &cam->subrect, pix, &mf,
1623 12);
1624 mf.field = pix->field;
1625 mf.colorspace = pix->colorspace;
1626 mf.code = xlate->code;
1627
1628 switch (pixfmt) {
1629 case V4L2_PIX_FMT_RGB32:
1630 can_scale = priv->chip != RCAR_E1;
1631 break;
1632 case V4L2_PIX_FMT_ARGB32:
1633 case V4L2_PIX_FMT_UYVY:
1634 case V4L2_PIX_FMT_YUYV:
1635 case V4L2_PIX_FMT_RGB565:
1636 case V4L2_PIX_FMT_RGB555X:
1637 can_scale = true;
1638 break;
1639 default:
1640 can_scale = false;
1641 break;
1642 }
1643
1644 dev_dbg(dev, "request camera output %ux%u\n", mf.width, mf.height);
1645
1646 ret = soc_camera_client_scale(icd, &cam->rect, &cam->subrect,
1647 &mf, &vin_sub_width, &vin_sub_height,
1648 can_scale, 12);
1649
1650 /* Done with the camera. Now see if we can improve the result */
1651 dev_dbg(dev, "Camera %d fmt %ux%u, requested %ux%u\n",
1652 ret, mf.width, mf.height, pix->width, pix->height);
1653
1654 if (ret == -ENOIOCTLCMD)
1655 dev_dbg(dev, "Sensor doesn't support scaling\n");
1656 else if (ret < 0)
1657 return ret;
1658
1659 if (mf.code != xlate->code)
1660 return -EINVAL;
1661
1662 /* Prepare VIN crop */
1663 cam->width = mf.width;
1664 cam->height = mf.height;
1665
1666 /* Use VIN scaling to scale to the requested user window. */
1667
1668 /* We cannot scale up */
1669 if (pix->width > vin_sub_width)
1670 vin_sub_width = pix->width;
1671
1672 if (pix->height > vin_sub_height)
1673 vin_sub_height = pix->height;
1674
1675 pix->colorspace = mf.colorspace;
1676
1677 if (!can_scale) {
1678 pix->width = vin_sub_width;
1679 pix->height = vin_sub_height;
1680 }
1681
1682 /*
1683 * We have calculated CFLCR, the actual configuration will be performed
1684 * in rcar_vin_set_bus_param()
1685 */
1686
1687 dev_dbg(dev, "W: %u : %u, H: %u : %u\n",
1688 vin_sub_width, pix->width, vin_sub_height, pix->height);
1689
1690 cam->out_width = pix->width;
1691 cam->out_height = pix->height;
1692
1693 icd->current_fmt = xlate;
1694
1695 priv->field = field;
1696
1697 return 0;
1698 }
1699
1700 static int rcar_vin_try_fmt(struct soc_camera_device *icd,
1701 struct v4l2_format *f)
1702 {
1703 const struct soc_camera_format_xlate *xlate;
1704 struct v4l2_pix_format *pix = &f->fmt.pix;
1705 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
1706 struct v4l2_subdev_pad_config pad_cfg;
1707 struct v4l2_subdev_format format = {
1708 .which = V4L2_SUBDEV_FORMAT_TRY,
1709 };
1710 struct v4l2_mbus_framefmt *mf = &format.format;
1711 __u32 pixfmt = pix->pixelformat;
1712 int width, height;
1713 int ret;
1714
1715 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
1716 if (!xlate) {
1717 xlate = icd->current_fmt;
1718 dev_dbg(icd->parent, "Format %x not found, keeping %x\n",
1719 pixfmt, xlate->host_fmt->fourcc);
1720 pixfmt = xlate->host_fmt->fourcc;
1721 pix->pixelformat = pixfmt;
1722 pix->colorspace = icd->colorspace;
1723 }
1724
1725 /* FIXME: calculate using depth and bus width */
1726 v4l_bound_align_image(&pix->width, 2, VIN_MAX_WIDTH, 1,
1727 &pix->height, 4, VIN_MAX_HEIGHT, 2, 0);
1728
1729 width = pix->width;
1730 height = pix->height;
1731
1732 /* let soc-camera calculate these values */
1733 pix->bytesperline = 0;
1734 pix->sizeimage = 0;
1735
1736 /* limit to sensor capabilities */
1737 mf->width = pix->width;
1738 mf->height = pix->height;
1739 mf->field = pix->field;
1740 mf->code = xlate->code;
1741 mf->colorspace = pix->colorspace;
1742
1743 ret = v4l2_device_call_until_err(sd->v4l2_dev, soc_camera_grp_id(icd),
1744 pad, set_fmt, &pad_cfg, &format);
1745 if (ret < 0)
1746 return ret;
1747
1748 /* Adjust only if VIN cannot scale */
1749 if (pix->width > mf->width * 2)
1750 pix->width = mf->width * 2;
1751 if (pix->height > mf->height * 3)
1752 pix->height = mf->height * 3;
1753
1754 pix->field = mf->field;
1755 pix->colorspace = mf->colorspace;
1756
1757 if (pixfmt == V4L2_PIX_FMT_NV16) {
1758 /* FIXME: check against rect_max after converting soc-camera */
1759 /* We can scale precisely, need a bigger image from camera */
1760 if (pix->width < width || pix->height < height) {
1761 /*
1762 * We presume, the sensor behaves sanely, i.e. if
1763 * requested a bigger rectangle, it will not return a
1764 * smaller one.
1765 */
1766 mf->width = VIN_MAX_WIDTH;
1767 mf->height = VIN_MAX_HEIGHT;
1768 ret = v4l2_device_call_until_err(sd->v4l2_dev,
1769 soc_camera_grp_id(icd),
1770 pad, set_fmt, &pad_cfg,
1771 &format);
1772 if (ret < 0) {
1773 dev_err(icd->parent,
1774 "client try_fmt() = %d\n", ret);
1775 return ret;
1776 }
1777 }
1778 /* We will scale exactly */
1779 if (mf->width > width)
1780 pix->width = width;
1781 if (mf->height > height)
1782 pix->height = height;
1783 }
1784
1785 return ret;
1786 }
1787
1788 static unsigned int rcar_vin_poll(struct file *file, poll_table *pt)
1789 {
1790 struct soc_camera_device *icd = file->private_data;
1791
1792 return vb2_poll(&icd->vb2_vidq, file, pt);
1793 }
1794
1795 static int rcar_vin_querycap(struct soc_camera_host *ici,
1796 struct v4l2_capability *cap)
1797 {
1798 strlcpy(cap->card, "R_Car_VIN", sizeof(cap->card));
1799 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
1800 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
1801 snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s%d", DRV_NAME, ici->nr);
1802
1803 return 0;
1804 }
1805
1806 static int rcar_vin_init_videobuf2(struct vb2_queue *vq,
1807 struct soc_camera_device *icd)
1808 {
1809 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
1810
1811 vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1812 vq->io_modes = VB2_MMAP | VB2_USERPTR;
1813 vq->drv_priv = icd;
1814 vq->ops = &rcar_vin_vb2_ops;
1815 vq->mem_ops = &vb2_dma_contig_memops;
1816 vq->buf_struct_size = sizeof(struct rcar_vin_buffer);
1817 vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1818 vq->lock = &ici->host_lock;
1819
1820 return vb2_queue_init(vq);
1821 }
1822
1823 static struct soc_camera_host_ops rcar_vin_host_ops = {
1824 .owner = THIS_MODULE,
1825 .add = rcar_vin_add_device,
1826 .remove = rcar_vin_remove_device,
1827 .get_formats = rcar_vin_get_formats,
1828 .put_formats = rcar_vin_put_formats,
1829 .get_crop = rcar_vin_get_crop,
1830 .set_crop = rcar_vin_set_crop,
1831 .try_fmt = rcar_vin_try_fmt,
1832 .set_fmt = rcar_vin_set_fmt,
1833 .poll = rcar_vin_poll,
1834 .querycap = rcar_vin_querycap,
1835 .set_bus_param = rcar_vin_set_bus_param,
1836 .init_videobuf2 = rcar_vin_init_videobuf2,
1837 };
1838
1839 #ifdef CONFIG_OF
1840 static const struct of_device_id rcar_vin_of_table[] = {
1841 { .compatible = "renesas,vin-r8a7795", .data = (void *)RCAR_GEN3 },
1842 { .compatible = "renesas,vin-r8a7794", .data = (void *)RCAR_GEN2 },
1843 { .compatible = "renesas,vin-r8a7793", .data = (void *)RCAR_GEN2 },
1844 { .compatible = "renesas,vin-r8a7791", .data = (void *)RCAR_GEN2 },
1845 { .compatible = "renesas,vin-r8a7790", .data = (void *)RCAR_GEN2 },
1846 { .compatible = "renesas,vin-r8a7779", .data = (void *)RCAR_H1 },
1847 { .compatible = "renesas,vin-r8a7778", .data = (void *)RCAR_M1 },
1848 { },
1849 };
1850 MODULE_DEVICE_TABLE(of, rcar_vin_of_table);
1851 #endif
1852
1853 static int rcar_vin_probe(struct platform_device *pdev)
1854 {
1855 const struct of_device_id *match = NULL;
1856 struct rcar_vin_priv *priv;
1857 struct v4l2_of_endpoint ep;
1858 struct device_node *np;
1859 struct resource *mem;
1860 unsigned int pdata_flags;
1861 int irq, ret;
1862
1863 match = of_match_device(of_match_ptr(rcar_vin_of_table), &pdev->dev);
1864
1865 np = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
1866 if (!np) {
1867 dev_err(&pdev->dev, "could not find endpoint\n");
1868 return -EINVAL;
1869 }
1870
1871 ret = v4l2_of_parse_endpoint(np, &ep);
1872 if (ret) {
1873 dev_err(&pdev->dev, "could not parse endpoint\n");
1874 return ret;
1875 }
1876
1877 if (ep.bus_type == V4L2_MBUS_BT656)
1878 pdata_flags = RCAR_VIN_BT656;
1879 else {
1880 pdata_flags = 0;
1881 if (ep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
1882 pdata_flags |= RCAR_VIN_HSYNC_ACTIVE_LOW;
1883 if (ep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
1884 pdata_flags |= RCAR_VIN_VSYNC_ACTIVE_LOW;
1885 }
1886
1887 of_node_put(np);
1888
1889 dev_dbg(&pdev->dev, "pdata_flags = %08x\n", pdata_flags);
1890
1891 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1892 if (mem == NULL)
1893 return -EINVAL;
1894
1895 irq = platform_get_irq(pdev, 0);
1896 if (irq <= 0)
1897 return -EINVAL;
1898
1899 priv = devm_kzalloc(&pdev->dev, sizeof(struct rcar_vin_priv),
1900 GFP_KERNEL);
1901 if (!priv)
1902 return -ENOMEM;
1903
1904 priv->base = devm_ioremap_resource(&pdev->dev, mem);
1905 if (IS_ERR(priv->base))
1906 return PTR_ERR(priv->base);
1907
1908 ret = devm_request_irq(&pdev->dev, irq, rcar_vin_irq, IRQF_SHARED,
1909 dev_name(&pdev->dev), priv);
1910 if (ret)
1911 return ret;
1912
1913 priv->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1914 if (IS_ERR(priv->alloc_ctx))
1915 return PTR_ERR(priv->alloc_ctx);
1916
1917 priv->ici.priv = priv;
1918 priv->ici.v4l2_dev.dev = &pdev->dev;
1919 priv->ici.drv_name = dev_name(&pdev->dev);
1920 priv->ici.ops = &rcar_vin_host_ops;
1921
1922 priv->pdata_flags = pdata_flags;
1923 if (!match) {
1924 priv->ici.nr = pdev->id;
1925 priv->chip = pdev->id_entry->driver_data;
1926 } else {
1927 priv->ici.nr = of_alias_get_id(pdev->dev.of_node, "vin");
1928 priv->chip = (enum chip_id)match->data;
1929 }
1930
1931 spin_lock_init(&priv->lock);
1932 INIT_LIST_HEAD(&priv->capture);
1933
1934 priv->state = STOPPED;
1935
1936 pm_suspend_ignore_children(&pdev->dev, true);
1937 pm_runtime_enable(&pdev->dev);
1938
1939 ret = soc_camera_host_register(&priv->ici);
1940 if (ret)
1941 goto cleanup;
1942
1943 return 0;
1944
1945 cleanup:
1946 pm_runtime_disable(&pdev->dev);
1947 vb2_dma_contig_cleanup_ctx(priv->alloc_ctx);
1948
1949 return ret;
1950 }
1951
1952 static int rcar_vin_remove(struct platform_device *pdev)
1953 {
1954 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
1955 struct rcar_vin_priv *priv = container_of(soc_host,
1956 struct rcar_vin_priv, ici);
1957
1958 soc_camera_host_unregister(soc_host);
1959 pm_runtime_disable(&pdev->dev);
1960 vb2_dma_contig_cleanup_ctx(priv->alloc_ctx);
1961
1962 return 0;
1963 }
1964
1965 static struct platform_driver rcar_vin_driver = {
1966 .probe = rcar_vin_probe,
1967 .remove = rcar_vin_remove,
1968 .driver = {
1969 .name = DRV_NAME,
1970 .of_match_table = of_match_ptr(rcar_vin_of_table),
1971 },
1972 };
1973
1974 module_platform_driver(rcar_vin_driver);
1975
1976 MODULE_LICENSE("GPL");
1977 MODULE_ALIAS("platform:rcar_vin");
1978 MODULE_DESCRIPTION("Renesas R-Car VIN camera host driver");
Linux with added FPC-III support