drivers/net/ethernet/intel/e1000e/ptp.c

   1 /* Intel PRO/1000 Linux driver
   2  * Copyright(c) 1999 - 2015 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  *
  16  * Contact Information:
  17  * Linux NICS <linux.nics@intel.com>
  18  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20  */
  21
  22 /* PTP 1588 Hardware Clock (PHC)
  23  * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
  24  * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
  25  */
  26
  27 #include "e1000.h"
  28
  29 #ifdef CONFIG_E1000E_HWTS
  30 #include <linux/clocksource.h>
  31 #include <linux/ktime.h>
  32 #include <asm/tsc.h>
  33 #endif
  34
  35 /**
  36  * e1000e_phc_adjfreq - adjust the frequency of the hardware clock
  37  * @ptp: ptp clock structure
  38  * @delta: Desired frequency change in parts per billion
  39  *
  40  * Adjust the frequency of the PHC cycle counter by the indicated delta from
  41  * the base frequency.
  42  **/
  43 static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
  44 {
  45         struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
  46                                                      ptp_clock_info);
  47         struct e1000_hw *hw = &adapter->hw;
  48         bool neg_adj = false;
  49         unsigned long flags;
  50         u64 adjustment;
  51         u32 timinca, incvalue;
  52         s32 ret_val;
  53
  54         if ((delta > ptp->max_adj) || (delta <= -1000000000))
  55                 return -EINVAL;
  56
  57         if (delta < 0) {
  58                 neg_adj = true;
  59                 delta = -delta;
  60         }
  61
  62         /* Get the System Time Register SYSTIM base frequency */
  63         ret_val = e1000e_get_base_timinca(adapter, &timinca);
  64         if (ret_val)
  65                 return ret_val;
  66
  67         spin_lock_irqsave(&adapter->systim_lock, flags);
  68
  69         incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
  70
  71         adjustment = incvalue;
  72         adjustment *= delta;
  73         adjustment = div_u64(adjustment, 1000000000);
  74
  75         incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment);
  76
  77         timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
  78         timinca |= incvalue;
  79
  80         ew32(TIMINCA, timinca);
  81
  82         spin_unlock_irqrestore(&adapter->systim_lock, flags);
  83
  84         return 0;
  85 }
  86
  87 /**
  88  * e1000e_phc_adjtime - Shift the time of the hardware clock
  89  * @ptp: ptp clock structure
  90  * @delta: Desired change in nanoseconds
  91  *
  92  * Adjust the timer by resetting the timecounter structure.
  93  **/
  94 static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
  95 {
  96         struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
  97                                                      ptp_clock_info);
  98         unsigned long flags;
  99
 100         spin_lock_irqsave(&adapter->systim_lock, flags);
 101         timecounter_adjtime(&adapter->tc, delta);
 102         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 103
 104         return 0;
 105 }
 106
 107 #ifdef CONFIG_E1000E_HWTS
 108 #define MAX_HW_WAIT_COUNT (3)
 109
 110 /**
 111  * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers
 112  * @device: current device time
 113  * @system: system counter value read synchronously with device time
 114  * @ctx: context provided by timekeeping code
 115  *
 116  * Read device and system (ART) clock simultaneously and return the corrected
 117  * clock values in ns.
 118  **/
 119 static int e1000e_phc_get_syncdevicetime(ktime_t *device,
 120                                          struct system_counterval_t *system,
 121                                          void *ctx)
 122 {
 123         struct e1000_adapter *adapter = (struct e1000_adapter *)ctx;
 124         struct e1000_hw *hw = &adapter->hw;
 125         unsigned long flags;
 126         int i;
 127         u32 tsync_ctrl;
 128         cycle_t dev_cycles;
 129         cycle_t sys_cycles;
 130
 131         tsync_ctrl = er32(TSYNCTXCTL);
 132         tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC |
 133                 E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK;
 134         ew32(TSYNCTXCTL, tsync_ctrl);
 135         for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) {
 136                 udelay(1);
 137                 tsync_ctrl = er32(TSYNCTXCTL);
 138                 if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP)
 139                         break;
 140         }
 141
 142         if (i == MAX_HW_WAIT_COUNT)
 143                 return -ETIMEDOUT;
 144
 145         dev_cycles = er32(SYSSTMPH);
 146         dev_cycles <<= 32;
 147         dev_cycles |= er32(SYSSTMPL);
 148         spin_lock_irqsave(&adapter->systim_lock, flags);
 149         *device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles));
 150         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 151
 152         sys_cycles = er32(PLTSTMPH);
 153         sys_cycles <<= 32;
 154         sys_cycles |= er32(PLTSTMPL);
 155         *system = convert_art_to_tsc(sys_cycles);
 156
 157         return 0;
 158 }
 159
 160 /**
 161  * e1000e_phc_getsynctime - Reads the current system/device cross timestamp
 162  * @ptp: ptp clock structure
 163  * @cts: structure containing timestamp
 164  *
 165  * Read device and system (ART) clock simultaneously and return the scaled
 166  * clock values in ns.
 167  **/
 168 static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp,
 169                                      struct system_device_crosststamp *xtstamp)
 170 {
 171         struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
 172                                                      ptp_clock_info);
 173
 174         return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime,
 175                                                 adapter, NULL, xtstamp);
 176 }
 177 #endif/*CONFIG_E1000E_HWTS*/
 178
 179 /**
 180  * e1000e_phc_gettime - Reads the current time from the hardware clock
 181  * @ptp: ptp clock structure
 182  * @ts: timespec structure to hold the current time value
 183  *
 184  * Read the timecounter and return the correct value in ns after converting
 185  * it into a struct timespec.
 186  **/
 187 static int e1000e_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
 188 {
 189         struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
 190                                                      ptp_clock_info);
 191         unsigned long flags;
 192         u64 ns;
 193
 194         spin_lock_irqsave(&adapter->systim_lock, flags);
 195         ns = timecounter_read(&adapter->tc);
 196         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 197
 198         *ts = ns_to_timespec64(ns);
 199
 200         return 0;
 201 }
 202
 203 /**
 204  * e1000e_phc_settime - Set the current time on the hardware clock
 205  * @ptp: ptp clock structure
 206  * @ts: timespec containing the new time for the cycle counter
 207  *
 208  * Reset the timecounter to use a new base value instead of the kernel
 209  * wall timer value.
 210  **/
 211 static int e1000e_phc_settime(struct ptp_clock_info *ptp,
 212                               const struct timespec64 *ts)
 213 {
 214         struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
 215                                                      ptp_clock_info);
 216         unsigned long flags;
 217         u64 ns;
 218
 219         ns = timespec64_to_ns(ts);
 220
 221         /* reset the timecounter */
 222         spin_lock_irqsave(&adapter->systim_lock, flags);
 223         timecounter_init(&adapter->tc, &adapter->cc, ns);
 224         spin_unlock_irqrestore(&adapter->systim_lock, flags);
 225
 226         return 0;
 227 }
 228
 229 /**
 230  * e1000e_phc_enable - enable or disable an ancillary feature
 231  * @ptp: ptp clock structure
 232  * @request: Desired resource to enable or disable
 233  * @on: Caller passes one to enable or zero to disable
 234  *
 235  * Enable (or disable) ancillary features of the PHC subsystem.
 236  * Currently, no ancillary features are supported.
 237  **/
 238 static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp,
 239                              struct ptp_clock_request __always_unused *request,
 240                              int __always_unused on)
 241 {
 242         return -EOPNOTSUPP;
 243 }
 244
 245 static void e1000e_systim_overflow_work(struct work_struct *work)
 246 {
 247         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
 248                                                      systim_overflow_work.work);
 249         struct e1000_hw *hw = &adapter->hw;
 250         struct timespec64 ts;
 251
 252         adapter->ptp_clock_info.gettime64(&adapter->ptp_clock_info, &ts);
 253
 254         e_dbg("SYSTIM overflow check at %lld.%09lu\n",
 255               (long long) ts.tv_sec, ts.tv_nsec);
 256
 257         schedule_delayed_work(&adapter->systim_overflow_work,
 258                               E1000_SYSTIM_OVERFLOW_PERIOD);
 259 }
 260
 261 static const struct ptp_clock_info e1000e_ptp_clock_info = {
 262         .owner          = THIS_MODULE,
 263         .n_alarm        = 0,
 264         .n_ext_ts       = 0,
 265         .n_per_out      = 0,
 266         .n_pins         = 0,
 267         .pps            = 0,
 268         .adjfreq        = e1000e_phc_adjfreq,
 269         .adjtime        = e1000e_phc_adjtime,
 270         .gettime64      = e1000e_phc_gettime,
 271         .settime64      = e1000e_phc_settime,
 272         .enable         = e1000e_phc_enable,
 273 };
 274
 275 /**
 276  * e1000e_ptp_init - initialize PTP for devices which support it
 277  * @adapter: board private structure
 278  *
 279  * This function performs the required steps for enabling PTP support.
 280  * If PTP support has already been loaded it simply calls the cyclecounter
 281  * init routine and exits.
 282  **/
 283 void e1000e_ptp_init(struct e1000_adapter *adapter)
 284 {
 285         struct e1000_hw *hw = &adapter->hw;
 286
 287         adapter->ptp_clock = NULL;
 288
 289         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
 290                 return;
 291
 292         adapter->ptp_clock_info = e1000e_ptp_clock_info;
 293
 294         snprintf(adapter->ptp_clock_info.name,
 295                  sizeof(adapter->ptp_clock_info.name), "%pm",
 296                  adapter->netdev->perm_addr);
 297
 298         switch (hw->mac.type) {
 299         case e1000_pch2lan:
 300         case e1000_pch_lpt:
 301         case e1000_pch_spt:
 302                 if (((hw->mac.type != e1000_pch_lpt) &&
 303                      (hw->mac.type != e1000_pch_spt)) ||
 304                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
 305                         adapter->ptp_clock_info.max_adj = 24000000 - 1;
 306                         break;
 307                 }
 308                 /* fall-through */
 309         case e1000_82574:
 310         case e1000_82583:
 311                 adapter->ptp_clock_info.max_adj = 600000000 - 1;
 312                 break;
 313         default:
 314                 break;
 315         }
 316
 317 #ifdef CONFIG_E1000E_HWTS
 318         /* CPU must have ART and GBe must be from Sunrise Point or greater */
 319         if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART))
 320                 adapter->ptp_clock_info.getcrosststamp =
 321                         e1000e_phc_getcrosststamp;
 322 #endif/*CONFIG_E1000E_HWTS*/
 323
 324         INIT_DELAYED_WORK(&adapter->systim_overflow_work,
 325                           e1000e_systim_overflow_work);
 326
 327         schedule_delayed_work(&adapter->systim_overflow_work,
 328                               E1000_SYSTIM_OVERFLOW_PERIOD);
 329
 330         adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
 331                                                 &adapter->pdev->dev);
 332         if (IS_ERR(adapter->ptp_clock)) {
 333                 adapter->ptp_clock = NULL;
 334                 e_err("ptp_clock_register failed\n");
 335         } else {
 336                 e_info("registered PHC clock\n");
 337         }
 338 }
 339
 340 /**
 341  * e1000e_ptp_remove - disable PTP device and stop the overflow check
 342  * @adapter: board private structure
 343  *
 344  * Stop the PTP support, and cancel the delayed work.
 345  **/
 346 void e1000e_ptp_remove(struct e1000_adapter *adapter)
 347 {
 348         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
 349                 return;
 350
 351         cancel_delayed_work_sync(&adapter->systim_overflow_work);
 352
 353         if (adapter->ptp_clock) {
 354                 ptp_clock_unregister(adapter->ptp_clock);
 355                 adapter->ptp_clock = NULL;
 356                 e_info("removed PHC\n");
 357         }
 358 }