drivers/pci/pcie/aer/aer_inject.c

   1 /*
   2  * PCIe AER software error injection support.
   3  *
   4  * Debuging PCIe AER code is quite difficult because it is hard to
   5  * trigger various real hardware errors. Software based error
   6  * injection can fake almost all kinds of errors with the help of a
   7  * user space helper tool aer-inject, which can be gotten from:
   8  *   http://www.kernel.org/pub/linux/utils/pci/aer-inject/
   9  *
  10  * Copyright 2009 Intel Corporation.
  11  *     Huang Ying <ying.huang@intel.com>
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; version 2
  16  * of the License.
  17  *
  18  */
  19
  20 #include <linux/module.h>
  21 #include <linux/init.h>
  22 #include <linux/miscdevice.h>
  23 #include <linux/pci.h>
  24 #include <linux/slab.h>
  25 #include <linux/fs.h>
  26 #include <linux/uaccess.h>
  27 #include <linux/stddef.h>
  28 #include <linux/device.h>
  29 #include "aerdrv.h"
  30
  31 /* Override the existing corrected and uncorrected error masks */
  32 static bool aer_mask_override;
  33 module_param(aer_mask_override, bool, 0);
  34
  35 struct aer_error_inj {
  36         u8 bus;
  37         u8 dev;
  38         u8 fn;
  39         u32 uncor_status;
  40         u32 cor_status;
  41         u32 header_log0;
  42         u32 header_log1;
  43         u32 header_log2;
  44         u32 header_log3;
  45         u32 domain;
  46 };
  47
  48 struct aer_error {
  49         struct list_head list;
  50         u32 domain;
  51         unsigned int bus;
  52         unsigned int devfn;
  53         int pos_cap_err;
  54
  55         u32 uncor_status;
  56         u32 cor_status;
  57         u32 header_log0;
  58         u32 header_log1;
  59         u32 header_log2;
  60         u32 header_log3;
  61         u32 root_status;
  62         u32 source_id;
  63 };
  64
  65 struct pci_bus_ops {
  66         struct list_head list;
  67         struct pci_bus *bus;
  68         struct pci_ops *ops;
  69 };
  70
  71 static LIST_HEAD(einjected);
  72
  73 static LIST_HEAD(pci_bus_ops_list);
  74
  75 /* Protect einjected and pci_bus_ops_list */
  76 static DEFINE_SPINLOCK(inject_lock);
  77
  78 static void aer_error_init(struct aer_error *err, u32 domain,
  79                            unsigned int bus, unsigned int devfn,
  80                            int pos_cap_err)
  81 {
  82         INIT_LIST_HEAD(&err->list);
  83         err->domain = domain;
  84         err->bus = bus;
  85         err->devfn = devfn;
  86         err->pos_cap_err = pos_cap_err;
  87 }
  88
  89 /* inject_lock must be held before calling */
  90 static struct aer_error *__find_aer_error(u32 domain, unsigned int bus,
  91                                           unsigned int devfn)
  92 {
  93         struct aer_error *err;
  94
  95         list_for_each_entry(err, &einjected, list) {
  96                 if (domain == err->domain &&
  97                     bus == err->bus &&
  98                     devfn == err->devfn)
  99                         return err;
 100         }
 101         return NULL;
 102 }
 103
 104 /* inject_lock must be held before calling */
 105 static struct aer_error *__find_aer_error_by_dev(struct pci_dev *dev)
 106 {
 107         int domain = pci_domain_nr(dev->bus);
 108         if (domain < 0)
 109                 return NULL;
 110         return __find_aer_error(domain, dev->bus->number, dev->devfn);
 111 }
 112
 113 /* inject_lock must be held before calling */
 114 static struct pci_ops *__find_pci_bus_ops(struct pci_bus *bus)
 115 {
 116         struct pci_bus_ops *bus_ops;
 117
 118         list_for_each_entry(bus_ops, &pci_bus_ops_list, list) {
 119                 if (bus_ops->bus == bus)
 120                         return bus_ops->ops;
 121         }
 122         return NULL;
 123 }
 124
 125 static struct pci_bus_ops *pci_bus_ops_pop(void)
 126 {
 127         unsigned long flags;
 128         struct pci_bus_ops *bus_ops;
 129
 130         spin_lock_irqsave(&inject_lock, flags);
 131         bus_ops = list_first_entry_or_null(&pci_bus_ops_list,
 132                                            struct pci_bus_ops, list);
 133         if (bus_ops)
 134                 list_del(&bus_ops->list);
 135         spin_unlock_irqrestore(&inject_lock, flags);
 136         return bus_ops;
 137 }
 138
 139 static u32 *find_pci_config_dword(struct aer_error *err, int where,
 140                                   int *prw1cs)
 141 {
 142         int rw1cs = 0;
 143         u32 *target = NULL;
 144
 145         if (err->pos_cap_err == -1)
 146                 return NULL;
 147
 148         switch (where - err->pos_cap_err) {
 149         case PCI_ERR_UNCOR_STATUS:
 150                 target = &err->uncor_status;
 151                 rw1cs = 1;
 152                 break;
 153         case PCI_ERR_COR_STATUS:
 154                 target = &err->cor_status;
 155                 rw1cs = 1;
 156                 break;
 157         case PCI_ERR_HEADER_LOG:
 158                 target = &err->header_log0;
 159                 break;
 160         case PCI_ERR_HEADER_LOG+4:
 161                 target = &err->header_log1;
 162                 break;
 163         case PCI_ERR_HEADER_LOG+8:
 164                 target = &err->header_log2;
 165                 break;
 166         case PCI_ERR_HEADER_LOG+12:
 167                 target = &err->header_log3;
 168                 break;
 169         case PCI_ERR_ROOT_STATUS:
 170                 target = &err->root_status;
 171                 rw1cs = 1;
 172                 break;
 173         case PCI_ERR_ROOT_ERR_SRC:
 174                 target = &err->source_id;
 175                 break;
 176         }
 177         if (prw1cs)
 178                 *prw1cs = rw1cs;
 179         return target;
 180 }
 181
 182 static int aer_inj_read_config(struct pci_bus *bus, unsigned int devfn,
 183                                int where, int size, u32 *val)
 184 {
 185         u32 *sim;
 186         struct aer_error *err;
 187         unsigned long flags;
 188         struct pci_ops *ops;
 189         struct pci_ops *my_ops;
 190         int domain;
 191         int rv;
 192
 193         spin_lock_irqsave(&inject_lock, flags);
 194         if (size != sizeof(u32))
 195                 goto out;
 196         domain = pci_domain_nr(bus);
 197         if (domain < 0)
 198                 goto out;
 199         err = __find_aer_error(domain, bus->number, devfn);
 200         if (!err)
 201                 goto out;
 202
 203         sim = find_pci_config_dword(err, where, NULL);
 204         if (sim) {
 205                 *val = *sim;
 206                 spin_unlock_irqrestore(&inject_lock, flags);
 207                 return 0;
 208         }
 209 out:
 210         ops = __find_pci_bus_ops(bus);
 211         /*
 212          * pci_lock must already be held, so we can directly
 213          * manipulate bus->ops.  Many config access functions,
 214          * including pci_generic_config_read() require the original
 215          * bus->ops be installed to function, so temporarily put them
 216          * back.
 217          */
 218         my_ops = bus->ops;
 219         bus->ops = ops;
 220         rv = ops->read(bus, devfn, where, size, val);
 221         bus->ops = my_ops;
 222         spin_unlock_irqrestore(&inject_lock, flags);
 223         return rv;
 224 }
 225
 226 static int aer_inj_write_config(struct pci_bus *bus, unsigned int devfn,
 227                                 int where, int size, u32 val)
 228 {
 229         u32 *sim;
 230         struct aer_error *err;
 231         unsigned long flags;
 232         int rw1cs;
 233         struct pci_ops *ops;
 234         struct pci_ops *my_ops;
 235         int domain;
 236         int rv;
 237
 238         spin_lock_irqsave(&inject_lock, flags);
 239         if (size != sizeof(u32))
 240                 goto out;
 241         domain = pci_domain_nr(bus);
 242         if (domain < 0)
 243                 goto out;
 244         err = __find_aer_error(domain, bus->number, devfn);
 245         if (!err)
 246                 goto out;
 247
 248         sim = find_pci_config_dword(err, where, &rw1cs);
 249         if (sim) {
 250                 if (rw1cs)
 251                         *sim ^= val;
 252                 else
 253                         *sim = val;
 254                 spin_unlock_irqrestore(&inject_lock, flags);
 255                 return 0;
 256         }
 257 out:
 258         ops = __find_pci_bus_ops(bus);
 259         /*
 260          * pci_lock must already be held, so we can directly
 261          * manipulate bus->ops.  Many config access functions,
 262          * including pci_generic_config_write() require the original
 263          * bus->ops be installed to function, so temporarily put them
 264          * back.
 265          */
 266         my_ops = bus->ops;
 267         bus->ops = ops;
 268         rv = ops->write(bus, devfn, where, size, val);
 269         bus->ops = my_ops;
 270         spin_unlock_irqrestore(&inject_lock, flags);
 271         return rv;
 272 }
 273
 274 static struct pci_ops aer_inj_pci_ops = {
 275         .read = aer_inj_read_config,
 276         .write = aer_inj_write_config,
 277 };
 278
 279 static void pci_bus_ops_init(struct pci_bus_ops *bus_ops,
 280                              struct pci_bus *bus,
 281                              struct pci_ops *ops)
 282 {
 283         INIT_LIST_HEAD(&bus_ops->list);
 284         bus_ops->bus = bus;
 285         bus_ops->ops = ops;
 286 }
 287
 288 static int pci_bus_set_aer_ops(struct pci_bus *bus)
 289 {
 290         struct pci_ops *ops;
 291         struct pci_bus_ops *bus_ops;
 292         unsigned long flags;
 293
 294         bus_ops = kmalloc(sizeof(*bus_ops), GFP_KERNEL);
 295         if (!bus_ops)
 296                 return -ENOMEM;
 297         ops = pci_bus_set_ops(bus, &aer_inj_pci_ops);
 298         spin_lock_irqsave(&inject_lock, flags);
 299         if (ops == &aer_inj_pci_ops)
 300                 goto out;
 301         pci_bus_ops_init(bus_ops, bus, ops);
 302         list_add(&bus_ops->list, &pci_bus_ops_list);
 303         bus_ops = NULL;
 304 out:
 305         spin_unlock_irqrestore(&inject_lock, flags);
 306         kfree(bus_ops);
 307         return 0;
 308 }
 309
 310 static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
 311 {
 312         while (1) {
 313                 if (!pci_is_pcie(dev))
 314                         break;
 315                 if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
 316                         return dev;
 317                 if (!dev->bus->self)
 318                         break;
 319                 dev = dev->bus->self;
 320         }
 321         return NULL;
 322 }
 323
 324 static int find_aer_device_iter(struct device *device, void *data)
 325 {
 326         struct pcie_device **result = data;
 327         struct pcie_device *pcie_dev;
 328
 329         if (device->bus == &pcie_port_bus_type) {
 330                 pcie_dev = to_pcie_device(device);
 331                 if (pcie_dev->service & PCIE_PORT_SERVICE_AER) {
 332                         *result = pcie_dev;
 333                         return 1;
 334                 }
 335         }
 336         return 0;
 337 }
 338
 339 static int find_aer_device(struct pci_dev *dev, struct pcie_device **result)
 340 {
 341         return device_for_each_child(&dev->dev, result, find_aer_device_iter);
 342 }
 343
 344 static int aer_inject(struct aer_error_inj *einj)
 345 {
 346         struct aer_error *err, *rperr;
 347         struct aer_error *err_alloc = NULL, *rperr_alloc = NULL;
 348         struct pci_dev *dev, *rpdev;
 349         struct pcie_device *edev;
 350         unsigned long flags;
 351         unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
 352         int pos_cap_err, rp_pos_cap_err;
 353         u32 sever, cor_mask, uncor_mask, cor_mask_orig = 0, uncor_mask_orig = 0;
 354         int ret = 0;
 355
 356         dev = pci_get_domain_bus_and_slot(einj->domain, einj->bus, devfn);
 357         if (!dev)
 358                 return -ENODEV;
 359         rpdev = pcie_find_root_port(dev);
 360         if (!rpdev) {
 361                 dev_err(&dev->dev, "aer_inject: Root port not found\n");
 362                 ret = -ENODEV;
 363                 goto out_put;
 364         }
 365
 366         pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
 367         if (!pos_cap_err) {
 368                 dev_err(&dev->dev, "aer_inject: Device doesn't support AER\n");
 369                 ret = -EPROTONOSUPPORT;
 370                 goto out_put;
 371         }
 372         pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
 373         pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &cor_mask);
 374         pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
 375                               &uncor_mask);
 376
 377         rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
 378         if (!rp_pos_cap_err) {
 379                 dev_err(&rpdev->dev,
 380                         "aer_inject: Root port doesn't support AER\n");
 381                 ret = -EPROTONOSUPPORT;
 382                 goto out_put;
 383         }
 384
 385         err_alloc =  kzalloc(sizeof(struct aer_error), GFP_KERNEL);
 386         if (!err_alloc) {
 387                 ret = -ENOMEM;
 388                 goto out_put;
 389         }
 390         rperr_alloc =  kzalloc(sizeof(struct aer_error), GFP_KERNEL);
 391         if (!rperr_alloc) {
 392                 ret = -ENOMEM;
 393                 goto out_put;
 394         }
 395
 396         if (aer_mask_override) {
 397                 cor_mask_orig = cor_mask;
 398                 cor_mask &= !(einj->cor_status);
 399                 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
 400                                        cor_mask);
 401
 402                 uncor_mask_orig = uncor_mask;
 403                 uncor_mask &= !(einj->uncor_status);
 404                 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
 405                                        uncor_mask);
 406         }
 407
 408         spin_lock_irqsave(&inject_lock, flags);
 409
 410         err = __find_aer_error_by_dev(dev);
 411         if (!err) {
 412                 err = err_alloc;
 413                 err_alloc = NULL;
 414                 aer_error_init(err, einj->domain, einj->bus, devfn,
 415                                pos_cap_err);
 416                 list_add(&err->list, &einjected);
 417         }
 418         err->uncor_status |= einj->uncor_status;
 419         err->cor_status |= einj->cor_status;
 420         err->header_log0 = einj->header_log0;
 421         err->header_log1 = einj->header_log1;
 422         err->header_log2 = einj->header_log2;
 423         err->header_log3 = einj->header_log3;
 424
 425         if (!aer_mask_override && einj->cor_status &&
 426             !(einj->cor_status & ~cor_mask)) {
 427                 ret = -EINVAL;
 428                 dev_warn(&dev->dev,
 429                          "aer_inject: The correctable error(s) is masked by device\n");
 430                 spin_unlock_irqrestore(&inject_lock, flags);
 431                 goto out_put;
 432         }
 433         if (!aer_mask_override && einj->uncor_status &&
 434             !(einj->uncor_status & ~uncor_mask)) {
 435                 ret = -EINVAL;
 436                 dev_warn(&dev->dev,
 437                          "aer_inject: The uncorrectable error(s) is masked by device\n");
 438                 spin_unlock_irqrestore(&inject_lock, flags);
 439                 goto out_put;
 440         }
 441
 442         rperr = __find_aer_error_by_dev(rpdev);
 443         if (!rperr) {
 444                 rperr = rperr_alloc;
 445                 rperr_alloc = NULL;
 446                 aer_error_init(rperr, pci_domain_nr(rpdev->bus),
 447                                rpdev->bus->number, rpdev->devfn,
 448                                rp_pos_cap_err);
 449                 list_add(&rperr->list, &einjected);
 450         }
 451         if (einj->cor_status) {
 452                 if (rperr->root_status & PCI_ERR_ROOT_COR_RCV)
 453                         rperr->root_status |= PCI_ERR_ROOT_MULTI_COR_RCV;
 454                 else
 455                         rperr->root_status |= PCI_ERR_ROOT_COR_RCV;
 456                 rperr->source_id &= 0xffff0000;
 457                 rperr->source_id |= (einj->bus << 8) | devfn;
 458         }
 459         if (einj->uncor_status) {
 460                 if (rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV)
 461                         rperr->root_status |= PCI_ERR_ROOT_MULTI_UNCOR_RCV;
 462                 if (sever & einj->uncor_status) {
 463                         rperr->root_status |= PCI_ERR_ROOT_FATAL_RCV;
 464                         if (!(rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV))
 465                                 rperr->root_status |= PCI_ERR_ROOT_FIRST_FATAL;
 466                 } else
 467                         rperr->root_status |= PCI_ERR_ROOT_NONFATAL_RCV;
 468                 rperr->root_status |= PCI_ERR_ROOT_UNCOR_RCV;
 469                 rperr->source_id &= 0x0000ffff;
 470                 rperr->source_id |= ((einj->bus << 8) | devfn) << 16;
 471         }
 472         spin_unlock_irqrestore(&inject_lock, flags);
 473
 474         if (aer_mask_override) {
 475                 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK,
 476                                        cor_mask_orig);
 477                 pci_write_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
 478                                        uncor_mask_orig);
 479         }
 480
 481         ret = pci_bus_set_aer_ops(dev->bus);
 482         if (ret)
 483                 goto out_put;
 484         ret = pci_bus_set_aer_ops(rpdev->bus);
 485         if (ret)
 486                 goto out_put;
 487
 488         if (find_aer_device(rpdev, &edev)) {
 489                 if (!get_service_data(edev)) {
 490                         dev_warn(&edev->device,
 491                                  "aer_inject: AER service is not initialized\n");
 492                         ret = -EPROTONOSUPPORT;
 493                         goto out_put;
 494                 }
 495                 dev_info(&edev->device,
 496                          "aer_inject: Injecting errors %08x/%08x into device %s\n",
 497                          einj->cor_status, einj->uncor_status, pci_name(dev));
 498                 aer_irq(-1, edev);
 499         } else {
 500                 dev_err(&rpdev->dev, "aer_inject: AER device not found\n");
 501                 ret = -ENODEV;
 502         }
 503 out_put:
 504         kfree(err_alloc);
 505         kfree(rperr_alloc);
 506         pci_dev_put(dev);
 507         return ret;
 508 }
 509
 510 static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf,
 511                                 size_t usize, loff_t *off)
 512 {
 513         struct aer_error_inj einj;
 514         int ret;
 515
 516         if (!capable(CAP_SYS_ADMIN))
 517                 return -EPERM;
 518         if (usize < offsetof(struct aer_error_inj, domain) ||
 519             usize > sizeof(einj))
 520                 return -EINVAL;
 521
 522         memset(&einj, 0, sizeof(einj));
 523         if (copy_from_user(&einj, ubuf, usize))
 524                 return -EFAULT;
 525
 526         ret = aer_inject(&einj);
 527         return ret ? ret : usize;
 528 }
 529
 530 static const struct file_operations aer_inject_fops = {
 531         .write = aer_inject_write,
 532         .owner = THIS_MODULE,
 533         .llseek = noop_llseek,
 534 };
 535
 536 static struct miscdevice aer_inject_device = {
 537         .minor = MISC_DYNAMIC_MINOR,
 538         .name = "aer_inject",
 539         .fops = &aer_inject_fops,
 540 };
 541
 542 static int __init aer_inject_init(void)
 543 {
 544         return misc_register(&aer_inject_device);
 545 }
 546
 547 static void __exit aer_inject_exit(void)
 548 {
 549         struct aer_error *err, *err_next;
 550         unsigned long flags;
 551         struct pci_bus_ops *bus_ops;
 552
 553         misc_deregister(&aer_inject_device);
 554
 555         while ((bus_ops = pci_bus_ops_pop())) {
 556                 pci_bus_set_ops(bus_ops->bus, bus_ops->ops);
 557                 kfree(bus_ops);
 558         }
 559
 560         spin_lock_irqsave(&inject_lock, flags);
 561         list_for_each_entry_safe(err, err_next, &einjected, list) {
 562                 list_del(&err->list);
 563                 kfree(err);
 564         }
 565         spin_unlock_irqrestore(&inject_lock, flags);
 566 }
 567
 568 module_init(aer_inject_init);
 569 module_exit(aer_inject_exit);
 570
 571 MODULE_DESCRIPTION("PCIe AER software error injector");
 572 MODULE_LICENSE("GPL");