drivers/tty/serial/8250/8250_dma.c

   1 /*
   2  * 8250_dma.c - DMA Engine API support for 8250.c
   3  *
   4  * Copyright (C) 2013 Intel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11 #include <linux/tty.h>
  12 #include <linux/tty_flip.h>
  13 #include <linux/serial_reg.h>
  14 #include <linux/dma-mapping.h>
  15
  16 #include "8250.h"
  17
  18 static void __dma_tx_complete(void *param)
  19 {
  20         struct uart_8250_port   *p = param;
  21         struct uart_8250_dma    *dma = p->dma;
  22         struct circ_buf         *xmit = &p->port.state->xmit;
  23         unsigned long   flags;
  24         int             ret;
  25
  26         dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
  27                                 UART_XMIT_SIZE, DMA_TO_DEVICE);
  28
  29         spin_lock_irqsave(&p->port.lock, flags);
  30
  31         dma->tx_running = 0;
  32
  33         xmit->tail += dma->tx_size;
  34         xmit->tail &= UART_XMIT_SIZE - 1;
  35         p->port.icount.tx += dma->tx_size;
  36
  37         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  38                 uart_write_wakeup(&p->port);
  39
  40         ret = serial8250_tx_dma(p);
  41         if (ret) {
  42                 p->ier |= UART_IER_THRI;
  43                 serial_port_out(&p->port, UART_IER, p->ier);
  44         }
  45
  46         spin_unlock_irqrestore(&p->port.lock, flags);
  47 }
  48
  49 static void __dma_rx_complete(void *param)
  50 {
  51         struct uart_8250_port   *p = param;
  52         struct uart_8250_dma    *dma = p->dma;
  53         struct tty_port         *tty_port = &p->port.state->port;
  54         struct dma_tx_state     state;
  55         int                     count;
  56
  57         dma->rx_running = 0;
  58         dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
  59
  60         count = dma->rx_size - state.residue;
  61
  62         tty_insert_flip_string(tty_port, dma->rx_buf, count);
  63         p->port.icount.rx += count;
  64
  65         tty_flip_buffer_push(tty_port);
  66 }
  67
  68 int serial8250_tx_dma(struct uart_8250_port *p)
  69 {
  70         struct uart_8250_dma            *dma = p->dma;
  71         struct circ_buf                 *xmit = &p->port.state->xmit;
  72         struct dma_async_tx_descriptor  *desc;
  73         int ret;
  74
  75         if (uart_tx_stopped(&p->port) || dma->tx_running ||
  76             uart_circ_empty(xmit))
  77                 return 0;
  78
  79         dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  80
  81         desc = dmaengine_prep_slave_single(dma->txchan,
  82                                            dma->tx_addr + xmit->tail,
  83                                            dma->tx_size, DMA_MEM_TO_DEV,
  84                                            DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  85         if (!desc) {
  86                 ret = -EBUSY;
  87                 goto err;
  88         }
  89
  90         dma->tx_running = 1;
  91         desc->callback = __dma_tx_complete;
  92         desc->callback_param = p;
  93
  94         dma->tx_cookie = dmaengine_submit(desc);
  95
  96         dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
  97                                    UART_XMIT_SIZE, DMA_TO_DEVICE);
  98
  99         dma_async_issue_pending(dma->txchan);
 100         if (dma->tx_err) {
 101                 dma->tx_err = 0;
 102                 if (p->ier & UART_IER_THRI) {
 103                         p->ier &= ~UART_IER_THRI;
 104                         serial_out(p, UART_IER, p->ier);
 105                 }
 106         }
 107         return 0;
 108 err:
 109         dma->tx_err = 1;
 110         return ret;
 111 }
 112
 113 int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
 114 {
 115         struct uart_8250_dma            *dma = p->dma;
 116         struct dma_async_tx_descriptor  *desc;
 117
 118         switch (iir & 0x3f) {
 119         case UART_IIR_RLSI:
 120                 /* 8250_core handles errors and break interrupts */
 121                 return -EIO;
 122         case UART_IIR_RX_TIMEOUT:
 123                 /*
 124                  * If RCVR FIFO trigger level was not reached, complete the
 125                  * transfer and let 8250_core copy the remaining data.
 126                  */
 127                 if (dma->rx_running) {
 128                         dmaengine_pause(dma->rxchan);
 129                         __dma_rx_complete(p);
 130                         dmaengine_terminate_all(dma->rxchan);
 131                 }
 132                 return -ETIMEDOUT;
 133         default:
 134                 break;
 135         }
 136
 137         if (dma->rx_running)
 138                 return 0;
 139
 140         desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
 141                                            dma->rx_size, DMA_DEV_TO_MEM,
 142                                            DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 143         if (!desc)
 144                 return -EBUSY;
 145
 146         dma->rx_running = 1;
 147         desc->callback = __dma_rx_complete;
 148         desc->callback_param = p;
 149
 150         dma->rx_cookie = dmaengine_submit(desc);
 151
 152         dma_async_issue_pending(dma->rxchan);
 153
 154         return 0;
 155 }
 156
 157 int serial8250_request_dma(struct uart_8250_port *p)
 158 {
 159         struct uart_8250_dma    *dma = p->dma;
 160         dma_cap_mask_t          mask;
 161
 162         /* Default slave configuration parameters */
 163         dma->rxconf.direction           = DMA_DEV_TO_MEM;
 164         dma->rxconf.src_addr_width      = DMA_SLAVE_BUSWIDTH_1_BYTE;
 165         dma->rxconf.src_addr            = p->port.mapbase + UART_RX;
 166
 167         dma->txconf.direction           = DMA_MEM_TO_DEV;
 168         dma->txconf.dst_addr_width      = DMA_SLAVE_BUSWIDTH_1_BYTE;
 169         dma->txconf.dst_addr            = p->port.mapbase + UART_TX;
 170
 171         dma_cap_zero(mask);
 172         dma_cap_set(DMA_SLAVE, mask);
 173
 174         /* Get a channel for RX */
 175         dma->rxchan = dma_request_slave_channel_compat(mask,
 176                                                        dma->fn, dma->rx_param,
 177                                                        p->port.dev, "rx");
 178         if (!dma->rxchan)
 179                 return -ENODEV;
 180
 181         dmaengine_slave_config(dma->rxchan, &dma->rxconf);
 182
 183         /* Get a channel for TX */
 184         dma->txchan = dma_request_slave_channel_compat(mask,
 185                                                        dma->fn, dma->tx_param,
 186                                                        p->port.dev, "tx");
 187         if (!dma->txchan) {
 188                 dma_release_channel(dma->rxchan);
 189                 return -ENODEV;
 190         }
 191
 192         dmaengine_slave_config(dma->txchan, &dma->txconf);
 193
 194         /* RX buffer */
 195         if (!dma->rx_size)
 196                 dma->rx_size = PAGE_SIZE;
 197
 198         dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
 199                                         &dma->rx_addr, GFP_KERNEL);
 200         if (!dma->rx_buf)
 201                 goto err;
 202
 203         /* TX buffer */
 204         dma->tx_addr = dma_map_single(dma->txchan->device->dev,
 205                                         p->port.state->xmit.buf,
 206                                         UART_XMIT_SIZE,
 207                                         DMA_TO_DEVICE);
 208         if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
 209                 dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
 210                                   dma->rx_buf, dma->rx_addr);
 211                 goto err;
 212         }
 213
 214         dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
 215
 216         return 0;
 217 err:
 218         dma_release_channel(dma->rxchan);
 219         dma_release_channel(dma->txchan);
 220
 221         return -ENOMEM;
 222 }
 223 EXPORT_SYMBOL_GPL(serial8250_request_dma);
 224
 225 void serial8250_release_dma(struct uart_8250_port *p)
 226 {
 227         struct uart_8250_dma *dma = p->dma;
 228
 229         if (!dma)
 230                 return;
 231
 232         /* Release RX resources */
 233         dmaengine_terminate_all(dma->rxchan);
 234         dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
 235                           dma->rx_addr);
 236         dma_release_channel(dma->rxchan);
 237         dma->rxchan = NULL;
 238
 239         /* Release TX resources */
 240         dmaengine_terminate_all(dma->txchan);
 241         dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
 242                          UART_XMIT_SIZE, DMA_TO_DEVICE);
 243         dma_release_channel(dma->txchan);
 244         dma->txchan = NULL;
 245         dma->tx_running = 0;
 246
 247         dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
 248 }
 249 EXPORT_SYMBOL_GPL(serial8250_release_dma);