drivers/watchdog/qcom-wdt.c

   1 /* Copyright (c) 2014, The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  */
  13 #include <linux/clk.h>
  14 #include <linux/delay.h>
  15 #include <linux/io.h>
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/of.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/watchdog.h>
  21
  22 #define WDT_RST         0x38
  23 #define WDT_EN          0x40
  24 #define WDT_BITE_TIME   0x5C
  25
  26 struct qcom_wdt {
  27         struct watchdog_device  wdd;
  28         struct clk              *clk;
  29         unsigned long           rate;
  30         void __iomem            *base;
  31 };
  32
  33 static inline
  34 struct qcom_wdt *to_qcom_wdt(struct watchdog_device *wdd)
  35 {
  36         return container_of(wdd, struct qcom_wdt, wdd);
  37 }
  38
  39 static int qcom_wdt_start(struct watchdog_device *wdd)
  40 {
  41         struct qcom_wdt *wdt = to_qcom_wdt(wdd);
  42
  43         writel(0, wdt->base + WDT_EN);
  44         writel(1, wdt->base + WDT_RST);
  45         writel(wdd->timeout * wdt->rate, wdt->base + WDT_BITE_TIME);
  46         writel(1, wdt->base + WDT_EN);
  47         return 0;
  48 }
  49
  50 static int qcom_wdt_stop(struct watchdog_device *wdd)
  51 {
  52         struct qcom_wdt *wdt = to_qcom_wdt(wdd);
  53
  54         writel(0, wdt->base + WDT_EN);
  55         return 0;
  56 }
  57
  58 static int qcom_wdt_ping(struct watchdog_device *wdd)
  59 {
  60         struct qcom_wdt *wdt = to_qcom_wdt(wdd);
  61
  62         writel(1, wdt->base + WDT_RST);
  63         return 0;
  64 }
  65
  66 static int qcom_wdt_set_timeout(struct watchdog_device *wdd,
  67                                 unsigned int timeout)
  68 {
  69         wdd->timeout = timeout;
  70         return qcom_wdt_start(wdd);
  71 }
  72
  73 static int qcom_wdt_restart(struct watchdog_device *wdd, unsigned long action,
  74                             void *data)
  75 {
  76         struct qcom_wdt *wdt = to_qcom_wdt(wdd);
  77         u32 timeout;
  78
  79         /*
  80          * Trigger watchdog bite:
  81          *    Setup BITE_TIME to be 128ms, and enable WDT.
  82          */
  83         timeout = 128 * wdt->rate / 1000;
  84
  85         writel(0, wdt->base + WDT_EN);
  86         writel(1, wdt->base + WDT_RST);
  87         writel(timeout, wdt->base + WDT_BITE_TIME);
  88         writel(1, wdt->base + WDT_EN);
  89
  90         /*
  91          * Actually make sure the above sequence hits hardware before sleeping.
  92          */
  93         wmb();
  94
  95         msleep(150);
  96         return 0;
  97 }
  98
  99 static const struct watchdog_ops qcom_wdt_ops = {
 100         .start          = qcom_wdt_start,
 101         .stop           = qcom_wdt_stop,
 102         .ping           = qcom_wdt_ping,
 103         .set_timeout    = qcom_wdt_set_timeout,
 104         .restart        = qcom_wdt_restart,
 105         .owner          = THIS_MODULE,
 106 };
 107
 108 static const struct watchdog_info qcom_wdt_info = {
 109         .options        = WDIOF_KEEPALIVEPING
 110                         | WDIOF_MAGICCLOSE
 111                         | WDIOF_SETTIMEOUT,
 112         .identity       = KBUILD_MODNAME,
 113 };
 114
 115 static int qcom_wdt_probe(struct platform_device *pdev)
 116 {
 117         struct qcom_wdt *wdt;
 118         struct resource *res;
 119         struct device_node *np = pdev->dev.of_node;
 120         u32 percpu_offset;
 121         int ret;
 122
 123         wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
 124         if (!wdt)
 125                 return -ENOMEM;
 126
 127         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 128
 129         /* We use CPU0's DGT for the watchdog */
 130         if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
 131                 percpu_offset = 0;
 132
 133         res->start += percpu_offset;
 134         res->end += percpu_offset;
 135
 136         wdt->base = devm_ioremap_resource(&pdev->dev, res);
 137         if (IS_ERR(wdt->base))
 138                 return PTR_ERR(wdt->base);
 139
 140         wdt->clk = devm_clk_get(&pdev->dev, NULL);
 141         if (IS_ERR(wdt->clk)) {
 142                 dev_err(&pdev->dev, "failed to get input clock\n");
 143                 return PTR_ERR(wdt->clk);
 144         }
 145
 146         ret = clk_prepare_enable(wdt->clk);
 147         if (ret) {
 148                 dev_err(&pdev->dev, "failed to setup clock\n");
 149                 return ret;
 150         }
 151
 152         /*
 153          * We use the clock rate to calculate the max timeout, so ensure it's
 154          * not zero to avoid a divide-by-zero exception.
 155          *
 156          * WATCHDOG_CORE assumes units of seconds, if the WDT is clocked such
 157          * that it would bite before a second elapses it's usefulness is
 158          * limited.  Bail if this is the case.
 159          */
 160         wdt->rate = clk_get_rate(wdt->clk);
 161         if (wdt->rate == 0 ||
 162             wdt->rate > 0x10000000U) {
 163                 dev_err(&pdev->dev, "invalid clock rate\n");
 164                 ret = -EINVAL;
 165                 goto err_clk_unprepare;
 166         }
 167
 168         wdt->wdd.info = &qcom_wdt_info;
 169         wdt->wdd.ops = &qcom_wdt_ops;
 170         wdt->wdd.min_timeout = 1;
 171         wdt->wdd.max_timeout = 0x10000000U / wdt->rate;
 172         wdt->wdd.parent = &pdev->dev;
 173
 174         /*
 175          * If 'timeout-sec' unspecified in devicetree, assume a 30 second
 176          * default, unless the max timeout is less than 30 seconds, then use
 177          * the max instead.
 178          */
 179         wdt->wdd.timeout = min(wdt->wdd.max_timeout, 30U);
 180         watchdog_init_timeout(&wdt->wdd, 0, &pdev->dev);
 181
 182         ret = watchdog_register_device(&wdt->wdd);
 183         if (ret) {
 184                 dev_err(&pdev->dev, "failed to register watchdog\n");
 185                 goto err_clk_unprepare;
 186         }
 187
 188         platform_set_drvdata(pdev, wdt);
 189         return 0;
 190
 191 err_clk_unprepare:
 192         clk_disable_unprepare(wdt->clk);
 193         return ret;
 194 }
 195
 196 static int qcom_wdt_remove(struct platform_device *pdev)
 197 {
 198         struct qcom_wdt *wdt = platform_get_drvdata(pdev);
 199
 200         watchdog_unregister_device(&wdt->wdd);
 201         clk_disable_unprepare(wdt->clk);
 202         return 0;
 203 }
 204
 205 static const struct of_device_id qcom_wdt_of_table[] = {
 206         { .compatible = "qcom,kpss-timer" },
 207         { .compatible = "qcom,scss-timer" },
 208         { },
 209 };
 210 MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);
 211
 212 static struct platform_driver qcom_watchdog_driver = {
 213         .probe  = qcom_wdt_probe,
 214         .remove = qcom_wdt_remove,
 215         .driver = {
 216                 .name           = KBUILD_MODNAME,
 217                 .of_match_table = qcom_wdt_of_table,
 218         },
 219 };
 220 module_platform_driver(qcom_watchdog_driver);
 221
 222 MODULE_DESCRIPTION("QCOM KPSS Watchdog Driver");
 223 MODULE_LICENSE("GPL v2");