Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux...
[linux/fpc-iii.git] / include / sound / designware_i2s.h
blob5681855396c411210b51fffe1b368d6ccf5a1027
1 /*
2 * Copyright (ST) 2012 Rajeev Kumar (rajeevkumar.linux@gmail.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #ifndef __SOUND_DESIGNWARE_I2S_H
21 #define __SOUND_DESIGNWARE_I2S_H
23 #include <linux/dmaengine.h>
24 #include <linux/types.h>
27 * struct i2s_clk_config_data - represent i2s clk configuration data
28 * @chan_nr: number of channel
29 * @data_width: number of bits per sample (8/16/24/32 bit)
30 * @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz)
32 struct i2s_clk_config_data {
33 int chan_nr;
34 u32 data_width;
35 u32 sample_rate;
38 struct i2s_platform_data {
39 #define DWC_I2S_PLAY (1 << 0)
40 #define DWC_I2S_RECORD (1 << 1)
41 #define DW_I2S_SLAVE (1 << 2)
42 #define DW_I2S_MASTER (1 << 3)
43 unsigned int cap;
44 int channel;
45 u32 snd_fmts;
46 u32 snd_rates;
48 #define DW_I2S_QUIRK_COMP_REG_OFFSET (1 << 0)
49 #define DW_I2S_QUIRK_COMP_PARAM1 (1 << 1)
50 unsigned int quirks;
51 unsigned int i2s_reg_comp1;
52 unsigned int i2s_reg_comp2;
54 void *play_dma_data;
55 void *capture_dma_data;
56 bool (*filter)(struct dma_chan *chan, void *slave);
57 int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
60 struct i2s_dma_data {
61 void *data;
62 dma_addr_t addr;
63 u32 max_burst;
64 enum dma_slave_buswidth addr_width;
65 bool (*filter)(struct dma_chan *chan, void *slave);
68 /* I2S DMA registers */
69 #define I2S_RXDMA 0x01C0
70 #define I2S_TXDMA 0x01C8
72 #define TWO_CHANNEL_SUPPORT 2 /* up to 2.0 */
73 #define FOUR_CHANNEL_SUPPORT 4 /* up to 3.1 */
74 #define SIX_CHANNEL_SUPPORT 6 /* up to 5.1 */
75 #define EIGHT_CHANNEL_SUPPORT 8 /* up to 7.1 */
77 #endif /* __SOUND_DESIGNWARE_I2S_H */