2 This file is provided under a dual BSD/GPLv2 license. When using or
3 redistributing this file, you may do so under either license.
6 Copyright(c) 2015 Intel Corporation.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of version 2 of the GNU General Public License as
9 published by the Free Software Foundation.
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
20 Copyright(c) 2015 Intel Corporation.
21 Redistribution and use in source and binary forms, with or without
22 modification, are permitted provided that the following conditions
25 * Redistributions of source code must retain the above copyright
26 notice, this list of conditions and the following disclaimer.
27 * Redistributions in binary form must reproduce the above copyright
28 notice, this list of conditions and the following disclaimer in
29 the documentation and/or other materials provided with the
31 * Neither the name of Intel Corporation nor the names of its
32 contributors may be used to endorse or promote products derived
33 from this software without specific prior written permission.
35 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
37 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
40 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47 #ifndef ADF_PF2VF_MSG_H
48 #define ADF_PF2VF_MSG_H
52 * The PF has an array of 32-bit PF2VF registers, one for each VF. The
53 * PF can access all these registers; each VF can access only the one
54 * register associated with that particular VF.
56 * The register functionally is split into two parts:
57 * The bottom half is for PF->VF messages. In particular when the first
58 * bit of this register (bit 0) gets set an interrupt will be triggered
59 * in the respective VF.
60 * The top half is for VF->PF messages. In particular when the first bit
61 * of this half of register (bit 16) gets set an interrupt will be triggered
64 * The remaining bits within this register are available to encode messages.
65 * and implement a collision control mechanism to prevent concurrent use of
66 * the PF2VF register by both the PF and VF.
68 * 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
69 * _______________________________________________
70 * | | | | | | | | | | | | | | | | |
71 * +-----------------------------------------------+
72 * \___________________________/ \_________/ ^ ^
77 * Message-specific Data/Reserved
79 * 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
80 * _______________________________________________
81 * | | | | | | | | | | | | | | | | |
82 * +-----------------------------------------------+
83 * \___________________________/ \_________/ ^ ^
88 * Message-specific Data/Reserved
90 * Message Origin (Should always be 1)
91 * A legacy out-of-tree QAT driver allowed for a set of messages not supported
92 * by this driver; these had a Msg Origin of 0 and are ignored by this driver.
94 * When a PF or VF attempts to send a message in the lower or upper 16 bits,
95 * respectively, the other 16 bits are written to first with a defined
96 * IN_USE_BY pattern as part of a collision control scheme (see adf_iov_putmsg).
99 #define ADF_PFVF_COMPATIBILITY_VERSION 0x1 /* PF<->VF compat */
101 /* PF->VF messages */
102 #define ADF_PF2VF_INT BIT(0)
103 #define ADF_PF2VF_MSGORIGIN_SYSTEM BIT(1)
104 #define ADF_PF2VF_MSGTYPE_MASK 0x0000003C
105 #define ADF_PF2VF_MSGTYPE_SHIFT 2
106 #define ADF_PF2VF_MSGTYPE_RESTARTING 0x01
107 #define ADF_PF2VF_MSGTYPE_VERSION_RESP 0x02
108 #define ADF_PF2VF_IN_USE_BY_PF 0x6AC20000
109 #define ADF_PF2VF_IN_USE_BY_PF_MASK 0xFFFE0000
111 /* PF->VF Version Response */
112 #define ADF_PF2VF_VERSION_RESP_VERS_MASK 0x00003FC0
113 #define ADF_PF2VF_VERSION_RESP_VERS_SHIFT 6
114 #define ADF_PF2VF_VERSION_RESP_RESULT_MASK 0x0000C000
115 #define ADF_PF2VF_VERSION_RESP_RESULT_SHIFT 14
116 #define ADF_PF2VF_MINORVERSION_SHIFT 6
117 #define ADF_PF2VF_MAJORVERSION_SHIFT 10
118 #define ADF_PF2VF_VF_COMPATIBLE 1
119 #define ADF_PF2VF_VF_INCOMPATIBLE 2
120 #define ADF_PF2VF_VF_COMPAT_UNKNOWN 3
122 /* VF->PF messages */
123 #define ADF_VF2PF_IN_USE_BY_VF 0x00006AC2
124 #define ADF_VF2PF_IN_USE_BY_VF_MASK 0x0000FFFE
125 #define ADF_VF2PF_INT BIT(16)
126 #define ADF_VF2PF_MSGORIGIN_SYSTEM BIT(17)
127 #define ADF_VF2PF_MSGTYPE_MASK 0x003C0000
128 #define ADF_VF2PF_MSGTYPE_SHIFT 18
129 #define ADF_VF2PF_MSGTYPE_INIT 0x3
130 #define ADF_VF2PF_MSGTYPE_SHUTDOWN 0x4
131 #define ADF_VF2PF_MSGTYPE_VERSION_REQ 0x5
132 #define ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ 0x6
134 /* VF->PF Compatible Version Request */
135 #define ADF_VF2PF_COMPAT_VER_REQ_SHIFT 22
137 /* Collision detection */
138 #define ADF_IOV_MSG_COLLISION_DETECT_DELAY 10
139 #define ADF_IOV_MSG_ACK_DELAY 2
140 #define ADF_IOV_MSG_ACK_MAX_RETRY 100
141 #define ADF_IOV_MSG_RETRY_DELAY 5
142 #define ADF_IOV_MSG_MAX_RETRIES 3
143 #define ADF_IOV_MSG_RESP_TIMEOUT (ADF_IOV_MSG_ACK_DELAY * \
144 ADF_IOV_MSG_ACK_MAX_RETRY + \
145 ADF_IOV_MSG_COLLISION_DETECT_DELAY)
146 #endif /* ADF_IOV_MSG_H */