watchdog: pic32-dmt: Remove .owner field for driver
[linux/fpc-iii.git] / drivers / crypto / qat / qat_dh895xccvf / adf_dh895xccvf_hw_data.c
bloba3b4dd8099a7b09d56de7fdbdbe8bfa7aadcce4f
1 /*
2 This file is provided under a dual BSD/GPLv2 license. When using or
3 redistributing this file, you may do so under either license.
5 GPL LICENSE SUMMARY
6 Copyright(c) 2015 Intel Corporation.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of version 2 of the GNU General Public License as
9 published by the Free Software Foundation.
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
16 Contact Information:
17 qat-linux@intel.com
19 BSD LICENSE
20 Copyright(c) 2015 Intel Corporation.
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22 modification, are permitted provided that the following conditions
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36 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47 #include <adf_accel_devices.h>
48 #include <adf_pf2vf_msg.h>
49 #include <adf_common_drv.h>
50 #include "adf_dh895xccvf_hw_data.h"
52 static struct adf_hw_device_class dh895xcciov_class = {
53 .name = ADF_DH895XCCVF_DEVICE_NAME,
54 .type = DEV_DH895XCCVF,
55 .instances = 0
58 static u32 get_accel_mask(u32 fuse)
60 return ADF_DH895XCCIOV_ACCELERATORS_MASK;
63 static u32 get_ae_mask(u32 fuse)
65 return ADF_DH895XCCIOV_ACCELENGINES_MASK;
68 static u32 get_num_accels(struct adf_hw_device_data *self)
70 return ADF_DH895XCCIOV_MAX_ACCELERATORS;
73 static u32 get_num_aes(struct adf_hw_device_data *self)
75 return ADF_DH895XCCIOV_MAX_ACCELENGINES;
78 static u32 get_misc_bar_id(struct adf_hw_device_data *self)
80 return ADF_DH895XCCIOV_PMISC_BAR;
83 static u32 get_etr_bar_id(struct adf_hw_device_data *self)
85 return ADF_DH895XCCIOV_ETR_BAR;
88 static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
90 return DEV_SKU_VF;
93 static u32 get_pf2vf_offset(u32 i)
95 return ADF_DH895XCCIOV_PF2VF_OFFSET;
98 static u32 get_vintmsk_offset(u32 i)
100 return ADF_DH895XCCIOV_VINTMSK_OFFSET;
103 static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
105 return 0;
108 static void adf_vf_void_noop(struct adf_accel_dev *accel_dev)
112 void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
114 hw_data->dev_class = &dh895xcciov_class;
115 hw_data->num_banks = ADF_DH895XCCIOV_ETR_MAX_BANKS;
116 hw_data->num_accel = ADF_DH895XCCIOV_MAX_ACCELERATORS;
117 hw_data->num_logical_accel = 1;
118 hw_data->num_engines = ADF_DH895XCCIOV_MAX_ACCELENGINES;
119 hw_data->tx_rx_gap = ADF_DH895XCCIOV_RX_RINGS_OFFSET;
120 hw_data->tx_rings_mask = ADF_DH895XCCIOV_TX_RINGS_MASK;
121 hw_data->alloc_irq = adf_vf_isr_resource_alloc;
122 hw_data->free_irq = adf_vf_isr_resource_free;
123 hw_data->enable_error_correction = adf_vf_void_noop;
124 hw_data->init_admin_comms = adf_vf_int_noop;
125 hw_data->exit_admin_comms = adf_vf_void_noop;
126 hw_data->send_admin_init = adf_vf2pf_init;
127 hw_data->init_arb = adf_vf_int_noop;
128 hw_data->exit_arb = adf_vf_void_noop;
129 hw_data->disable_iov = adf_vf2pf_shutdown;
130 hw_data->get_accel_mask = get_accel_mask;
131 hw_data->get_ae_mask = get_ae_mask;
132 hw_data->get_num_accels = get_num_accels;
133 hw_data->get_num_aes = get_num_aes;
134 hw_data->get_etr_bar_id = get_etr_bar_id;
135 hw_data->get_misc_bar_id = get_misc_bar_id;
136 hw_data->get_pf2vf_offset = get_pf2vf_offset;
137 hw_data->get_vintmsk_offset = get_vintmsk_offset;
138 hw_data->get_sku = get_sku;
139 hw_data->enable_ints = adf_vf_void_noop;
140 hw_data->enable_vf2pf_comms = adf_enable_vf2pf_comms;
141 hw_data->min_iov_compat_ver = ADF_PFVF_COMPATIBILITY_VERSION;
142 hw_data->dev_class->instances++;
143 adf_devmgr_update_class_index(hw_data);
146 void adf_clean_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
148 hw_data->dev_class->instances--;
149 adf_devmgr_update_class_index(hw_data);