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watchdog: pic32-dmt: Remove .owner field for driver
[linux/fpc-iii.git] / drivers / gpio / gpio-pca953x.c
blob5e3be32ebb8d8f74dd0f7616d462f777d6db071a
1 /*
2 * PCA953x 4/8/16/24/40 bit I/O ports
3 *
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
6 *
7 * Derived from drivers/i2c/chips/pca9539.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 */
13
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/gpio.h>
17 #include <linux/interrupt.h>
18 #include <linux/i2c.h>
19 #include <linux/platform_data/pca953x.h>
20 #include <linux/slab.h>
21 #include <asm/unaligned.h>
22 #include <linux/of_platform.h>
23 #include <linux/acpi.h>
24
25 #define PCA953X_INPUT 0
26 #define PCA953X_OUTPUT 1
27 #define PCA953X_INVERT 2
28 #define PCA953X_DIRECTION 3
29
30 #define REG_ADDR_AI 0x80
31
32 #define PCA957X_IN 0
33 #define PCA957X_INVRT 1
34 #define PCA957X_BKEN 2
35 #define PCA957X_PUPD 3
36 #define PCA957X_CFG 4
37 #define PCA957X_OUT 5
38 #define PCA957X_MSK 6
39 #define PCA957X_INTS 7
40
41 #define PCAL953X_IN_LATCH 34
42 #define PCAL953X_INT_MASK 37
43 #define PCAL953X_INT_STAT 38
44
45 #define PCA_GPIO_MASK 0x00FF
46 #define PCA_INT 0x0100
47 #define PCA_PCAL 0x0200
48 #define PCA953X_TYPE 0x1000
49 #define PCA957X_TYPE 0x2000
50 #define PCA_TYPE_MASK 0xF000
51
52 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
53
54 static const struct i2c_device_id pca953x_id[] = {
55 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
56 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
57 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
58 { "pca9536", 4 | PCA953X_TYPE, },
59 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
60 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
61 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
62 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
63 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
64 { "pca9556", 8 | PCA953X_TYPE, },
65 { "pca9557", 8 | PCA953X_TYPE, },
66 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
67 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
68 { "pca9698", 40 | PCA953X_TYPE, },
69
70 { "max7310", 8 | PCA953X_TYPE, },
71 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
72 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
73 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
74 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
75 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
76 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
77 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
78 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
79 { "xra1202", 8 | PCA953X_TYPE },
80 { }
81 };
82 MODULE_DEVICE_TABLE(i2c, pca953x_id);
83
84 static const struct acpi_device_id pca953x_acpi_ids[] = {
85 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
86 { }
87 };
88 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
89
90 #define MAX_BANK 5
91 #define BANK_SZ 8
92
93 #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
94
95 struct pca953x_chip {
96 unsigned gpio_start;
97 u8 reg_output[MAX_BANK];
98 u8 reg_direction[MAX_BANK];
99 struct mutex i2c_lock;
100
101 #ifdef CONFIG_GPIO_PCA953X_IRQ
102 struct mutex irq_lock;
103 u8 irq_mask[MAX_BANK];
104 u8 irq_stat[MAX_BANK];
105 u8 irq_trig_raise[MAX_BANK];
106 u8 irq_trig_fall[MAX_BANK];
107 #endif
108
109 struct i2c_client *client;
110 struct gpio_chip gpio_chip;
111 const char *const *names;
112 int chip_type;
113 unsigned long driver_data;
114 };
115
116 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
117 int off)
118 {
119 int ret;
120 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
121 int offset = off / BANK_SZ;
122
123 ret = i2c_smbus_read_byte_data(chip->client,
124 (reg << bank_shift) + offset);
125 *val = ret;
126
127 if (ret < 0) {
128 dev_err(&chip->client->dev, "failed reading register\n");
129 return ret;
130 }
131
132 return 0;
133 }
134
135 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
136 int off)
137 {
138 int ret = 0;
139 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
140 int offset = off / BANK_SZ;
141
142 ret = i2c_smbus_write_byte_data(chip->client,
143 (reg << bank_shift) + offset, val);
144
145 if (ret < 0) {
146 dev_err(&chip->client->dev, "failed writing register\n");
147 return ret;
148 }
149
150 return 0;
151 }
152
153 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
154 {
155 int ret = 0;
156
157 if (chip->gpio_chip.ngpio <= 8)
158 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
159 else if (chip->gpio_chip.ngpio >= 24) {
160 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
161 ret = i2c_smbus_write_i2c_block_data(chip->client,
162 (reg << bank_shift) | REG_ADDR_AI,
163 NBANK(chip), val);
164 } else {
165 switch (chip->chip_type) {
166 case PCA953X_TYPE:
167 ret = i2c_smbus_write_word_data(chip->client,
168 reg << 1, cpu_to_le16(get_unaligned((u16 *)val)));
169 break;
170 case PCA957X_TYPE:
171 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
172 val[0]);
173 if (ret < 0)
174 break;
175 ret = i2c_smbus_write_byte_data(chip->client,
176 (reg << 1) + 1,
177 val[1]);
178 break;
179 }
180 }
181
182 if (ret < 0) {
183 dev_err(&chip->client->dev, "failed writing register\n");
184 return ret;
185 }
186
187 return 0;
188 }
189
190 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
191 {
192 int ret;
193
194 if (chip->gpio_chip.ngpio <= 8) {
195 ret = i2c_smbus_read_byte_data(chip->client, reg);
196 *val = ret;
197 } else if (chip->gpio_chip.ngpio >= 24) {
198 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
199
200 ret = i2c_smbus_read_i2c_block_data(chip->client,
201 (reg << bank_shift) | REG_ADDR_AI,
202 NBANK(chip), val);
203 } else {
204 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
205 val[0] = (u16)ret & 0xFF;
206 val[1] = (u16)ret >> 8;
207 }
208 if (ret < 0) {
209 dev_err(&chip->client->dev, "failed reading register\n");
210 return ret;
211 }
212
213 return 0;
214 }
215
216 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
217 {
218 struct pca953x_chip *chip = gpiochip_get_data(gc);
219 u8 reg_val;
220 int ret, offset = 0;
221
222 mutex_lock(&chip->i2c_lock);
223 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
224
225 switch (chip->chip_type) {
226 case PCA953X_TYPE:
227 offset = PCA953X_DIRECTION;
228 break;
229 case PCA957X_TYPE:
230 offset = PCA957X_CFG;
231 break;
232 }
233 ret = pca953x_write_single(chip, offset, reg_val, off);
234 if (ret)
235 goto exit;
236
237 chip->reg_direction[off / BANK_SZ] = reg_val;
238 ret = 0;
239 exit:
240 mutex_unlock(&chip->i2c_lock);
241 return ret;
242 }
243
244 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
245 unsigned off, int val)
246 {
247 struct pca953x_chip *chip = gpiochip_get_data(gc);
248 u8 reg_val;
249 int ret, offset = 0;
250
251 mutex_lock(&chip->i2c_lock);
252 /* set output level */
253 if (val)
254 reg_val = chip->reg_output[off / BANK_SZ]
255 | (1u << (off % BANK_SZ));
256 else
257 reg_val = chip->reg_output[off / BANK_SZ]
258 & ~(1u << (off % BANK_SZ));
259
260 switch (chip->chip_type) {
261 case PCA953X_TYPE:
262 offset = PCA953X_OUTPUT;
263 break;
264 case PCA957X_TYPE:
265 offset = PCA957X_OUT;
266 break;
267 }
268 ret = pca953x_write_single(chip, offset, reg_val, off);
269 if (ret)
270 goto exit;
271
272 chip->reg_output[off / BANK_SZ] = reg_val;
273
274 /* then direction */
275 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
276 switch (chip->chip_type) {
277 case PCA953X_TYPE:
278 offset = PCA953X_DIRECTION;
279 break;
280 case PCA957X_TYPE:
281 offset = PCA957X_CFG;
282 break;
283 }
284 ret = pca953x_write_single(chip, offset, reg_val, off);
285 if (ret)
286 goto exit;
287
288 chip->reg_direction[off / BANK_SZ] = reg_val;
289 ret = 0;
290 exit:
291 mutex_unlock(&chip->i2c_lock);
292 return ret;
293 }
294
295 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
296 {
297 struct pca953x_chip *chip = gpiochip_get_data(gc);
298 u32 reg_val;
299 int ret, offset = 0;
300
301 mutex_lock(&chip->i2c_lock);
302 switch (chip->chip_type) {
303 case PCA953X_TYPE:
304 offset = PCA953X_INPUT;
305 break;
306 case PCA957X_TYPE:
307 offset = PCA957X_IN;
308 break;
309 }
310 ret = pca953x_read_single(chip, offset, &reg_val, off);
311 mutex_unlock(&chip->i2c_lock);
312 if (ret < 0) {
313 /* NOTE: diagnostic already emitted; that's all we should
314 * do unless gpio_*_value_cansleep() calls become different
315 * from their nonsleeping siblings (and report faults).
316 */
317 return 0;
318 }
319
320 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
321 }
322
323 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
324 {
325 struct pca953x_chip *chip = gpiochip_get_data(gc);
326 u8 reg_val;
327 int ret, offset = 0;
328
329 mutex_lock(&chip->i2c_lock);
330 if (val)
331 reg_val = chip->reg_output[off / BANK_SZ]
332 | (1u << (off % BANK_SZ));
333 else
334 reg_val = chip->reg_output[off / BANK_SZ]
335 & ~(1u << (off % BANK_SZ));
336
337 switch (chip->chip_type) {
338 case PCA953X_TYPE:
339 offset = PCA953X_OUTPUT;
340 break;
341 case PCA957X_TYPE:
342 offset = PCA957X_OUT;
343 break;
344 }
345 ret = pca953x_write_single(chip, offset, reg_val, off);
346 if (ret)
347 goto exit;
348
349 chip->reg_output[off / BANK_SZ] = reg_val;
350 exit:
351 mutex_unlock(&chip->i2c_lock);
352 }
353
354
355 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
356 unsigned long *mask, unsigned long *bits)
357 {
358 struct pca953x_chip *chip = gpiochip_get_data(gc);
359 u8 reg_val[MAX_BANK];
360 int ret, offset = 0;
361 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
362 int bank;
363
364 switch (chip->chip_type) {
365 case PCA953X_TYPE:
366 offset = PCA953X_OUTPUT;
367 break;
368 case PCA957X_TYPE:
369 offset = PCA957X_OUT;
370 break;
371 }
372
373 memcpy(reg_val, chip->reg_output, NBANK(chip));
374 mutex_lock(&chip->i2c_lock);
375 for(bank=0; bank<NBANK(chip); bank++) {
376 unsigned bankmask = mask[bank / sizeof(*mask)] >>
377 ((bank % sizeof(*mask)) * 8);
378 if(bankmask) {
379 unsigned bankval = bits[bank / sizeof(*bits)] >>
380 ((bank % sizeof(*bits)) * 8);
381 reg_val[bank] = (reg_val[bank] & ~bankmask) | bankval;
382 }
383 }
384 ret = i2c_smbus_write_i2c_block_data(chip->client, offset << bank_shift, NBANK(chip), reg_val);
385 if (ret)
386 goto exit;
387
388 memcpy(chip->reg_output, reg_val, NBANK(chip));
389 exit:
390 mutex_unlock(&chip->i2c_lock);
391 }
392
393 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
394 {
395 struct gpio_chip *gc;
396
397 gc = &chip->gpio_chip;
398
399 gc->direction_input = pca953x_gpio_direction_input;
400 gc->direction_output = pca953x_gpio_direction_output;
401 gc->get = pca953x_gpio_get_value;
402 gc->set = pca953x_gpio_set_value;
403 gc->set_multiple = pca953x_gpio_set_multiple;
404 gc->can_sleep = true;
405
406 gc->base = chip->gpio_start;
407 gc->ngpio = gpios;
408 gc->label = chip->client->name;
409 gc->parent = &chip->client->dev;
410 gc->owner = THIS_MODULE;
411 gc->names = chip->names;
412 }
413
414 #ifdef CONFIG_GPIO_PCA953X_IRQ
415 static void pca953x_irq_mask(struct irq_data *d)
416 {
417 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
418 struct pca953x_chip *chip = gpiochip_get_data(gc);
419
420 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
421 }
422
423 static void pca953x_irq_unmask(struct irq_data *d)
424 {
425 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
426 struct pca953x_chip *chip = gpiochip_get_data(gc);
427
428 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
429 }
430
431 static void pca953x_irq_bus_lock(struct irq_data *d)
432 {
433 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
434 struct pca953x_chip *chip = gpiochip_get_data(gc);
435
436 mutex_lock(&chip->irq_lock);
437 }
438
439 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
440 {
441 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
442 struct pca953x_chip *chip = gpiochip_get_data(gc);
443 u8 new_irqs;
444 int level, i;
445 u8 invert_irq_mask[MAX_BANK];
446
447 if (chip->driver_data & PCA_PCAL) {
448 /* Enable latch on interrupt-enabled inputs */
449 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
450
451 for (i = 0; i < NBANK(chip); i++)
452 invert_irq_mask[i] = ~chip->irq_mask[i];
453
454 /* Unmask enabled interrupts */
455 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
456 }
457
458 /* Look for any newly setup interrupt */
459 for (i = 0; i < NBANK(chip); i++) {
460 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
461 new_irqs &= ~chip->reg_direction[i];
462
463 while (new_irqs) {
464 level = __ffs(new_irqs);
465 pca953x_gpio_direction_input(&chip->gpio_chip,
466 level + (BANK_SZ * i));
467 new_irqs &= ~(1 << level);
468 }
469 }
470
471 mutex_unlock(&chip->irq_lock);
472 }
473
474 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
475 {
476 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
477 struct pca953x_chip *chip = gpiochip_get_data(gc);
478 int bank_nb = d->hwirq / BANK_SZ;
479 u8 mask = 1 << (d->hwirq % BANK_SZ);
480
481 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
482 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
483 d->irq, type);
484 return -EINVAL;
485 }
486
487 if (type & IRQ_TYPE_EDGE_FALLING)
488 chip->irq_trig_fall[bank_nb] |= mask;
489 else
490 chip->irq_trig_fall[bank_nb] &= ~mask;
491
492 if (type & IRQ_TYPE_EDGE_RISING)
493 chip->irq_trig_raise[bank_nb] |= mask;
494 else
495 chip->irq_trig_raise[bank_nb] &= ~mask;
496
497 return 0;
498 }
499
500 static struct irq_chip pca953x_irq_chip = {
501 .name = "pca953x",
502 .irq_mask = pca953x_irq_mask,
503 .irq_unmask = pca953x_irq_unmask,
504 .irq_bus_lock = pca953x_irq_bus_lock,
505 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
506 .irq_set_type = pca953x_irq_set_type,
507 };
508
509 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
510 {
511 u8 cur_stat[MAX_BANK];
512 u8 old_stat[MAX_BANK];
513 bool pending_seen = false;
514 bool trigger_seen = false;
515 u8 trigger[MAX_BANK];
516 int ret, i, offset = 0;
517
518 if (chip->driver_data & PCA_PCAL) {
519 /* Read the current interrupt status from the device */
520 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
521 if (ret)
522 return false;
523
524 /* Check latched inputs and clear interrupt status */
525 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
526 if (ret)
527 return false;
528
529 for (i = 0; i < NBANK(chip); i++) {
530 /* Apply filter for rising/falling edge selection */
531 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
532 (cur_stat[i] & chip->irq_trig_raise[i]);
533 pending[i] &= trigger[i];
534 if (pending[i])
535 pending_seen = true;
536 }
537
538 return pending_seen;
539 }
540
541 switch (chip->chip_type) {
542 case PCA953X_TYPE:
543 offset = PCA953X_INPUT;
544 break;
545 case PCA957X_TYPE:
546 offset = PCA957X_IN;
547 break;
548 }
549 ret = pca953x_read_regs(chip, offset, cur_stat);
550 if (ret)
551 return false;
552
553 /* Remove output pins from the equation */
554 for (i = 0; i < NBANK(chip); i++)
555 cur_stat[i] &= chip->reg_direction[i];
556
557 memcpy(old_stat, chip->irq_stat, NBANK(chip));
558
559 for (i = 0; i < NBANK(chip); i++) {
560 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
561 if (trigger[i])
562 trigger_seen = true;
563 }
564
565 if (!trigger_seen)
566 return false;
567
568 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
569
570 for (i = 0; i < NBANK(chip); i++) {
571 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
572 (cur_stat[i] & chip->irq_trig_raise[i]);
573 pending[i] &= trigger[i];
574 if (pending[i])
575 pending_seen = true;
576 }
577
578 return pending_seen;
579 }
580
581 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
582 {
583 struct pca953x_chip *chip = devid;
584 u8 pending[MAX_BANK];
585 u8 level;
586 unsigned nhandled = 0;
587 int i;
588
589 if (!pca953x_irq_pending(chip, pending))
590 return IRQ_NONE;
591
592 for (i = 0; i < NBANK(chip); i++) {
593 while (pending[i]) {
594 level = __ffs(pending[i]);
595 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
596 level + (BANK_SZ * i)));
597 pending[i] &= ~(1 << level);
598 nhandled++;
599 }
600 }
601
602 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
603 }
604
605 static int pca953x_irq_setup(struct pca953x_chip *chip,
606 int irq_base)
607 {
608 struct i2c_client *client = chip->client;
609 int ret, i, offset = 0;
610
611 if (client->irq && irq_base != -1
612 && (chip->driver_data & PCA_INT)) {
613
614 switch (chip->chip_type) {
615 case PCA953X_TYPE:
616 offset = PCA953X_INPUT;
617 break;
618 case PCA957X_TYPE:
619 offset = PCA957X_IN;
620 break;
621 }
622 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
623 if (ret)
624 return ret;
625
626 /*
627 * There is no way to know which GPIO line generated the
628 * interrupt. We have to rely on the previous read for
629 * this purpose.
630 */
631 for (i = 0; i < NBANK(chip); i++)
632 chip->irq_stat[i] &= chip->reg_direction[i];
633 mutex_init(&chip->irq_lock);
634
635 ret = devm_request_threaded_irq(&client->dev,
636 client->irq,
637 NULL,
638 pca953x_irq_handler,
639 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
640 IRQF_SHARED,
641 dev_name(&client->dev), chip);
642 if (ret) {
643 dev_err(&client->dev, "failed to request irq %d\n",
644 client->irq);
645 return ret;
646 }
647
648 ret = gpiochip_irqchip_add(&chip->gpio_chip,
649 &pca953x_irq_chip,
650 irq_base,
651 handle_simple_irq,
652 IRQ_TYPE_NONE);
653 if (ret) {
654 dev_err(&client->dev,
655 "could not connect irqchip to gpiochip\n");
656 return ret;
657 }
658
659 gpiochip_set_chained_irqchip(&chip->gpio_chip,
660 &pca953x_irq_chip,
661 client->irq, NULL);
662 }
663
664 return 0;
665 }
666
667 #else /* CONFIG_GPIO_PCA953X_IRQ */
668 static int pca953x_irq_setup(struct pca953x_chip *chip,
669 int irq_base)
670 {
671 struct i2c_client *client = chip->client;
672
673 if (irq_base != -1 && (chip->driver_data & PCA_INT))
674 dev_warn(&client->dev, "interrupt support not compiled in\n");
675
676 return 0;
677 }
678 #endif
679
680 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
681 {
682 int ret;
683 u8 val[MAX_BANK];
684
685 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
686 if (ret)
687 goto out;
688
689 ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
690 chip->reg_direction);
691 if (ret)
692 goto out;
693
694 /* set platform specific polarity inversion */
695 if (invert)
696 memset(val, 0xFF, NBANK(chip));
697 else
698 memset(val, 0, NBANK(chip));
699
700 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
701 out:
702 return ret;
703 }
704
705 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
706 {
707 int ret;
708 u8 val[MAX_BANK];
709
710 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
711 if (ret)
712 goto out;
713 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
714 if (ret)
715 goto out;
716
717 /* set platform specific polarity inversion */
718 if (invert)
719 memset(val, 0xFF, NBANK(chip));
720 else
721 memset(val, 0, NBANK(chip));
722 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
723 if (ret)
724 goto out;
725
726 /* To enable register 6, 7 to control pull up and pull down */
727 memset(val, 0x02, NBANK(chip));
728 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
729 if (ret)
730 goto out;
731
732 return 0;
733 out:
734 return ret;
735 }
736
737 static const struct of_device_id pca953x_dt_ids[];
738
739 static int pca953x_probe(struct i2c_client *client,
740 const struct i2c_device_id *id)
741 {
742 struct pca953x_platform_data *pdata;
743 struct pca953x_chip *chip;
744 int irq_base = 0;
745 int ret;
746 u32 invert = 0;
747
748 chip = devm_kzalloc(&client->dev,
749 sizeof(struct pca953x_chip), GFP_KERNEL);
750 if (chip == NULL)
751 return -ENOMEM;
752
753 pdata = dev_get_platdata(&client->dev);
754 if (pdata) {
755 irq_base = pdata->irq_base;
756 chip->gpio_start = pdata->gpio_base;
757 invert = pdata->invert;
758 chip->names = pdata->names;
759 } else {
760 chip->gpio_start = -1;
761 irq_base = 0;
762 }
763
764 chip->client = client;
765
766 if (id) {
767 chip->driver_data = id->driver_data;
768 } else {
769 const struct acpi_device_id *id;
770 const struct of_device_id *match;
771
772 match = of_match_device(pca953x_dt_ids, &client->dev);
773 if (match) {
774 chip->driver_data = (int)(uintptr_t)match->data;
775 } else {
776 id = acpi_match_device(pca953x_acpi_ids, &client->dev);
777 if (!id)
778 return -ENODEV;
779
780 chip->driver_data = id->driver_data;
781 }
782 }
783
784 chip->chip_type = PCA_CHIP_TYPE(chip->driver_data);
785
786 mutex_init(&chip->i2c_lock);
787
788 /* initialize cached registers from their original values.
789 * we can't share this chip with another i2c master.
790 */
791 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
792
793 if (chip->chip_type == PCA953X_TYPE)
794 ret = device_pca953x_init(chip, invert);
795 else
796 ret = device_pca957x_init(chip, invert);
797 if (ret)
798 return ret;
799
800 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
801 if (ret)
802 return ret;
803
804 ret = pca953x_irq_setup(chip, irq_base);
805 if (ret)
806 return ret;
807
808 if (pdata && pdata->setup) {
809 ret = pdata->setup(client, chip->gpio_chip.base,
810 chip->gpio_chip.ngpio, pdata->context);
811 if (ret < 0)
812 dev_warn(&client->dev, "setup failed, %d\n", ret);
813 }
814
815 i2c_set_clientdata(client, chip);
816 return 0;
817 }
818
819 static int pca953x_remove(struct i2c_client *client)
820 {
821 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
822 struct pca953x_chip *chip = i2c_get_clientdata(client);
823 int ret = 0;
824
825 if (pdata && pdata->teardown) {
826 ret = pdata->teardown(client, chip->gpio_chip.base,
827 chip->gpio_chip.ngpio, pdata->context);
828 if (ret < 0) {
829 dev_err(&client->dev, "%s failed, %d\n",
830 "teardown", ret);
831 return ret;
832 }
833 }
834
835 return 0;
836 }
837
838 /* convenience to stop overlong match-table lines */
839 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
840 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
841
842 static const struct of_device_id pca953x_dt_ids[] = {
843 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
844 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
845 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
846 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
847 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
848 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
849 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
850 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
851 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
852 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
853 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
854 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
855 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
856 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
857
858 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
859 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
860 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
861 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
862
863 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
864 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
865 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
866 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
867
868 { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), },
869
870 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
871 { }
872 };
873
874 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
875
876 static struct i2c_driver pca953x_driver = {
877 .driver = {
878 .name = "pca953x",
879 .of_match_table = pca953x_dt_ids,
880 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
881 },
882 .probe = pca953x_probe,
883 .remove = pca953x_remove,
884 .id_table = pca953x_id,
885 };
886
887 static int __init pca953x_init(void)
888 {
889 return i2c_add_driver(&pca953x_driver);
890 }
891 /* register after i2c postcore initcall and before
892 * subsys initcalls that may rely on these GPIOs
893 */
894 subsys_initcall(pca953x_init);
895
896 static void __exit pca953x_exit(void)
897 {
898 i2c_del_driver(&pca953x_driver);
899 }
900 module_exit(pca953x_exit);
901
902 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
903 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
904 MODULE_LICENSE("GPL");
Linux with added FPC-III support