1 // SPDX-License-Identifier: GPL-2.0
3 * Device driver for the via ADB on (many) Mac II-class machines
5 * Based on the original ADB keyboard handler Copyright (c) 1997 Alan Cox
6 * Also derived from code Copyright (C) 1996 Paul Mackerras.
8 * With various updates provided over the years by Michael Schmitz,
9 * Guideo Koerber and others.
11 * Rewrite for Unified ADB by Joshua M. Thompson (funaho@jurai.org)
13 * 1999-08-02 (jmt) - Initial rewrite for Unified ADB.
14 * 2000-03-29 Tony Mantler <tonym@mac.linux-m68k.org>
15 * - Big overhaul, should actually work now.
16 * 2006-12-31 Finn Thain - Another overhaul.
19 * Inside Macintosh, ch. 5 ADB Manager
20 * Guide to the Macinstosh Family Hardware, ch. 8 Apple Desktop Bus
21 * Rockwell R6522 VIA datasheet
23 * Apple's "ADB Analyzer" bus sniffer is invaluable:
24 * ftp://ftp.apple.com/developer/Tool_Chest/Devices_-_Hardware/Apple_Desktop_Bus/
28 #include <linux/types.h>
29 #include <linux/errno.h>
30 #include <linux/kernel.h>
31 #include <linux/delay.h>
32 #include <linux/adb.h>
33 #include <linux/interrupt.h>
34 #include <linux/init.h>
35 #include <asm/macintosh.h>
36 #include <asm/macints.h>
37 #include <asm/mac_via.h>
39 static volatile unsigned char *via
;
41 /* VIA registers - spaced 0x200 bytes apart */
42 #define RS 0x200 /* skip between registers */
43 #define B 0 /* B-side data */
44 #define A RS /* A-side data */
45 #define DIRB (2*RS) /* B-side direction (1=output) */
46 #define DIRA (3*RS) /* A-side direction (1=output) */
47 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
48 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
49 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
50 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
51 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
52 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
53 #define SR (10*RS) /* Shift register */
54 #define ACR (11*RS) /* Auxiliary control register */
55 #define PCR (12*RS) /* Peripheral control register */
56 #define IFR (13*RS) /* Interrupt flag register */
57 #define IER (14*RS) /* Interrupt enable register */
58 #define ANH (15*RS) /* A-side data, no handshake */
60 /* Bits in B data register: all active low */
61 #define CTLR_IRQ 0x08 /* Controller rcv status (input) */
62 #define ST_MASK 0x30 /* mask for selecting ADB state bits */
65 #define SR_CTRL 0x1c /* Shift register control bits */
66 #define SR_EXT 0x0c /* Shift on external clock */
67 #define SR_OUT 0x10 /* Shift out if 1 */
69 /* Bits in IFR and IER */
70 #define IER_SET 0x80 /* set bits in IER */
71 #define IER_CLR 0 /* clear bits in IER */
72 #define SR_INT 0x04 /* Shift register full/empty */
74 /* ADB transaction states according to GMHW */
75 #define ST_CMD 0x00 /* ADB state: command byte */
76 #define ST_EVEN 0x10 /* ADB state: even data byte */
77 #define ST_ODD 0x20 /* ADB state: odd data byte */
78 #define ST_IDLE 0x30 /* ADB state: idle, nothing to send */
80 static int macii_init_via(void);
81 static void macii_start(void);
82 static irqreturn_t
macii_interrupt(int irq
, void *arg
);
83 static void macii_queue_poll(void);
85 static int macii_probe(void);
86 static int macii_init(void);
87 static int macii_send_request(struct adb_request
*req
, int sync
);
88 static int macii_write(struct adb_request
*req
);
89 static int macii_autopoll(int devs
);
90 static void macii_poll(void);
91 static int macii_reset_bus(void);
93 struct adb_driver via_macii_driver
= {
97 .send_request
= macii_send_request
,
98 .autopoll
= macii_autopoll
,
100 .reset_bus
= macii_reset_bus
,
103 static enum macii_state
{
110 static struct adb_request
*current_req
; /* first request struct in the queue */
111 static struct adb_request
*last_req
; /* last request struct in the queue */
112 static unsigned char reply_buf
[16]; /* storage for autopolled replies */
113 static unsigned char *reply_ptr
; /* next byte in reply_buf or req->reply */
114 static int reading_reply
; /* store reply in reply_buf else req->reply */
115 static int data_index
; /* index of the next byte to send from req->data */
116 static int reply_len
; /* number of bytes received in reply_buf or req->reply */
117 static int status
; /* VIA's ADB status bits captured upon interrupt */
118 static int last_status
; /* status bits as at previous interrupt */
119 static int srq_asserted
; /* have to poll for the device that asserted it */
120 static int command_byte
; /* the most recent command byte transmitted */
121 static int autopoll_devs
; /* bits set are device addresses to be polled */
123 /* Check for MacII style ADB */
124 static int macii_probe(void)
126 if (macintosh_config
->adb_type
!= MAC_ADB_II
)
131 pr_info("adb: Mac II ADB Driver v1.0 for Unified ADB\n");
135 /* Initialize the driver */
141 local_irq_save(flags
);
143 err
= macii_init_via();
147 err
= request_irq(IRQ_MAC_ADB
, macii_interrupt
, 0, "ADB",
154 local_irq_restore(flags
);
158 /* initialize the hardware */
159 static int macii_init_via(void)
163 /* We want CTLR_IRQ as input and ST_EVEN | ST_ODD as output lines. */
164 via
[DIRB
] = (via
[DIRB
] | ST_EVEN
| ST_ODD
) & ~CTLR_IRQ
;
166 /* Set up state: idle */
168 last_status
= via
[B
] & (ST_MASK
| CTLR_IRQ
);
170 /* Shift register on input */
171 via
[ACR
] = (via
[ACR
] & ~SR_CTRL
) | SR_EXT
;
173 /* Wipe any pending data and int */
179 /* Send an ADB poll (Talk Register 0 command prepended to the request queue) */
180 static void macii_queue_poll(void)
182 /* No point polling the active device as it will never assert SRQ, so
183 * poll the next device in the autopoll list. This could leave us
184 * stuck in a polling loop if an unprobed device is asserting SRQ.
185 * In theory, that could only happen if a device was plugged in after
186 * probing started. Unplugging it again will break the cycle.
187 * (Simply polling the next higher device often ends up polling almost
188 * every device (after wrapping around), which takes too long.)
192 static struct adb_request req
;
197 device_mask
= (1 << (((command_byte
& 0xF0) >> 4) + 1)) - 1;
198 if (autopoll_devs
& ~device_mask
)
199 next_device
= ffs(autopoll_devs
& ~device_mask
) - 1;
201 next_device
= ffs(autopoll_devs
) - 1;
203 adb_request(&req
, NULL
, ADBREQ_NOSEND
, 1, ADB_READREG(next_device
, 0));
208 req
.next
= current_req
;
210 if (current_req
!= NULL
) {
218 /* Send an ADB request; if sync, poll out the reply 'till it's done */
219 static int macii_send_request(struct adb_request
*req
, int sync
)
223 err
= macii_write(req
);
228 while (!req
->complete
)
234 /* Send an ADB request (append to request queue) */
235 static int macii_write(struct adb_request
*req
)
239 if (req
->nbytes
< 2 || req
->data
[0] != ADB_PACKET
|| req
->nbytes
> 15) {
249 local_irq_save(flags
);
251 if (current_req
!= NULL
) {
252 last_req
->next
= req
;
257 if (macii_state
== idle
)
261 local_irq_restore(flags
);
266 /* Start auto-polling */
267 static int macii_autopoll(int devs
)
269 static struct adb_request req
;
273 /* bit 1 == device 1, and so on. */
274 autopoll_devs
= devs
& 0xFFFE;
279 local_irq_save(flags
);
281 if (current_req
== NULL
) {
282 /* Send a Talk Reg 0. The controller will repeatedly transmit
283 * this as long as it is idle.
285 adb_request(&req
, NULL
, ADBREQ_NOSEND
, 1,
286 ADB_READREG(ffs(autopoll_devs
) - 1, 0));
287 err
= macii_write(&req
);
290 local_irq_restore(flags
);
294 static inline int need_autopoll(void)
296 /* Was the last command Talk Reg 0
297 * and is the target on the autopoll list?
299 if ((command_byte
& 0x0F) == 0x0C &&
300 ((1 << ((command_byte
& 0xF0) >> 4)) & autopoll_devs
))
305 /* Prod the chip without interrupts */
306 static void macii_poll(void)
308 macii_interrupt(0, NULL
);
312 static int macii_reset_bus(void)
314 static struct adb_request req
;
316 /* Command = 0, Address = ignored */
317 adb_request(&req
, NULL
, ADBREQ_NOSEND
, 1, ADB_BUSRESET
);
318 macii_send_request(&req
, 1);
320 /* Don't want any more requests during the Global Reset low time. */
326 /* Start sending ADB packet */
327 static void macii_start(void)
329 struct adb_request
*req
;
333 /* Now send it. Be careful though, that first byte of the request
334 * is actually ADB_PACKET; the real data begins at index 1!
335 * And req->nbytes is the number of bytes of real data plus one.
338 /* store command byte */
339 command_byte
= req
->data
[1];
343 via
[SR
] = req
->data
[1];
344 /* set ADB state to 'command' */
345 via
[B
] = (via
[B
] & ~ST_MASK
) | ST_CMD
;
347 macii_state
= sending
;
352 * The notorious ADB interrupt handler - does all of the protocol handling.
353 * Relies on the ADB controller sending and receiving data, thereby
354 * generating shift register interrupts (SR_INT) for us. This means there has
355 * to be activity on the ADB bus. The chip will poll to achieve this.
357 * The basic ADB state machine was left unchanged from the original MacII code
358 * by Alan Cox, which was based on the CUDA driver for PowerMac.
359 * The syntax of the ADB status lines is totally different on MacII,
360 * though. MacII uses the states Command -> Even -> Odd -> Even ->...-> Idle
361 * for sending and Idle -> Even -> Odd -> Even ->...-> Idle for receiving.
362 * Start and end of a receive packet are signalled by asserting /IRQ on the
363 * interrupt line (/IRQ means the CTLR_IRQ bit in port B; not to be confused
364 * with the VIA shift register interrupt. /IRQ never actually interrupts the
365 * processor, it's just an ordinary input.)
367 static irqreturn_t
macii_interrupt(int irq
, void *arg
)
370 struct adb_request
*req
;
373 local_irq_save(flags
);
376 /* Clear the SR IRQ flag when polling. */
377 if (via
[IFR
] & SR_INT
)
380 local_irq_restore(flags
);
385 last_status
= status
;
386 status
= via
[B
] & (ST_MASK
| CTLR_IRQ
);
388 switch (macii_state
) {
391 reply_ptr
= current_req
->reply
;
393 WARN_ON(current_req
);
394 reply_ptr
= reply_buf
;
399 if ((status
& CTLR_IRQ
) && (x
== 0xFF)) {
400 /* Bus timeout without SRQ sequence:
401 * data is "FF" while CTLR_IRQ is "H"
405 macii_state
= read_done
;
407 macii_state
= reading
;
412 /* set ADB state = even for first data byte */
413 via
[B
] = (via
[B
] & ~ST_MASK
) | ST_EVEN
;
418 if (data_index
>= req
->nbytes
) {
422 if (req
->reply_expected
) {
426 current_req
= req
->next
;
432 else if (need_autopoll())
433 macii_autopoll(autopoll_devs
);
436 if (macii_state
== idle
) {
437 /* reset to shift in */
440 /* set ADB state idle - might get SRQ */
441 via
[B
] = (via
[B
] & ~ST_MASK
) | ST_IDLE
;
444 via
[SR
] = req
->data
[data_index
++];
446 if ((via
[B
] & ST_MASK
) == ST_CMD
) {
447 /* just sent the command byte, set to EVEN */
448 via
[B
] = (via
[B
] & ~ST_MASK
) | ST_EVEN
;
450 /* invert state bits, toggle ODD/EVEN */
458 WARN_ON((status
& ST_MASK
) == ST_CMD
||
459 (status
& ST_MASK
) == ST_IDLE
);
461 /* Bus timeout with SRQ sequence:
462 * data is "XX FF" while CTLR_IRQ is "L L"
463 * End of packet without SRQ sequence:
464 * data is "XX...YY 00" while CTLR_IRQ is "L...H L"
465 * End of packet SRQ sequence:
466 * data is "XX...YY 00" while CTLR_IRQ is "L...L L"
467 * (where XX is the first response byte and
468 * YY is the last byte of valid response data.)
472 if (!(status
& CTLR_IRQ
)) {
474 if (!(last_status
& CTLR_IRQ
)) {
475 macii_state
= read_done
;
479 } else if (x
== 0x00) {
480 macii_state
= read_done
;
481 if (!(last_status
& CTLR_IRQ
))
486 if (macii_state
== reading
&&
487 reply_len
< ARRAY_SIZE(reply_buf
)) {
493 /* invert state bits, toggle ODD/EVEN */
503 req
->reply_len
= reply_len
;
505 current_req
= req
->next
;
508 } else if (reply_len
&& autopoll_devs
)
509 adb_input(reply_buf
, reply_len
, 0);
513 /* SRQ seen before, initiate poll now */
519 else if (need_autopoll())
520 macii_autopoll(autopoll_devs
);
522 if (macii_state
== idle
)
523 via
[B
] = (via
[B
] & ~ST_MASK
) | ST_IDLE
;
530 local_irq_restore(flags
);