| blob | ef766a358b37dd355e8d5d75c10a61d47a83e04f |
1 /*
2 * linux/arch/x86_64/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
7 *
8 * entry.S contains the system-call and fault low-level handling routines.
9 *
10 * Some of this is documented in Documentation/x86/entry_64.txt
11 *
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
15 *
16 * Some macro usage:
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
20 */
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
25 #include "calling.h"
26 #include <asm/asm-offsets.h>
27 #include <asm/msr.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
35 #include <asm/asm.h>
36 #include <asm/smap.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <linux/err.h>
41 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
42 #include <linux/elf-em.h>
43 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
44 #define __AUDIT_ARCH_64BIT 0x80000000
45 #define __AUDIT_ARCH_LE 0x40000000
47 .code64
48 .section .entry.text, "ax"
50 #ifdef CONFIG_PARAVIRT
51 ENTRY(native_usergs_sysret64)
52 swapgs
53 sysretq
54 ENDPROC(native_usergs_sysret64)
55 #endif /* CONFIG_PARAVIRT */
57 .macro TRACE_IRQS_IRETQ
58 #ifdef CONFIG_TRACE_IRQFLAGS
59 bt $9, EFLAGS(%rsp) /* interrupts off? */
60 jnc 1f
61 TRACE_IRQS_ON
62 1:
63 #endif
64 .endm
66 /*
67 * When dynamic function tracer is enabled it will add a breakpoint
68 * to all locations that it is about to modify, sync CPUs, update
69 * all the code, sync CPUs, then remove the breakpoints. In this time
70 * if lockdep is enabled, it might jump back into the debug handler
71 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
72 *
73 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
74 * make sure the stack pointer does not get reset back to the top
75 * of the debug stack, and instead just reuses the current stack.
76 */
77 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
79 .macro TRACE_IRQS_OFF_DEBUG
80 call debug_stack_set_zero
81 TRACE_IRQS_OFF
82 call debug_stack_reset
83 .endm
85 .macro TRACE_IRQS_ON_DEBUG
86 call debug_stack_set_zero
87 TRACE_IRQS_ON
88 call debug_stack_reset
89 .endm
91 .macro TRACE_IRQS_IRETQ_DEBUG
92 bt $9, EFLAGS(%rsp) /* interrupts off? */
93 jnc 1f
94 TRACE_IRQS_ON_DEBUG
95 1:
96 .endm
98 #else
99 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
100 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
101 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
102 #endif
104 /*
105 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
106 *
107 * This is the only entry point used for 64-bit system calls. The
108 * hardware interface is reasonably well designed and the register to
109 * argument mapping Linux uses fits well with the registers that are
110 * available when SYSCALL is used.
111 *
112 * SYSCALL instructions can be found inlined in libc implementations as
113 * well as some other programs and libraries. There are also a handful
114 * of SYSCALL instructions in the vDSO used, for example, as a
115 * clock_gettimeofday fallback.
116 *
117 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
118 * then loads new ss, cs, and rip from previously programmed MSRs.
119 * rflags gets masked by a value from another MSR (so CLD and CLAC
120 * are not needed). SYSCALL does not save anything on the stack
121 * and does not change rsp.
122 *
123 * Registers on entry:
124 * rax system call number
125 * rcx return address
126 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
127 * rdi arg0
128 * rsi arg1
129 * rdx arg2
130 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
131 * r8 arg4
132 * r9 arg5
133 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
134 *
135 * Only called from user space.
136 *
137 * When user can change pt_regs->foo always force IRET. That is because
138 * it deals with uncanonical addresses better. SYSRET has trouble
139 * with them due to bugs in both AMD and Intel CPUs.
140 */
142 ENTRY(entry_SYSCALL_64)
143 /*
144 * Interrupts are off on entry.
145 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
146 * it is too small to ever cause noticeable irq latency.
147 */
148 SWAPGS_UNSAFE_STACK
149 /*
150 * A hypervisor implementation might want to use a label
151 * after the swapgs, so that it can do the swapgs
152 * for the guest and jump here on syscall.
153 */
154 GLOBAL(entry_SYSCALL_64_after_swapgs)
156 movq %rsp, PER_CPU_VAR(rsp_scratch)
157 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
159 TRACE_IRQS_OFF
161 /* Construct struct pt_regs on stack */
162 pushq $__USER_DS /* pt_regs->ss */
163 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
164 pushq %r11 /* pt_regs->flags */
165 pushq $__USER_CS /* pt_regs->cs */
166 pushq %rcx /* pt_regs->ip */
167 pushq %rax /* pt_regs->orig_ax */
168 pushq %rdi /* pt_regs->di */
169 pushq %rsi /* pt_regs->si */
170 pushq %rdx /* pt_regs->dx */
171 pushq %rcx /* pt_regs->cx */
172 pushq $-ENOSYS /* pt_regs->ax */
173 pushq %r8 /* pt_regs->r8 */
174 pushq %r9 /* pt_regs->r9 */
175 pushq %r10 /* pt_regs->r10 */
176 pushq %r11 /* pt_regs->r11 */
177 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
179 /*
180 * If we need to do entry work or if we guess we'll need to do
181 * exit work, go straight to the slow path.
182 */
183 movq PER_CPU_VAR(current_task), %r11
184 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
185 jnz entry_SYSCALL64_slow_path
187 entry_SYSCALL_64_fastpath:
188 /*
189 * Easy case: enable interrupts and issue the syscall. If the syscall
190 * needs pt_regs, we'll call a stub that disables interrupts again
191 * and jumps to the slow path.
192 */
193 TRACE_IRQS_ON
194 ENABLE_INTERRUPTS(CLBR_NONE)
195 #if __SYSCALL_MASK == ~0
196 cmpq $__NR_syscall_max, %rax
197 #else
198 andl $__SYSCALL_MASK, %eax
199 cmpl $__NR_syscall_max, %eax
200 #endif
201 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
202 movq %r10, %rcx
204 /*
205 * This call instruction is handled specially in stub_ptregs_64.
206 * It might end up jumping to the slow path. If it jumps, RAX
207 * and all argument registers are clobbered.
208 */
209 call *sys_call_table(, %rax, 8)
210 .Lentry_SYSCALL_64_after_fastpath_call:
212 movq %rax, RAX(%rsp)
213 1:
215 /*
216 * If we get here, then we know that pt_regs is clean for SYSRET64.
217 * If we see that no exit work is required (which we are required
218 * to check with IRQs off), then we can go straight to SYSRET64.
219 */
220 DISABLE_INTERRUPTS(CLBR_NONE)
221 TRACE_IRQS_OFF
222 movq PER_CPU_VAR(current_task), %r11
223 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
224 jnz 1f
226 LOCKDEP_SYS_EXIT
227 TRACE_IRQS_ON /* user mode is traced as IRQs on */
228 movq RIP(%rsp), %rcx
229 movq EFLAGS(%rsp), %r11
230 RESTORE_C_REGS_EXCEPT_RCX_R11
231 movq RSP(%rsp), %rsp
232 USERGS_SYSRET64
234 1:
235 /*
236 * The fast path looked good when we started, but something changed
237 * along the way and we need to switch to the slow path. Calling
238 * raise(3) will trigger this, for example. IRQs are off.
239 */
240 TRACE_IRQS_ON
241 ENABLE_INTERRUPTS(CLBR_NONE)
242 SAVE_EXTRA_REGS
243 movq %rsp, %rdi
244 call syscall_return_slowpath /* returns with IRQs disabled */
245 jmp return_from_SYSCALL_64
247 entry_SYSCALL64_slow_path:
248 /* IRQs are off. */
249 SAVE_EXTRA_REGS
250 movq %rsp, %rdi
251 call do_syscall_64 /* returns with IRQs disabled */
253 return_from_SYSCALL_64:
254 RESTORE_EXTRA_REGS
255 TRACE_IRQS_IRETQ /* we're about to change IF */
257 /*
258 * Try to use SYSRET instead of IRET if we're returning to
259 * a completely clean 64-bit userspace context.
260 */
261 movq RCX(%rsp), %rcx
262 movq RIP(%rsp), %r11
263 cmpq %rcx, %r11 /* RCX == RIP */
264 jne opportunistic_sysret_failed
266 /*
267 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
268 * in kernel space. This essentially lets the user take over
269 * the kernel, since userspace controls RSP.
270 *
271 * If width of "canonical tail" ever becomes variable, this will need
272 * to be updated to remain correct on both old and new CPUs.
273 */
274 .ifne __VIRTUAL_MASK_SHIFT - 47
275 .error "virtual address width changed -- SYSRET checks need update"
276 .endif
278 /* Change top 16 bits to be the sign-extension of 47th bit */
279 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
280 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
282 /* If this changed %rcx, it was not canonical */
283 cmpq %rcx, %r11
284 jne opportunistic_sysret_failed
286 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
287 jne opportunistic_sysret_failed
289 movq R11(%rsp), %r11
290 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
291 jne opportunistic_sysret_failed
293 /*
294 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
295 * restore RF properly. If the slowpath sets it for whatever reason, we
296 * need to restore it correctly.
297 *
298 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
299 * trap from userspace immediately after SYSRET. This would cause an
300 * infinite loop whenever #DB happens with register state that satisfies
301 * the opportunistic SYSRET conditions. For example, single-stepping
302 * this user code:
303 *
304 * movq $stuck_here, %rcx
305 * pushfq
306 * popq %r11
307 * stuck_here:
308 *
309 * would never get past 'stuck_here'.
310 */
311 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
312 jnz opportunistic_sysret_failed
314 /* nothing to check for RSP */
316 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
317 jne opportunistic_sysret_failed
319 /*
320 * We win! This label is here just for ease of understanding
321 * perf profiles. Nothing jumps here.
322 */
323 syscall_return_via_sysret:
324 /* rcx and r11 are already restored (see code above) */
325 RESTORE_C_REGS_EXCEPT_RCX_R11
326 movq RSP(%rsp), %rsp
327 USERGS_SYSRET64
329 opportunistic_sysret_failed:
330 SWAPGS
331 jmp restore_c_regs_and_iret
332 END(entry_SYSCALL_64)
334 ENTRY(stub_ptregs_64)
335 /*
336 * Syscalls marked as needing ptregs land here.
337 * If we are on the fast path, we need to save the extra regs,
338 * which we achieve by trying again on the slow path. If we are on
339 * the slow path, the extra regs are already saved.
340 *
341 * RAX stores a pointer to the C function implementing the syscall.
342 * IRQs are on.
343 */
344 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
345 jne 1f
347 /*
348 * Called from fast path -- disable IRQs again, pop return address
349 * and jump to slow path
350 */
351 DISABLE_INTERRUPTS(CLBR_NONE)
352 TRACE_IRQS_OFF
353 popq %rax
354 jmp entry_SYSCALL64_slow_path
356 1:
357 jmp *%rax /* Called from C */
358 END(stub_ptregs_64)
360 .macro ptregs_stub func
361 ENTRY(ptregs_\func)
362 leaq \func(%rip), %rax
363 jmp stub_ptregs_64
364 END(ptregs_\func)
365 .endm
367 /* Instantiate ptregs_stub for each ptregs-using syscall */
368 #define __SYSCALL_64_QUAL_(sym)
369 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
370 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
371 #include <asm/syscalls_64.h>
373 /*
374 * %rdi: prev task
375 * %rsi: next task
376 */
377 ENTRY(__switch_to_asm)
378 /*
379 * Save callee-saved registers
380 * This must match the order in inactive_task_frame
381 */
382 pushq %rbp
383 pushq %rbx
384 pushq %r12
385 pushq %r13
386 pushq %r14
387 pushq %r15
389 /* switch stack */
390 movq %rsp, TASK_threadsp(%rdi)
391 movq TASK_threadsp(%rsi), %rsp
393 #ifdef CONFIG_CC_STACKPROTECTOR
394 movq TASK_stack_canary(%rsi), %rbx
395 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
396 #endif
398 /* restore callee-saved registers */
399 popq %r15
400 popq %r14
401 popq %r13
402 popq %r12
403 popq %rbx
404 popq %rbp
406 jmp __switch_to
407 END(__switch_to_asm)
409 /*
410 * A newly forked process directly context switches into this address.
411 *
412 * rax: prev task we switched from
413 * rbx: kernel thread func (NULL for user thread)
414 * r12: kernel thread arg
415 */
416 ENTRY(ret_from_fork)
417 movq %rax, %rdi
418 call schedule_tail /* rdi: 'prev' task parameter */
420 testq %rbx, %rbx /* from kernel_thread? */
421 jnz 1f /* kernel threads are uncommon */
423 2:
424 movq %rsp, %rdi
425 call syscall_return_slowpath /* returns with IRQs disabled */
426 TRACE_IRQS_ON /* user mode is traced as IRQS on */
427 SWAPGS
428 jmp restore_regs_and_iret
430 1:
431 /* kernel thread */
432 movq %r12, %rdi
433 call *%rbx
434 /*
435 * A kernel thread is allowed to return here after successfully
436 * calling do_execve(). Exit to userspace to complete the execve()
437 * syscall.
438 */
439 movq $0, RAX(%rsp)
440 jmp 2b
441 END(ret_from_fork)
443 /*
444 * Build the entry stubs with some assembler magic.
445 * We pack 1 stub into every 8-byte block.
446 */
447 .align 8
448 ENTRY(irq_entries_start)
449 vector=FIRST_EXTERNAL_VECTOR
450 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
451 pushq $(~vector+0x80) /* Note: always in signed byte range */
452 vector=vector+1
453 jmp common_interrupt
454 .align 8
455 .endr
456 END(irq_entries_start)
458 /*
459 * Interrupt entry/exit.
460 *
461 * Interrupt entry points save only callee clobbered registers in fast path.
462 *
463 * Entry runs with interrupts off.
464 */
466 /* 0(%rsp): ~(interrupt number) */
467 .macro interrupt func
468 cld
469 ALLOC_PT_GPREGS_ON_STACK
470 SAVE_C_REGS
471 SAVE_EXTRA_REGS
473 testb $3, CS(%rsp)
474 jz 1f
476 /*
477 * IRQ from user mode. Switch to kernel gsbase and inform context
478 * tracking that we're in kernel mode.
479 */
480 SWAPGS
482 /*
483 * We need to tell lockdep that IRQs are off. We can't do this until
484 * we fix gsbase, and we should do it before enter_from_user_mode
485 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
486 * the simplest way to handle it is to just call it twice if
487 * we enter from user mode. There's no reason to optimize this since
488 * TRACE_IRQS_OFF is a no-op if lockdep is off.
489 */
490 TRACE_IRQS_OFF
492 CALL_enter_from_user_mode
494 1:
495 /*
496 * Save previous stack pointer, optionally switch to interrupt stack.
497 * irq_count is used to check if a CPU is already on an interrupt stack
498 * or not. While this is essentially redundant with preempt_count it is
499 * a little cheaper to use a separate counter in the PDA (short of
500 * moving irq_enter into assembly, which would be too much work)
501 */
502 movq %rsp, %rdi
503 incl PER_CPU_VAR(irq_count)
504 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
505 pushq %rdi
506 /* We entered an interrupt context - irqs are off: */
507 TRACE_IRQS_OFF
509 call \func /* rdi points to pt_regs */
510 .endm
512 /*
513 * The interrupt stubs push (~vector+0x80) onto the stack and
514 * then jump to common_interrupt.
515 */
516 .p2align CONFIG_X86_L1_CACHE_SHIFT
517 common_interrupt:
518 ASM_CLAC
519 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
520 interrupt do_IRQ
521 /* 0(%rsp): old RSP */
522 ret_from_intr:
523 DISABLE_INTERRUPTS(CLBR_NONE)
524 TRACE_IRQS_OFF
525 decl PER_CPU_VAR(irq_count)
527 /* Restore saved previous stack */
528 popq %rsp
530 testb $3, CS(%rsp)
531 jz retint_kernel
533 /* Interrupt came from user space */
534 GLOBAL(retint_user)
535 mov %rsp,%rdi
536 call prepare_exit_to_usermode
537 TRACE_IRQS_IRETQ
538 SWAPGS
539 jmp restore_regs_and_iret
541 /* Returning to kernel space */
542 retint_kernel:
543 #ifdef CONFIG_PREEMPT
544 /* Interrupts are off */
545 /* Check if we need preemption */
546 bt $9, EFLAGS(%rsp) /* were interrupts off? */
547 jnc 1f
548 0: cmpl $0, PER_CPU_VAR(__preempt_count)
549 jnz 1f
550 call preempt_schedule_irq
551 jmp 0b
552 1:
553 #endif
554 /*
555 * The iretq could re-enable interrupts:
556 */
557 TRACE_IRQS_IRETQ
559 /*
560 * At this label, code paths which return to kernel and to user,
561 * which come from interrupts/exception and from syscalls, merge.
562 */
563 GLOBAL(restore_regs_and_iret)
564 RESTORE_EXTRA_REGS
565 restore_c_regs_and_iret:
566 RESTORE_C_REGS
567 REMOVE_PT_GPREGS_FROM_STACK 8
568 INTERRUPT_RETURN
570 ENTRY(native_iret)
571 /*
572 * Are we returning to a stack segment from the LDT? Note: in
573 * 64-bit mode SS:RSP on the exception stack is always valid.
574 */
575 #ifdef CONFIG_X86_ESPFIX64
576 testb $4, (SS-RIP)(%rsp)
577 jnz native_irq_return_ldt
578 #endif
580 .global native_irq_return_iret
581 native_irq_return_iret:
582 /*
583 * This may fault. Non-paranoid faults on return to userspace are
584 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
585 * Double-faults due to espfix64 are handled in do_double_fault.
586 * Other faults here are fatal.
587 */
588 iretq
590 #ifdef CONFIG_X86_ESPFIX64
591 native_irq_return_ldt:
592 /*
593 * We are running with user GSBASE. All GPRs contain their user
594 * values. We have a percpu ESPFIX stack that is eight slots
595 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
596 * of the ESPFIX stack.
597 *
598 * We clobber RAX and RDI in this code. We stash RDI on the
599 * normal stack and RAX on the ESPFIX stack.
600 *
601 * The ESPFIX stack layout we set up looks like this:
602 *
603 * --- top of ESPFIX stack ---
604 * SS
605 * RSP
606 * RFLAGS
607 * CS
608 * RIP <-- RSP points here when we're done
609 * RAX <-- espfix_waddr points here
610 * --- bottom of ESPFIX stack ---
611 */
613 pushq %rdi /* Stash user RDI */
614 SWAPGS
615 movq PER_CPU_VAR(espfix_waddr), %rdi
616 movq %rax, (0*8)(%rdi) /* user RAX */
617 movq (1*8)(%rsp), %rax /* user RIP */
618 movq %rax, (1*8)(%rdi)
619 movq (2*8)(%rsp), %rax /* user CS */
620 movq %rax, (2*8)(%rdi)
621 movq (3*8)(%rsp), %rax /* user RFLAGS */
622 movq %rax, (3*8)(%rdi)
623 movq (5*8)(%rsp), %rax /* user SS */
624 movq %rax, (5*8)(%rdi)
625 movq (4*8)(%rsp), %rax /* user RSP */
626 movq %rax, (4*8)(%rdi)
627 /* Now RAX == RSP. */
629 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
630 popq %rdi /* Restore user RDI */
632 /*
633 * espfix_stack[31:16] == 0. The page tables are set up such that
634 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
635 * espfix_waddr for any X. That is, there are 65536 RO aliases of
636 * the same page. Set up RSP so that RSP[31:16] contains the
637 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
638 * still points to an RO alias of the ESPFIX stack.
639 */
640 orq PER_CPU_VAR(espfix_stack), %rax
641 SWAPGS
642 movq %rax, %rsp
644 /*
645 * At this point, we cannot write to the stack any more, but we can
646 * still read.
647 */
648 popq %rax /* Restore user RAX */
650 /*
651 * RSP now points to an ordinary IRET frame, except that the page
652 * is read-only and RSP[31:16] are preloaded with the userspace
653 * values. We can now IRET back to userspace.
654 */
655 jmp native_irq_return_iret
656 #endif
657 END(common_interrupt)
659 /*
660 * APIC interrupts.
661 */
662 .macro apicinterrupt3 num sym do_sym
663 ENTRY(\sym)
664 ASM_CLAC
665 pushq $~(\num)
666 .Lcommon_\sym:
667 interrupt \do_sym
668 jmp ret_from_intr
669 END(\sym)
670 .endm
672 #ifdef CONFIG_TRACING
673 #define trace(sym) trace_##sym
674 #define smp_trace(sym) smp_trace_##sym
676 .macro trace_apicinterrupt num sym
677 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
678 .endm
679 #else
680 .macro trace_apicinterrupt num sym do_sym
681 .endm
682 #endif
684 /* Make sure APIC interrupt handlers end up in the irqentry section: */
685 #if defined(CONFIG_FUNCTION_GRAPH_TRACER) || defined(CONFIG_KASAN)
686 # define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
687 # define POP_SECTION_IRQENTRY .popsection
688 #else
689 # define PUSH_SECTION_IRQENTRY
690 # define POP_SECTION_IRQENTRY
691 #endif
693 .macro apicinterrupt num sym do_sym
694 PUSH_SECTION_IRQENTRY
695 apicinterrupt3 \num \sym \do_sym
696 trace_apicinterrupt \num \sym
697 POP_SECTION_IRQENTRY
698 .endm
700 #ifdef CONFIG_SMP
701 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
702 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
703 #endif
705 #ifdef CONFIG_X86_UV
706 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
707 #endif
709 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
710 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
712 #ifdef CONFIG_HAVE_KVM
713 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
714 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
715 #endif
717 #ifdef CONFIG_X86_MCE_THRESHOLD
718 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
719 #endif
721 #ifdef CONFIG_X86_MCE_AMD
722 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
723 #endif
725 #ifdef CONFIG_X86_THERMAL_VECTOR
726 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
727 #endif
729 #ifdef CONFIG_SMP
730 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
731 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
732 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
733 #endif
735 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
736 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
738 #ifdef CONFIG_IRQ_WORK
739 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
740 #endif
742 /*
743 * Exception entry points.
744 */
745 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
747 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
748 ENTRY(\sym)
749 /* Sanity check */
750 .if \shift_ist != -1 && \paranoid == 0
751 .error "using shift_ist requires paranoid=1"
752 .endif
754 ASM_CLAC
755 PARAVIRT_ADJUST_EXCEPTION_FRAME
757 .ifeq \has_error_code
758 pushq $-1 /* ORIG_RAX: no syscall to restart */
759 .endif
761 ALLOC_PT_GPREGS_ON_STACK
763 .if \paranoid
764 .if \paranoid == 1
765 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
766 jnz 1f
767 .endif
768 call paranoid_entry
769 .else
770 call error_entry
771 .endif
772 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
774 .if \paranoid
775 .if \shift_ist != -1
776 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
777 .else
778 TRACE_IRQS_OFF
779 .endif
780 .endif
782 movq %rsp, %rdi /* pt_regs pointer */
784 .if \has_error_code
785 movq ORIG_RAX(%rsp), %rsi /* get error code */
786 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
787 .else
788 xorl %esi, %esi /* no error code */
789 .endif
791 .if \shift_ist != -1
792 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
793 .endif
795 call \do_sym
797 .if \shift_ist != -1
798 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
799 .endif
801 /* these procedures expect "no swapgs" flag in ebx */
802 .if \paranoid
803 jmp paranoid_exit
804 .else
805 jmp error_exit
806 .endif
808 .if \paranoid == 1
809 /*
810 * Paranoid entry from userspace. Switch stacks and treat it
811 * as a normal entry. This means that paranoid handlers
812 * run in real process context if user_mode(regs).
813 */
814 1:
815 call error_entry
818 movq %rsp, %rdi /* pt_regs pointer */
819 call sync_regs
820 movq %rax, %rsp /* switch stack */
822 movq %rsp, %rdi /* pt_regs pointer */
824 .if \has_error_code
825 movq ORIG_RAX(%rsp), %rsi /* get error code */
826 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
827 .else
828 xorl %esi, %esi /* no error code */
829 .endif
831 call \do_sym
833 jmp error_exit /* %ebx: no swapgs flag */
834 .endif
835 END(\sym)
836 .endm
838 #ifdef CONFIG_TRACING
839 .macro trace_idtentry sym do_sym has_error_code:req
840 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
841 idtentry \sym \do_sym has_error_code=\has_error_code
842 .endm
843 #else
844 .macro trace_idtentry sym do_sym has_error_code:req
845 idtentry \sym \do_sym has_error_code=\has_error_code
846 .endm
847 #endif
849 idtentry divide_error do_divide_error has_error_code=0
850 idtentry overflow do_overflow has_error_code=0
851 idtentry bounds do_bounds has_error_code=0
852 idtentry invalid_op do_invalid_op has_error_code=0
853 idtentry device_not_available do_device_not_available has_error_code=0
854 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
855 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
856 idtentry invalid_TSS do_invalid_TSS has_error_code=1
857 idtentry segment_not_present do_segment_not_present has_error_code=1
858 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
859 idtentry coprocessor_error do_coprocessor_error has_error_code=0
860 idtentry alignment_check do_alignment_check has_error_code=1
861 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
864 /*
865 * Reload gs selector with exception handling
866 * edi: new selector
867 */
868 ENTRY(native_load_gs_index)
869 pushfq
870 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
871 SWAPGS
872 .Lgs_change:
873 movl %edi, %gs
874 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
875 SWAPGS
876 popfq
877 ret
878 END(native_load_gs_index)
879 EXPORT_SYMBOL(native_load_gs_index)
881 _ASM_EXTABLE(.Lgs_change, bad_gs)
882 .section .fixup, "ax"
883 /* running with kernelgs */
884 bad_gs:
885 SWAPGS /* switch back to user gs */
886 .macro ZAP_GS
887 /* This can't be a string because the preprocessor needs to see it. */
888 movl $__USER_DS, %eax
889 movl %eax, %gs
890 .endm
891 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
892 xorl %eax, %eax
893 movl %eax, %gs
894 jmp 2b
895 .previous
897 /* Call softirq on interrupt stack. Interrupts are off. */
898 ENTRY(do_softirq_own_stack)
899 pushq %rbp
900 mov %rsp, %rbp
901 incl PER_CPU_VAR(irq_count)
902 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
903 push %rbp /* frame pointer backlink */
904 call __do_softirq
905 leaveq
906 decl PER_CPU_VAR(irq_count)
907 ret
908 END(do_softirq_own_stack)
910 #ifdef CONFIG_XEN
911 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
913 /*
914 * A note on the "critical region" in our callback handler.
915 * We want to avoid stacking callback handlers due to events occurring
916 * during handling of the last event. To do this, we keep events disabled
917 * until we've done all processing. HOWEVER, we must enable events before
918 * popping the stack frame (can't be done atomically) and so it would still
919 * be possible to get enough handler activations to overflow the stack.
920 * Although unlikely, bugs of that kind are hard to track down, so we'd
921 * like to avoid the possibility.
922 * So, on entry to the handler we detect whether we interrupted an
923 * existing activation in its critical region -- if so, we pop the current
924 * activation and restart the handler using the previous one.
925 */
926 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
928 /*
929 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
930 * see the correct pointer to the pt_regs
931 */
932 movq %rdi, %rsp /* we don't return, adjust the stack frame */
933 11: incl PER_CPU_VAR(irq_count)
934 movq %rsp, %rbp
935 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
936 pushq %rbp /* frame pointer backlink */
937 call xen_evtchn_do_upcall
938 popq %rsp
939 decl PER_CPU_VAR(irq_count)
940 #ifndef CONFIG_PREEMPT
941 call xen_maybe_preempt_hcall
942 #endif
943 jmp error_exit
944 END(xen_do_hypervisor_callback)
946 /*
947 * Hypervisor uses this for application faults while it executes.
948 * We get here for two reasons:
949 * 1. Fault while reloading DS, ES, FS or GS
950 * 2. Fault while executing IRET
951 * Category 1 we do not need to fix up as Xen has already reloaded all segment
952 * registers that could be reloaded and zeroed the others.
953 * Category 2 we fix up by killing the current process. We cannot use the
954 * normal Linux return path in this case because if we use the IRET hypercall
955 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
956 * We distinguish between categories by comparing each saved segment register
957 * with its current contents: any discrepancy means we in category 1.
958 */
959 ENTRY(xen_failsafe_callback)
960 movl %ds, %ecx
961 cmpw %cx, 0x10(%rsp)
962 jne 1f
963 movl %es, %ecx
964 cmpw %cx, 0x18(%rsp)
965 jne 1f
966 movl %fs, %ecx
967 cmpw %cx, 0x20(%rsp)
968 jne 1f
969 movl %gs, %ecx
970 cmpw %cx, 0x28(%rsp)
971 jne 1f
972 /* All segments match their saved values => Category 2 (Bad IRET). */
973 movq (%rsp), %rcx
974 movq 8(%rsp), %r11
975 addq $0x30, %rsp
976 pushq $0 /* RIP */
977 pushq %r11
978 pushq %rcx
979 jmp general_protection
980 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
981 movq (%rsp), %rcx
982 movq 8(%rsp), %r11
983 addq $0x30, %rsp
984 pushq $-1 /* orig_ax = -1 => not a system call */
985 ALLOC_PT_GPREGS_ON_STACK
986 SAVE_C_REGS
987 SAVE_EXTRA_REGS
988 jmp error_exit
989 END(xen_failsafe_callback)
991 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
992 xen_hvm_callback_vector xen_evtchn_do_upcall
994 #endif /* CONFIG_XEN */
996 #if IS_ENABLED(CONFIG_HYPERV)
997 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
998 hyperv_callback_vector hyperv_vector_handler
999 #endif /* CONFIG_HYPERV */
1001 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1002 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1003 idtentry stack_segment do_stack_segment has_error_code=1
1005 #ifdef CONFIG_XEN
1006 idtentry xen_debug do_debug has_error_code=0
1007 idtentry xen_int3 do_int3 has_error_code=0
1008 idtentry xen_stack_segment do_stack_segment has_error_code=1
1009 #endif
1011 idtentry general_protection do_general_protection has_error_code=1
1012 trace_idtentry page_fault do_page_fault has_error_code=1
1014 #ifdef CONFIG_KVM_GUEST
1015 idtentry async_page_fault do_async_page_fault has_error_code=1
1016 #endif
1018 #ifdef CONFIG_X86_MCE
1019 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1020 #endif
1022 /*
1023 * Save all registers in pt_regs, and switch gs if needed.
1024 * Use slow, but surefire "are we in kernel?" check.
1025 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1026 */
1027 ENTRY(paranoid_entry)
1028 cld
1029 SAVE_C_REGS 8
1030 SAVE_EXTRA_REGS 8
1031 movl $1, %ebx
1032 movl $MSR_GS_BASE, %ecx
1033 rdmsr
1034 testl %edx, %edx
1035 js 1f /* negative -> in kernel */
1036 SWAPGS
1037 xorl %ebx, %ebx
1038 1: ret
1039 END(paranoid_entry)
1041 /*
1042 * "Paranoid" exit path from exception stack. This is invoked
1043 * only on return from non-NMI IST interrupts that came
1044 * from kernel space.
1045 *
1046 * We may be returning to very strange contexts (e.g. very early
1047 * in syscall entry), so checking for preemption here would
1048 * be complicated. Fortunately, we there's no good reason
1049 * to try to handle preemption here.
1050 *
1051 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1052 */
1053 ENTRY(paranoid_exit)
1054 DISABLE_INTERRUPTS(CLBR_NONE)
1055 TRACE_IRQS_OFF_DEBUG
1056 testl %ebx, %ebx /* swapgs needed? */
1057 jnz paranoid_exit_no_swapgs
1058 TRACE_IRQS_IRETQ
1059 SWAPGS_UNSAFE_STACK
1060 jmp paranoid_exit_restore
1061 paranoid_exit_no_swapgs:
1062 TRACE_IRQS_IRETQ_DEBUG
1063 paranoid_exit_restore:
1064 RESTORE_EXTRA_REGS
1065 RESTORE_C_REGS
1066 REMOVE_PT_GPREGS_FROM_STACK 8
1067 INTERRUPT_RETURN
1068 END(paranoid_exit)
1070 /*
1071 * Save all registers in pt_regs, and switch gs if needed.
1072 * Return: EBX=0: came from user mode; EBX=1: otherwise
1073 */
1074 ENTRY(error_entry)
1075 cld
1076 SAVE_C_REGS 8
1077 SAVE_EXTRA_REGS 8
1078 xorl %ebx, %ebx
1079 testb $3, CS+8(%rsp)
1080 jz .Lerror_kernelspace
1082 /*
1083 * We entered from user mode or we're pretending to have entered
1084 * from user mode due to an IRET fault.
1085 */
1086 SWAPGS
1088 .Lerror_entry_from_usermode_after_swapgs:
1089 /*
1090 * We need to tell lockdep that IRQs are off. We can't do this until
1091 * we fix gsbase, and we should do it before enter_from_user_mode
1092 * (which can take locks).
1093 */
1094 TRACE_IRQS_OFF
1095 CALL_enter_from_user_mode
1096 ret
1098 .Lerror_entry_done:
1099 TRACE_IRQS_OFF
1100 ret
1102 /*
1103 * There are two places in the kernel that can potentially fault with
1104 * usergs. Handle them here. B stepping K8s sometimes report a
1105 * truncated RIP for IRET exceptions returning to compat mode. Check
1106 * for these here too.
1107 */
1108 .Lerror_kernelspace:
1109 incl %ebx
1110 leaq native_irq_return_iret(%rip), %rcx
1111 cmpq %rcx, RIP+8(%rsp)
1112 je .Lerror_bad_iret
1113 movl %ecx, %eax /* zero extend */
1114 cmpq %rax, RIP+8(%rsp)
1115 je .Lbstep_iret
1116 cmpq $.Lgs_change, RIP+8(%rsp)
1117 jne .Lerror_entry_done
1119 /*
1120 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1121 * gsbase and proceed. We'll fix up the exception and land in
1122 * .Lgs_change's error handler with kernel gsbase.
1123 */
1124 SWAPGS
1125 jmp .Lerror_entry_done
1127 .Lbstep_iret:
1128 /* Fix truncated RIP */
1129 movq %rcx, RIP+8(%rsp)
1130 /* fall through */
1132 .Lerror_bad_iret:
1133 /*
1134 * We came from an IRET to user mode, so we have user gsbase.
1135 * Switch to kernel gsbase:
1136 */
1137 SWAPGS
1139 /*
1140 * Pretend that the exception came from user mode: set up pt_regs
1141 * as if we faulted immediately after IRET and clear EBX so that
1142 * error_exit knows that we will be returning to user mode.
1143 */
1144 mov %rsp, %rdi
1145 call fixup_bad_iret
1146 mov %rax, %rsp
1147 decl %ebx
1148 jmp .Lerror_entry_from_usermode_after_swapgs
1149 END(error_entry)
1152 /*
1153 * On entry, EBX is a "return to kernel mode" flag:
1154 * 1: already in kernel mode, don't need SWAPGS
1155 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1156 */
1157 ENTRY(error_exit)
1158 movl %ebx, %eax
1159 DISABLE_INTERRUPTS(CLBR_NONE)
1160 TRACE_IRQS_OFF
1161 testl %eax, %eax
1162 jnz retint_kernel
1163 jmp retint_user
1164 END(error_exit)
1166 /* Runs on exception stack */
1167 ENTRY(nmi)
1168 /*
1169 * Fix up the exception frame if we're on Xen.
1170 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1171 * one value to the stack on native, so it may clobber the rdx
1172 * scratch slot, but it won't clobber any of the important
1173 * slots past it.
1174 *
1175 * Xen is a different story, because the Xen frame itself overlaps
1176 * the "NMI executing" variable.
1177 */
1178 PARAVIRT_ADJUST_EXCEPTION_FRAME
1180 /*
1181 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1182 * the iretq it performs will take us out of NMI context.
1183 * This means that we can have nested NMIs where the next
1184 * NMI is using the top of the stack of the previous NMI. We
1185 * can't let it execute because the nested NMI will corrupt the
1186 * stack of the previous NMI. NMI handlers are not re-entrant
1187 * anyway.
1188 *
1189 * To handle this case we do the following:
1190 * Check the a special location on the stack that contains
1191 * a variable that is set when NMIs are executing.
1192 * The interrupted task's stack is also checked to see if it
1193 * is an NMI stack.
1194 * If the variable is not set and the stack is not the NMI
1195 * stack then:
1196 * o Set the special variable on the stack
1197 * o Copy the interrupt frame into an "outermost" location on the
1198 * stack
1199 * o Copy the interrupt frame into an "iret" location on the stack
1200 * o Continue processing the NMI
1201 * If the variable is set or the previous stack is the NMI stack:
1202 * o Modify the "iret" location to jump to the repeat_nmi
1203 * o return back to the first NMI
1204 *
1205 * Now on exit of the first NMI, we first clear the stack variable
1206 * The NMI stack will tell any nested NMIs at that point that it is
1207 * nested. Then we pop the stack normally with iret, and if there was
1208 * a nested NMI that updated the copy interrupt stack frame, a
1209 * jump will be made to the repeat_nmi code that will handle the second
1210 * NMI.
1211 *
1212 * However, espfix prevents us from directly returning to userspace
1213 * with a single IRET instruction. Similarly, IRET to user mode
1214 * can fault. We therefore handle NMIs from user space like
1215 * other IST entries.
1216 */
1218 /* Use %rdx as our temp variable throughout */
1219 pushq %rdx
1221 testb $3, CS-RIP+8(%rsp)
1222 jz .Lnmi_from_kernel
1224 /*
1225 * NMI from user mode. We need to run on the thread stack, but we
1226 * can't go through the normal entry paths: NMIs are masked, and
1227 * we don't want to enable interrupts, because then we'll end
1228 * up in an awkward situation in which IRQs are on but NMIs
1229 * are off.
1230 *
1231 * We also must not push anything to the stack before switching
1232 * stacks lest we corrupt the "NMI executing" variable.
1233 */
1235 SWAPGS_UNSAFE_STACK
1236 cld
1237 movq %rsp, %rdx
1238 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1239 pushq 5*8(%rdx) /* pt_regs->ss */
1240 pushq 4*8(%rdx) /* pt_regs->rsp */
1241 pushq 3*8(%rdx) /* pt_regs->flags */
1242 pushq 2*8(%rdx) /* pt_regs->cs */
1243 pushq 1*8(%rdx) /* pt_regs->rip */
1244 pushq $-1 /* pt_regs->orig_ax */
1245 pushq %rdi /* pt_regs->di */
1246 pushq %rsi /* pt_regs->si */
1247 pushq (%rdx) /* pt_regs->dx */
1248 pushq %rcx /* pt_regs->cx */
1249 pushq %rax /* pt_regs->ax */
1250 pushq %r8 /* pt_regs->r8 */
1251 pushq %r9 /* pt_regs->r9 */
1252 pushq %r10 /* pt_regs->r10 */
1253 pushq %r11 /* pt_regs->r11 */
1254 pushq %rbx /* pt_regs->rbx */
1255 pushq %rbp /* pt_regs->rbp */
1256 pushq %r12 /* pt_regs->r12 */
1257 pushq %r13 /* pt_regs->r13 */
1258 pushq %r14 /* pt_regs->r14 */
1259 pushq %r15 /* pt_regs->r15 */
1261 /*
1262 * At this point we no longer need to worry about stack damage
1263 * due to nesting -- we're on the normal thread stack and we're
1264 * done with the NMI stack.
1265 */
1267 movq %rsp, %rdi
1268 movq $-1, %rsi
1269 call do_nmi
1271 /*
1272 * Return back to user mode. We must *not* do the normal exit
1273 * work, because we don't want to enable interrupts. Fortunately,
1274 * do_nmi doesn't modify pt_regs.
1275 */
1276 SWAPGS
1277 jmp restore_c_regs_and_iret
1279 .Lnmi_from_kernel:
1280 /*
1281 * Here's what our stack frame will look like:
1282 * +---------------------------------------------------------+
1283 * | original SS |
1284 * | original Return RSP |
1285 * | original RFLAGS |
1286 * | original CS |
1287 * | original RIP |
1288 * +---------------------------------------------------------+
1289 * | temp storage for rdx |
1290 * +---------------------------------------------------------+
1291 * | "NMI executing" variable |
1292 * +---------------------------------------------------------+
1293 * | iret SS } Copied from "outermost" frame |
1294 * | iret Return RSP } on each loop iteration; overwritten |
1295 * | iret RFLAGS } by a nested NMI to force another |
1296 * | iret CS } iteration if needed. |
1297 * | iret RIP } |
1298 * +---------------------------------------------------------+
1299 * | outermost SS } initialized in first_nmi; |
1300 * | outermost Return RSP } will not be changed before |
1301 * | outermost RFLAGS } NMI processing is done. |
1302 * | outermost CS } Copied to "iret" frame on each |
1303 * | outermost RIP } iteration. |
1304 * +---------------------------------------------------------+
1305 * | pt_regs |
1306 * +---------------------------------------------------------+
1307 *
1308 * The "original" frame is used by hardware. Before re-enabling
1309 * NMIs, we need to be done with it, and we need to leave enough
1310 * space for the asm code here.
1311 *
1312 * We return by executing IRET while RSP points to the "iret" frame.
1313 * That will either return for real or it will loop back into NMI
1314 * processing.
1315 *
1316 * The "outermost" frame is copied to the "iret" frame on each
1317 * iteration of the loop, so each iteration starts with the "iret"
1318 * frame pointing to the final return target.
1319 */
1321 /*
1322 * Determine whether we're a nested NMI.
1323 *
1324 * If we interrupted kernel code between repeat_nmi and
1325 * end_repeat_nmi, then we are a nested NMI. We must not
1326 * modify the "iret" frame because it's being written by
1327 * the outer NMI. That's okay; the outer NMI handler is
1328 * about to about to call do_nmi anyway, so we can just
1329 * resume the outer NMI.
1330 */
1332 movq $repeat_nmi, %rdx
1333 cmpq 8(%rsp), %rdx
1334 ja 1f
1335 movq $end_repeat_nmi, %rdx
1336 cmpq 8(%rsp), %rdx
1337 ja nested_nmi_out
1338 1:
1340 /*
1341 * Now check "NMI executing". If it's set, then we're nested.
1342 * This will not detect if we interrupted an outer NMI just
1343 * before IRET.
1344 */
1345 cmpl $1, -8(%rsp)
1346 je nested_nmi
1348 /*
1349 * Now test if the previous stack was an NMI stack. This covers
1350 * the case where we interrupt an outer NMI after it clears
1351 * "NMI executing" but before IRET. We need to be careful, though:
1352 * there is one case in which RSP could point to the NMI stack
1353 * despite there being no NMI active: naughty userspace controls
1354 * RSP at the very beginning of the SYSCALL targets. We can
1355 * pull a fast one on naughty userspace, though: we program
1356 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1357 * if it controls the kernel's RSP. We set DF before we clear
1358 * "NMI executing".
1359 */
1360 lea 6*8(%rsp), %rdx
1361 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1362 cmpq %rdx, 4*8(%rsp)
1363 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1364 ja first_nmi
1366 subq $EXCEPTION_STKSZ, %rdx
1367 cmpq %rdx, 4*8(%rsp)
1368 /* If it is below the NMI stack, it is a normal NMI */
1369 jb first_nmi
1371 /* Ah, it is within the NMI stack. */
1373 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1374 jz first_nmi /* RSP was user controlled. */
1376 /* This is a nested NMI. */
1378 nested_nmi:
1379 /*
1380 * Modify the "iret" frame to point to repeat_nmi, forcing another
1381 * iteration of NMI handling.
1382 */
1383 subq $8, %rsp
1384 leaq -10*8(%rsp), %rdx
1385 pushq $__KERNEL_DS
1386 pushq %rdx
1387 pushfq
1388 pushq $__KERNEL_CS
1389 pushq $repeat_nmi
1391 /* Put stack back */
1392 addq $(6*8), %rsp
1394 nested_nmi_out:
1395 popq %rdx
1397 /* We are returning to kernel mode, so this cannot result in a fault. */
1398 INTERRUPT_RETURN
1400 first_nmi:
1401 /* Restore rdx. */
1402 movq (%rsp), %rdx
1404 /* Make room for "NMI executing". */
1405 pushq $0
1407 /* Leave room for the "iret" frame */
1408 subq $(5*8), %rsp
1410 /* Copy the "original" frame to the "outermost" frame */
1411 .rept 5
1412 pushq 11*8(%rsp)
1413 .endr
1415 /* Everything up to here is safe from nested NMIs */
1417 #ifdef CONFIG_DEBUG_ENTRY
1418 /*
1419 * For ease of testing, unmask NMIs right away. Disabled by
1420 * default because IRET is very expensive.
1421 */
1422 pushq $0 /* SS */
1423 pushq %rsp /* RSP (minus 8 because of the previous push) */
1424 addq $8, (%rsp) /* Fix up RSP */
1425 pushfq /* RFLAGS */
1426 pushq $__KERNEL_CS /* CS */
1427 pushq $1f /* RIP */
1428 INTERRUPT_RETURN /* continues at repeat_nmi below */
1429 1:
1430 #endif
1432 repeat_nmi:
1433 /*
1434 * If there was a nested NMI, the first NMI's iret will return
1435 * here. But NMIs are still enabled and we can take another
1436 * nested NMI. The nested NMI checks the interrupted RIP to see
1437 * if it is between repeat_nmi and end_repeat_nmi, and if so
1438 * it will just return, as we are about to repeat an NMI anyway.
1439 * This makes it safe to copy to the stack frame that a nested
1440 * NMI will update.
1441 *
1442 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1443 * we're repeating an NMI, gsbase has the same value that it had on
1444 * the first iteration. paranoid_entry will load the kernel
1445 * gsbase if needed before we call do_nmi. "NMI executing"
1446 * is zero.
1447 */
1448 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1450 /*
1451 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1452 * here must not modify the "iret" frame while we're writing to
1453 * it or it will end up containing garbage.
1454 */
1455 addq $(10*8), %rsp
1456 .rept 5
1457 pushq -6*8(%rsp)
1458 .endr
1459 subq $(5*8), %rsp
1460 end_repeat_nmi:
1462 /*
1463 * Everything below this point can be preempted by a nested NMI.
1464 * If this happens, then the inner NMI will change the "iret"
1465 * frame to point back to repeat_nmi.
1466 */
1467 pushq $-1 /* ORIG_RAX: no syscall to restart */
1468 ALLOC_PT_GPREGS_ON_STACK
1470 /*
1471 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1472 * as we should not be calling schedule in NMI context.
1473 * Even with normal interrupts enabled. An NMI should not be
1474 * setting NEED_RESCHED or anything that normal interrupts and
1475 * exceptions might do.
1476 */
1477 call paranoid_entry
1479 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1480 movq %rsp, %rdi
1481 movq $-1, %rsi
1482 call do_nmi
1484 testl %ebx, %ebx /* swapgs needed? */
1485 jnz nmi_restore
1486 nmi_swapgs:
1487 SWAPGS_UNSAFE_STACK
1488 nmi_restore:
1489 RESTORE_EXTRA_REGS
1490 RESTORE_C_REGS
1492 /* Point RSP at the "iret" frame. */
1493 REMOVE_PT_GPREGS_FROM_STACK 6*8
1495 /*
1496 * Clear "NMI executing". Set DF first so that we can easily
1497 * distinguish the remaining code between here and IRET from
1498 * the SYSCALL entry and exit paths. On a native kernel, we
1499 * could just inspect RIP, but, on paravirt kernels,
1500 * INTERRUPT_RETURN can translate into a jump into a
1501 * hypercall page.
1502 */
1503 std
1504 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1506 /*
1507 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1508 * stack in a single instruction. We are returning to kernel
1509 * mode, so this cannot result in a fault.
1510 */
1511 INTERRUPT_RETURN
1512 END(nmi)
1514 ENTRY(ignore_sysret)
1515 mov $-ENOSYS, %eax
1516 sysret
1517 END(ignore_sysret)
1519 ENTRY(rewind_stack_do_exit)
1520 /* Prevent any naive code from trying to unwind to our caller. */
1521 xorl %ebp, %ebp
1523 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1524 leaq -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%rax), %rsp
1526 call do_exit
1527 1: jmp 1b
1528 END(rewind_stack_do_exit)