2 * Copyright 2011 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
14 * This routine is a helper for migrating the home of a set of pages to
15 * a new cpu. See the documentation in homecache.c for more information.
18 #include <linux/linkage.h>
19 #include <linux/threads.h>
21 #include <asm/thread_info.h>
22 #include <asm/types.h>
23 #include <asm/asm-offsets.h>
24 #include <hv/hypervisor.h>
29 * First, some definitions that apply to all the code in the file.
32 /* Locals (caller-save) */
36 /* What we save where in the stack frame; must include all callee-saves. */
49 * r0 the new context PA to install (moved to r_context)
50 * r1 PTE to use for context access (moved to r_access)
51 * r2 ASID to use for new context (moved to r_asid)
52 * r3 pointer to cpumask with just this cpu set in it (r_my_cpumask)
55 /* Arguments (caller-save) */
56 #define r_context_in r0
57 #define r_access_in r1
59 #define r_my_cpumask r3
61 /* Locals (callee-save); must not be more than FRAME_xxx above. */
67 * Caller-save locals and frame constants are the same as
68 * for homecache_migrate_stack_and_flush.
71 STD_ENTRY(flush_and_install_context)
73 * Create a stack frame; we can't touch it once we flush the
74 * cache until we install the new page table and flush the TLB.
79 addi sp, sp, -FRAME_SIZE
81 addi r_tmp, sp, FRAME_SP
84 addi r_tmp, sp, FRAME_R30
88 addi r_tmp, sp, FRAME_R31
92 addi r_tmp, sp, FRAME_R32
96 /* Move some arguments to callee-save registers. */
98 move r_context, r_context_in
99 move r_access, r_access_in
101 move r_asid, r_asid_in
103 /* First, flush our L2 cache. */
105 move r0, zero /* cache_pa */
106 moveli r1, hw2_last(HV_FLUSH_EVICT_L2) /* cache_control */
109 shl16insli r1, r1, hw1(HV_FLUSH_EVICT_L2)
110 move r2, r_my_cpumask /* cache_cpumask */
113 shl16insli r1, r1, hw0(HV_FLUSH_EVICT_L2)
114 move r3, zero /* tlb_va */
117 move r4, zero /* tlb_length */
118 move r5, zero /* tlb_pgsize */
121 move r6, zero /* tlb_cpumask */
122 move r7, zero /* asids */
125 move r8, zero /* asidcount */
130 /* Now install the new page table. */
137 moveli r3, HV_CTX_DIRECTIO | CTX_PAGE_FLAG
139 jal hv_install_context
142 /* Finally, flush the TLB. */
144 movei r0, 0 /* preserve_global */
148 1: /* Restore the callee-saved registers and return. */
149 addli lr, sp, FRAME_SIZE
152 addli r_tmp, sp, FRAME_R30
156 addli r_tmp, sp, FRAME_R31
160 addli r_tmp, sp, FRAME_R32
164 addi sp, sp, FRAME_SIZE
167 STD_ENDPROC(flush_and_install_context)